diff --git a/arch/arm/src/armv7-a/arm_coherent_dcache.c b/arch/arm/src/armv7-a/arm_coherent_dcache.c
index 6c0d4d7ceb..1cb134c922 100644
--- a/arch/arm/src/armv7-a/arm_coherent_dcache.c
+++ b/arch/arm/src/armv7-a/arm_coherent_dcache.c
@@ -82,13 +82,16 @@
 
 void up_coherent_dcache(uintptr_t addr, size_t len)
 {
-  /* Perform the operation on the L1 cache */
+  if (len > 0)
+    {
+      /* Perform the operation on the L1 cache */
 
-  cp15_coherent_dcache(addr, addr+len);
+      cp15_coherent_dcache(addr, addr + len - 1);
 
 #ifdef CONFIG_ARCH_L2CACHE
-  /* If we have an L2 cache, then there more things that need to done */
+      /* If we have an L2 cache, then there more things that need to done */
 
 #  warning This is insufficient
 #endif
+    }
 }