Kconfig: improve uniformity
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
parent
3b3cebdd3e
commit
51a2db6ffc
44
Kconfig
44
Kconfig
@ -1807,34 +1807,34 @@ config DEBUG_MOTOR_INFO
|
||||
endif # DEBUG_MOTOR
|
||||
|
||||
config DEBUG_VIDEO
|
||||
bool "Video Debug Features"
|
||||
default n
|
||||
depends on DRIVERS_VIDEO
|
||||
---help---
|
||||
Enable video debug features.
|
||||
bool "Video Debug Features"
|
||||
default n
|
||||
depends on DRIVERS_VIDEO
|
||||
---help---
|
||||
Enable video debug features.
|
||||
|
||||
if DEBUG_VIDEO
|
||||
|
||||
config DEBUG_VIDEO_ERROR
|
||||
bool "Video Error Output"
|
||||
default n
|
||||
depends on DEBUG_ERROR
|
||||
---help---
|
||||
Enable video error output to SYSLOG.
|
||||
bool "Video Error Output"
|
||||
default n
|
||||
depends on DEBUG_ERROR
|
||||
---help---
|
||||
Enable video error output to SYSLOG.
|
||||
|
||||
config DEBUG_VIDEO_WARN
|
||||
bool "Video Warnings Output"
|
||||
default n
|
||||
depends on DEBUG_WARN
|
||||
---help---
|
||||
Enable video warning output to SYSLOG.
|
||||
bool "Video Warnings Output"
|
||||
default n
|
||||
depends on DEBUG_WARN
|
||||
---help---
|
||||
Enable video warning output to SYSLOG.
|
||||
|
||||
config DEBUG_VIDEO_INFO
|
||||
bool "Video Informational Output"
|
||||
default n
|
||||
depends on DEBUG_INFO
|
||||
---help---
|
||||
Enable video informational output to SYSLOG.
|
||||
bool "Video Informational Output"
|
||||
default n
|
||||
depends on DEBUG_INFO
|
||||
---help---
|
||||
Enable video informational output to SYSLOG.
|
||||
|
||||
endif # DEBUG_VIDEO
|
||||
endif # DEBUG_FEATURES
|
||||
@ -2024,7 +2024,7 @@ endmenu
|
||||
# does not contain a Kconfig file
|
||||
|
||||
config EXTERNALDIR
|
||||
string
|
||||
option env="EXTERNALDIR"
|
||||
string
|
||||
option env="EXTERNALDIR"
|
||||
|
||||
source "$EXTERNALDIR/Kconfig"
|
||||
|
@ -383,9 +383,9 @@ config CXD56_SPI_DRIVER
|
||||
this driver is to support SPI testing.
|
||||
|
||||
config CXD56_SPI_DMATHRESHOLD
|
||||
int "SPI DMA threshold"
|
||||
default 64
|
||||
depends on CXD56_DMAC
|
||||
int "SPI DMA threshold"
|
||||
default 64
|
||||
depends on CXD56_DMAC
|
||||
---help---
|
||||
When SPI DMA is enabled, small DMA transfers will still be performed
|
||||
by polling logic. But we need a threshold value to determine what
|
||||
|
@ -188,8 +188,8 @@ config IMXRT_FLEXSPI
|
||||
default n
|
||||
|
||||
config IMXRT_ADC
|
||||
bool
|
||||
default n
|
||||
bool
|
||||
default n
|
||||
|
||||
config IMXRT_ENC
|
||||
bool
|
||||
@ -359,7 +359,7 @@ config IMXRT_FLEXIO3
|
||||
bool "FLEXIO3"
|
||||
default n
|
||||
select IMXRT_FLEXIO
|
||||
---help---
|
||||
---help---
|
||||
FLEXIO3 uses the FLEXIO2 clock settings.
|
||||
|
||||
endif # ARCH_FAMILY_IMXRT106x
|
||||
@ -915,14 +915,14 @@ endmenu # FLEXSPI Peripherals
|
||||
menu "ADC Peripherals"
|
||||
|
||||
menuconfig IMXRT_ADC1
|
||||
bool "ADC1"
|
||||
default n
|
||||
select IMXRT_ADC
|
||||
bool "ADC1"
|
||||
default n
|
||||
select IMXRT_ADC
|
||||
|
||||
menuconfig IMXRT_ADC2
|
||||
bool "ADC2"
|
||||
default n
|
||||
select IMXRT_ADC
|
||||
bool "ADC2"
|
||||
default n
|
||||
select IMXRT_ADC
|
||||
|
||||
endmenu
|
||||
|
||||
@ -1976,24 +1976,24 @@ if IMXRT_USBDEV
|
||||
menu "USB device controller driver (DCD) options"
|
||||
|
||||
config IMXRT_USBDEV_NOVBUS
|
||||
bool "No USB VBUS sensing"
|
||||
default n
|
||||
bool "No USB VBUS sensing"
|
||||
default n
|
||||
|
||||
config IMXRT_USBDEV_FRAME_INTERRUPT
|
||||
bool "USB frame interrupt"
|
||||
default n
|
||||
---help---
|
||||
Handle USB Start-Of-Frame events. Enable reading SOF from interrupt
|
||||
handler vs. simply reading on demand. Probably a bad idea... Unless
|
||||
there is some issue with sampling the SOF from hardware asynchronously.
|
||||
bool "USB frame interrupt"
|
||||
default n
|
||||
---help---
|
||||
Handle USB Start-Of-Frame events. Enable reading SOF from interrupt
|
||||
handler vs. simply reading on demand. Probably a bad idea... Unless
|
||||
there is some issue with sampling the SOF from hardware asynchronously.
|
||||
|
||||
config IMXRT_USBDEV_REGDEBUG
|
||||
bool "Register level debug"
|
||||
depends on DEBUG_USB_INFO
|
||||
default n
|
||||
---help---
|
||||
Output detailed register-level USB device debug information. Requires
|
||||
also CONFIG_DEBUG_USB_INFO.
|
||||
bool "Register level debug"
|
||||
depends on DEBUG_USB_INFO
|
||||
default n
|
||||
---help---
|
||||
Output detailed register-level USB device debug information. Requires
|
||||
also CONFIG_DEBUG_USB_INFO.
|
||||
|
||||
endmenu # USB device controller driver (DCD) options
|
||||
endif # IMXRT_USBDEV
|
||||
|
@ -516,11 +516,11 @@ config LPC43_SDMMC_DMA
|
||||
Support DMA data transfers.
|
||||
|
||||
config LPC43_SDMMC_REGDEBUG
|
||||
bool "Register level debug"
|
||||
default n
|
||||
depends on DEBUG_MEMCARD_INFO
|
||||
---help---
|
||||
Output detailed register-level SD/MMC debug information.
|
||||
bool "Register level debug"
|
||||
default n
|
||||
depends on DEBUG_MEMCARD_INFO
|
||||
---help---
|
||||
Output detailed register-level SD/MMC debug information.
|
||||
|
||||
endmenu # SD/MMC Configuration
|
||||
|
||||
|
@ -946,11 +946,11 @@ config LPC54_ETH_NTXDESC1
|
||||
of the configured MTU.
|
||||
|
||||
config LPC54_ETH_REGDEBUG
|
||||
bool "Register level debug"
|
||||
default n
|
||||
depends on DEBUG_NET_INFO
|
||||
---help---
|
||||
Output detailed register-level Ethernet debug information.
|
||||
bool "Register level debug"
|
||||
default n
|
||||
depends on DEBUG_NET_INFO
|
||||
---help---
|
||||
Output detailed register-level Ethernet debug information.
|
||||
|
||||
endmenu # Ethernet configuration
|
||||
|
||||
|
@ -244,8 +244,8 @@ config NRF52_PWM3
|
||||
default n
|
||||
|
||||
config NRF52_PPI
|
||||
bool "PPI"
|
||||
default n
|
||||
bool "PPI"
|
||||
default n
|
||||
|
||||
config NRF52_RTC0
|
||||
bool "RTC0"
|
||||
@ -281,19 +281,19 @@ endmenu # NRF52 Peripheral Selection
|
||||
menu "Clock Configuration"
|
||||
|
||||
config NRF52_HFCLK_XTAL
|
||||
bool "Enable HFCLK from external crystal"
|
||||
default n
|
||||
---help---
|
||||
If the board includes an external high-frequency crystal, enable this
|
||||
option to supply the HFCLK. If this option is disabled, the internal
|
||||
oscillator will be used.
|
||||
Note that the RADIO peripheral requires the HFCLK to be used.
|
||||
bool "Enable HFCLK from external crystal"
|
||||
default n
|
||||
---help---
|
||||
If the board includes an external high-frequency crystal, enable this
|
||||
option to supply the HFCLK. If this option is disabled, the internal
|
||||
oscillator will be used.
|
||||
Note that the RADIO peripheral requires the HFCLK to be used.
|
||||
|
||||
config NRF52_USE_LFCLK
|
||||
bool "Enable LFCLK"
|
||||
default n
|
||||
---help---
|
||||
Enable low-frequency clock.
|
||||
bool "Enable LFCLK"
|
||||
default n
|
||||
---help---
|
||||
Enable low-frequency clock.
|
||||
|
||||
if NRF52_USE_LFCLK
|
||||
|
||||
@ -308,7 +308,7 @@ config NRF52_LFCLK_RC
|
||||
bool "Internal RC oscillator"
|
||||
|
||||
config NRF52_LFCLK_SYNTH
|
||||
bool "Synthesized from HFCLK"
|
||||
bool "Synthesized from HFCLK"
|
||||
|
||||
endchoice
|
||||
|
||||
@ -319,61 +319,61 @@ endmenu # Clock Configuration
|
||||
menu "System Timer"
|
||||
|
||||
config NRF52_SYSTIMER
|
||||
bool
|
||||
default y
|
||||
bool
|
||||
default y
|
||||
|
||||
choice
|
||||
prompt "System Timer Source"
|
||||
default NRF52_SYSTIMER_SYSTICK
|
||||
---help---
|
||||
Choose which hardware resource will drive NuttX
|
||||
system time
|
||||
prompt "System Timer Source"
|
||||
default NRF52_SYSTIMER_SYSTICK
|
||||
---help---
|
||||
Choose which hardware resource will drive NuttX
|
||||
system time
|
||||
|
||||
config NRF52_SYSTIMER_SYSTICK
|
||||
bool "SysTick"
|
||||
select TIMER_ARCH
|
||||
select TIMER
|
||||
select ARMV7M_SYSTICK
|
||||
---help---
|
||||
Use ARM SysTick. It can be used for tickless and
|
||||
non-tickless mode.
|
||||
bool "SysTick"
|
||||
select TIMER_ARCH
|
||||
select TIMER
|
||||
select ARMV7M_SYSTICK
|
||||
---help---
|
||||
Use ARM SysTick. It can be used for tickless and
|
||||
non-tickless mode.
|
||||
|
||||
NOTE: nRF52 implementation of WFE/WFI involves is
|
||||
incompatible with SysTick. This means that if
|
||||
you choose this option, WFE/WFI will not be used
|
||||
in idle loop.
|
||||
NOTE: nRF52 implementation of WFE/WFI involves is
|
||||
incompatible with SysTick. This means that if
|
||||
you choose this option, WFE/WFI will not be used
|
||||
in idle loop.
|
||||
|
||||
config NRF52_SYSTIMER_RTC
|
||||
bool "RTC"
|
||||
select NRF52_RTC
|
||||
select SCHED_TICKLESS
|
||||
select SCHED_TICKLESS_ALARM
|
||||
select NRF52_USE_LFCLK
|
||||
---help---
|
||||
Use RTC timer in tickless mode.
|
||||
bool "RTC"
|
||||
select NRF52_RTC
|
||||
select SCHED_TICKLESS
|
||||
select SCHED_TICKLESS_ALARM
|
||||
select NRF52_USE_LFCLK
|
||||
---help---
|
||||
Use RTC timer in tickless mode.
|
||||
|
||||
endchoice
|
||||
|
||||
if NRF52_SYSTIMER_RTC
|
||||
|
||||
config NRF52_SYSTIMER_RTC_INSTANCE
|
||||
int "RTC timer instance"
|
||||
default 0 if !NRF52_SOFTDEVICE_CONTROLLER
|
||||
default 1 if NRF52_SOFTDEVICE_CONTROLLER
|
||||
range 0 2
|
||||
---help---
|
||||
Which RTC instance to use to drive the system timer
|
||||
int "RTC timer instance"
|
||||
default 0 if !NRF52_SOFTDEVICE_CONTROLLER
|
||||
default 1 if NRF52_SOFTDEVICE_CONTROLLER
|
||||
range 0 2
|
||||
---help---
|
||||
Which RTC instance to use to drive the system timer
|
||||
|
||||
endif
|
||||
|
||||
endmenu # System Timer
|
||||
|
||||
config NRF52_DCDC
|
||||
bool "Enable DC/DC regulator"
|
||||
default n
|
||||
---help---
|
||||
This option enables the DC/DC regulator, which reduces
|
||||
current consumption. This requires extra circuitry (inductors).
|
||||
bool "Enable DC/DC regulator"
|
||||
default n
|
||||
---help---
|
||||
This option enables the DC/DC regulator, which reduces
|
||||
current consumption. This requires extra circuitry (inductors).
|
||||
|
||||
config NRF52_FLASH_PREFETCH
|
||||
bool "Enable FLASH Pre-fetch"
|
||||
@ -567,16 +567,16 @@ menu "SAADC Configuration"
|
||||
if NRF52_SAADC
|
||||
|
||||
choice
|
||||
prompt "SAADC trigger selection"
|
||||
default NRF52_SAADC_TASK
|
||||
---help---
|
||||
Choose mode for sample rate control
|
||||
prompt "SAADC trigger selection"
|
||||
default NRF52_SAADC_TASK
|
||||
---help---
|
||||
Choose mode for sample rate control
|
||||
|
||||
config NRF52_SAADC_TASK
|
||||
bool "SAADC Task trigger"
|
||||
bool "SAADC Task trigger"
|
||||
|
||||
config NRF52_SAADC_TIMER
|
||||
bool "SAADC Timer trigger"
|
||||
bool "SAADC Timer trigger"
|
||||
|
||||
endchoice # SAADC trigger selection
|
||||
|
||||
|
@ -385,10 +385,10 @@ config IEEE80211_REALTEK_AMEBAZ
|
||||
if IEEE80211_REALTEK_AMEBAZ
|
||||
|
||||
config IEEE80211_REALTEK_AMEBAZ_RECV_STACKSIZE
|
||||
int "Realtek amebaZ recv stack size"
|
||||
default 4096
|
||||
---help---
|
||||
Default recv stack size
|
||||
int "Realtek amebaZ recv stack size"
|
||||
default 4096
|
||||
---help---
|
||||
Default recv stack size
|
||||
|
||||
endif
|
||||
|
||||
|
@ -329,21 +329,21 @@ config S32K1XX_RTC
|
||||
default n
|
||||
|
||||
config S32K1XX_PROGMEM
|
||||
bool "PROGMEM"
|
||||
default n
|
||||
select ARCH_HAVE_PROGMEM
|
||||
depends on (ARCH_CHIP_S32K11X || (ARCH_CHIP_S32K14X && !ARCH_CHIP_S32K148) )
|
||||
---help---
|
||||
Use the FlexNVM 32/64 KB of d-flash memory as a
|
||||
bool "PROGMEM"
|
||||
default n
|
||||
select ARCH_HAVE_PROGMEM
|
||||
depends on (ARCH_CHIP_S32K11X || (ARCH_CHIP_S32K14X && !ARCH_CHIP_S32K148) )
|
||||
---help---
|
||||
Use the FlexNVM 32/64 KB of d-flash memory as a
|
||||
Memory-Technology-Device (MTD).
|
||||
|
||||
config S32K1XX_EEEPROM
|
||||
bool "Emulated EEPROM"
|
||||
default n
|
||||
---help---
|
||||
Enables Emulated EEPROM function which uses the FlexRAM and FlexNVM
|
||||
memory to emulate non-volatile memory. The EEEPROM will be registered
|
||||
as a ramdisk block device
|
||||
---help---
|
||||
Enables Emulated EEPROM function which uses the FlexRAM and FlexNVM
|
||||
memory to emulate non-volatile memory. The EEEPROM will be registered
|
||||
as a ramdisk block device
|
||||
|
||||
endmenu # S32K1XX Peripheral Selection
|
||||
|
||||
|
@ -5070,29 +5070,29 @@ endif #SAMA5_EBICS3_HEAP
|
||||
endmenu # Heap Configuration
|
||||
|
||||
config SAMA5_SDMMC
|
||||
bool "enable SDMMC controller"
|
||||
default y if SAMA5_HAVE_SDMMC
|
||||
select SDIO_DMA
|
||||
select SCHED_WORKQUEUE
|
||||
select SCHED_HPWORK
|
||||
select MMCSD
|
||||
select MMCSD_SDIO
|
||||
select SDIO_BLOCKSETUP
|
||||
select ARCH_HAVE_SDIO
|
||||
select SAMA5_SDMMC_DMA
|
||||
---help---
|
||||
Enable SD Card interface SDMMC. Selects SAMA5_SDMMC SAMA5_SDMMC_DMA SDIO_DMA SCHED_WORKQUEUE SCHED_HPWORK SDIO_BLOCKSETUP
|
||||
bool "enable SDMMC controller"
|
||||
default y if SAMA5_HAVE_SDMMC
|
||||
select SDIO_DMA
|
||||
select SCHED_WORKQUEUE
|
||||
select SCHED_HPWORK
|
||||
select MMCSD
|
||||
select MMCSD_SDIO
|
||||
select SDIO_BLOCKSETUP
|
||||
select ARCH_HAVE_SDIO
|
||||
select SAMA5_SDMMC_DMA
|
||||
---help---
|
||||
Enable SD Card interface SDMMC. Selects SAMA5_SDMMC SAMA5_SDMMC_DMA SDIO_DMA SCHED_WORKQUEUE SCHED_HPWORK SDIO_BLOCKSETUP
|
||||
|
||||
choice
|
||||
prompt "SDMMC maximum bus speed"
|
||||
default SAMA5_SDMMC_50MHZ
|
||||
depends on SAMA5_SDMMC
|
||||
prompt "SDMMC maximum bus speed"
|
||||
default SAMA5_SDMMC_50MHZ
|
||||
depends on SAMA5_SDMMC
|
||||
|
||||
config SAMA5_SDMMC_25MHZ
|
||||
bool "SDMMC 25Mhz"
|
||||
bool "SDMMC 25Mhz"
|
||||
|
||||
config SAMA5_SDMMC_50MHZ
|
||||
bool "SDMMC 50Mhz"
|
||||
bool "SDMMC 50Mhz"
|
||||
|
||||
endchoice # SDMMC bus speed
|
||||
|
||||
|
@ -550,22 +550,22 @@ config SAMD5E5_WDT
|
||||
default n
|
||||
|
||||
menuconfig SAMD5E5_PROGMEM
|
||||
bool "FLASH program memory"
|
||||
default n
|
||||
select ARCH_HAVE_PROGMEM
|
||||
---help---
|
||||
Enable support FLASH interfaces as defined in include/nuttx/progmem.h
|
||||
bool "FLASH program memory"
|
||||
default n
|
||||
select ARCH_HAVE_PROGMEM
|
||||
---help---
|
||||
Enable support FLASH interfaces as defined in include/nuttx/progmem.h
|
||||
|
||||
if SAMD5E5_PROGMEM
|
||||
|
||||
config SAMD5E5_PROGMEM_NSECTORS
|
||||
int "Number of 32Kbytes sectors"
|
||||
default 2
|
||||
range 1 32
|
||||
---help---
|
||||
This is the number of 32Kbytes FLASH sectors at the end of the program
|
||||
flash memory that will be reserved for use with by the interfaces
|
||||
prototyped in include/nuttx/progmem.h
|
||||
int "Number of 32Kbytes sectors"
|
||||
default 2
|
||||
range 1 32
|
||||
---help---
|
||||
This is the number of 32Kbytes FLASH sectors at the end of the program
|
||||
flash memory that will be reserved for use with by the interfaces
|
||||
prototyped in include/nuttx/progmem.h
|
||||
|
||||
endif # SAMD5E5_PROGMEM
|
||||
|
||||
|
@ -11359,38 +11359,38 @@ menuconfig STM32_FOC
|
||||
if STM32_FOC
|
||||
|
||||
config STM32_FOC_FOC0
|
||||
bool "FOC0 device (TIM1 for PWM modulation)"
|
||||
default n
|
||||
depends on STM32_HAVE_TIM1
|
||||
select STM32_FOC_USE_TIM1
|
||||
---help---
|
||||
Enable support for FOC0 device that uses TIM1 for PWM modulation
|
||||
bool "FOC0 device (TIM1 for PWM modulation)"
|
||||
default n
|
||||
depends on STM32_HAVE_TIM1
|
||||
select STM32_FOC_USE_TIM1
|
||||
---help---
|
||||
Enable support for FOC0 device that uses TIM1 for PWM modulation
|
||||
|
||||
config STM32_FOC_FOC1
|
||||
bool "FOC1 device (TIM8 for PWM modulation)"
|
||||
default n
|
||||
depends on STM32_HAVE_TIM8
|
||||
select STM32_FOC_USE_TIM8
|
||||
---help---
|
||||
Enable support for FOC1 device that uses TIM8 for PWM modulation
|
||||
bool "FOC1 device (TIM8 for PWM modulation)"
|
||||
default n
|
||||
depends on STM32_HAVE_TIM8
|
||||
select STM32_FOC_USE_TIM8
|
||||
---help---
|
||||
Enable support for FOC1 device that uses TIM8 for PWM modulation
|
||||
|
||||
choice
|
||||
prompt "FOC ADC trigger selection"
|
||||
default STM32_FOC_ADC_TRGO
|
||||
|
||||
config STM32_FOC_ADC_CCR4
|
||||
bool "FOC uses CCR4 as ADC trigger"
|
||||
---help---
|
||||
This option uses the software frequency prescaler and is
|
||||
not possible for 4-phase output.
|
||||
bool "FOC uses CCR4 as ADC trigger"
|
||||
---help---
|
||||
This option uses the software frequency prescaler and is
|
||||
not possible for 4-phase output.
|
||||
|
||||
config STM32_FOC_ADC_TRGO
|
||||
bool "FOC uses TRGO as ADC trigger"
|
||||
depends on STM32_HAVE_IP_ADC_V2 || (STM32_HAVE_IP_ADC_V1 && !STM32_FOC_FOC1)
|
||||
select STM32_PWM_TRGO
|
||||
---help---
|
||||
This option allows you to use higher PWM frequency and works for 4-phase output.
|
||||
It is not possible for ADC IPv1 if FOC1 enabled (no T8TRGO in JEXTSEL).
|
||||
bool "FOC uses TRGO as ADC trigger"
|
||||
depends on STM32_HAVE_IP_ADC_V2 || (STM32_HAVE_IP_ADC_V1 && !STM32_FOC_FOC1)
|
||||
select STM32_PWM_TRGO
|
||||
---help---
|
||||
This option allows you to use higher PWM frequency and works for 4-phase output.
|
||||
It is not possible for ADC IPv1 if FOC1 enabled (no T8TRGO in JEXTSEL).
|
||||
|
||||
endchoice # "FOC ADC trigger selection"
|
||||
|
||||
@ -11401,24 +11401,24 @@ choice
|
||||
default STM32_FOC_FOC0_ADC1
|
||||
|
||||
config STM32_FOC_FOC0_ADC1
|
||||
bool "FOC0 uses ADC1"
|
||||
depends on STM32_HAVE_ADC1
|
||||
select STM32_FOC_USE_ADC1
|
||||
bool "FOC0 uses ADC1"
|
||||
depends on STM32_HAVE_ADC1
|
||||
select STM32_FOC_USE_ADC1
|
||||
|
||||
config STM32_FOC_FOC0_ADC2
|
||||
bool "FOC0 uses ADC2"
|
||||
depends on STM32_HAVE_ADC2
|
||||
select STM32_FOC_USE_ADC2
|
||||
bool "FOC0 uses ADC2"
|
||||
depends on STM32_HAVE_ADC2
|
||||
select STM32_FOC_USE_ADC2
|
||||
|
||||
config STM32_FOC_FOC0_ADC3
|
||||
bool "FOC0 uses ADC3"
|
||||
depends on STM32_HAVE_ADC3
|
||||
select STM32_FOC_USE_ADC3
|
||||
bool "FOC0 uses ADC3"
|
||||
depends on STM32_HAVE_ADC3
|
||||
select STM32_FOC_USE_ADC3
|
||||
|
||||
config STM32_FOC_FOC0_ADC4
|
||||
bool "FOC0 uses ADC4"
|
||||
depends on STM32_HAVE_ADC4
|
||||
select STM32_FOC_USE_ADC4
|
||||
bool "FOC0 uses ADC4"
|
||||
depends on STM32_HAVE_ADC4
|
||||
select STM32_FOC_USE_ADC4
|
||||
|
||||
endchoice # "FOC0 device ADC selection"
|
||||
|
||||
@ -11431,115 +11431,115 @@ choice
|
||||
default STM32_FOC_FOC1_ADC2
|
||||
|
||||
config STM32_FOC_FOC1_ADC1
|
||||
bool "FOC1 uses ADC1"
|
||||
depends on STM32_HAVE_ADC1
|
||||
select STM32_FOC_USE_ADC1
|
||||
bool "FOC1 uses ADC1"
|
||||
depends on STM32_HAVE_ADC1
|
||||
select STM32_FOC_USE_ADC1
|
||||
|
||||
config STM32_FOC_FOC1_ADC2
|
||||
bool "FOC1 uses ADC2"
|
||||
depends on STM32_HAVE_ADC2
|
||||
select STM32_FOC_USE_ADC2
|
||||
bool "FOC1 uses ADC2"
|
||||
depends on STM32_HAVE_ADC2
|
||||
select STM32_FOC_USE_ADC2
|
||||
|
||||
config STM32_FOC_FOC1_ADC3
|
||||
bool "FOC1 uses ADC3"
|
||||
depends on STM32_HAVE_ADC3
|
||||
select STM32_FOC_USE_ADC3
|
||||
bool "FOC1 uses ADC3"
|
||||
depends on STM32_HAVE_ADC3
|
||||
select STM32_FOC_USE_ADC3
|
||||
|
||||
config STM32_FOC_FOC1_ADC4
|
||||
bool "FOC1 uses ADC4"
|
||||
depends on STM32_HAVE_ADC4
|
||||
select STM32_FOC_USE_ADC4
|
||||
bool "FOC1 uses ADC4"
|
||||
depends on STM32_HAVE_ADC4
|
||||
select STM32_FOC_USE_ADC4
|
||||
|
||||
endchoice # "FOC0 device ADC selection"
|
||||
|
||||
endif # STM32_FOC_FOC1
|
||||
|
||||
config STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
bool "FOC PWM has complementary outputs"
|
||||
default n
|
||||
---help---
|
||||
Enable complementary outputs for the FOC PWM (sometimes called 6-PWM mode)
|
||||
bool "FOC PWM has complementary outputs"
|
||||
default n
|
||||
---help---
|
||||
Enable complementary outputs for the FOC PWM (sometimes called 6-PWM mode)
|
||||
|
||||
# hidden variables and automatic configuration
|
||||
|
||||
config STM32_FOC_USE_TIM1
|
||||
bool
|
||||
default n
|
||||
select STM32_TIM1
|
||||
select STM32_TIM1_PWM
|
||||
select STM32_TIM1_CHANNEL1
|
||||
select STM32_TIM1_CHANNEL2
|
||||
select STM32_TIM1_CHANNEL3
|
||||
select STM32_TIM1_CHANNEL4 if STM32_FOC_ADC_CCR4
|
||||
select STM32_TIM1_CH1OUT
|
||||
select STM32_TIM1_CH2OUT
|
||||
select STM32_TIM1_CH3OUT
|
||||
select STM32_TIM1_CH4OUT if STM32_FOC_ADC_CCR4
|
||||
select STM32_TIM1_CH1NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
select STM32_TIM1_CH2NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
select STM32_TIM1_CH3NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
---help---
|
||||
The TIM1 generates PWM for the FOC
|
||||
bool
|
||||
default n
|
||||
select STM32_TIM1
|
||||
select STM32_TIM1_PWM
|
||||
select STM32_TIM1_CHANNEL1
|
||||
select STM32_TIM1_CHANNEL2
|
||||
select STM32_TIM1_CHANNEL3
|
||||
select STM32_TIM1_CHANNEL4 if STM32_FOC_ADC_CCR4
|
||||
select STM32_TIM1_CH1OUT
|
||||
select STM32_TIM1_CH2OUT
|
||||
select STM32_TIM1_CH3OUT
|
||||
select STM32_TIM1_CH4OUT if STM32_FOC_ADC_CCR4
|
||||
select STM32_TIM1_CH1NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
select STM32_TIM1_CH2NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
select STM32_TIM1_CH3NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
---help---
|
||||
The TIM1 generates PWM for the FOC
|
||||
|
||||
config STM32_FOC_USE_TIM8
|
||||
bool
|
||||
default n
|
||||
select STM32_TIM8
|
||||
select STM32_TIM8_PWM
|
||||
select STM32_TIM8_CHANNEL1
|
||||
select STM32_TIM8_CHANNEL2
|
||||
select STM32_TIM8_CHANNEL3
|
||||
select STM32_TIM8_CHANNEL4 if STM32_FOC_ADC_CCR4
|
||||
select STM32_TIM8_CH1OUT
|
||||
select STM32_TIM8_CH2OUT
|
||||
select STM32_TIM8_CH3OUT
|
||||
select STM32_TIM8_CH4OUT if STM32_FOC_ADC_CCR4
|
||||
select STM32_TIM8_CH1NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
select STM32_TIM8_CH2NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
select STM32_TIM8_CH3NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
---help---
|
||||
The TIM8 generates PWM for the FOC
|
||||
bool
|
||||
default n
|
||||
select STM32_TIM8
|
||||
select STM32_TIM8_PWM
|
||||
select STM32_TIM8_CHANNEL1
|
||||
select STM32_TIM8_CHANNEL2
|
||||
select STM32_TIM8_CHANNEL3
|
||||
select STM32_TIM8_CHANNEL4 if STM32_FOC_ADC_CCR4
|
||||
select STM32_TIM8_CH1OUT
|
||||
select STM32_TIM8_CH2OUT
|
||||
select STM32_TIM8_CH3OUT
|
||||
select STM32_TIM8_CH4OUT if STM32_FOC_ADC_CCR4
|
||||
select STM32_TIM8_CH1NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
select STM32_TIM8_CH2NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
select STM32_TIM8_CH3NOUT if STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
---help---
|
||||
The TIM8 generates PWM for the FOC
|
||||
|
||||
config STM32_FOC_USE_ADC1
|
||||
bool
|
||||
default n
|
||||
select STM32_ADC1
|
||||
select STM32_ADC1_SCAN if STM32_HAVE_IP_ADC_V1
|
||||
select STM32_ADC1_JEXTSEL
|
||||
bool
|
||||
default n
|
||||
select STM32_ADC1
|
||||
select STM32_ADC1_SCAN if STM32_HAVE_IP_ADC_V1
|
||||
select STM32_ADC1_JEXTSEL
|
||||
|
||||
config STM32_FOC_USE_ADC2
|
||||
bool
|
||||
default n
|
||||
select STM32_ADC2
|
||||
select STM32_ADC2_SCAN if STM32_HAVE_IP_ADC_V1
|
||||
select STM32_ADC2_JEXTSEL
|
||||
bool
|
||||
default n
|
||||
select STM32_ADC2
|
||||
select STM32_ADC2_SCAN if STM32_HAVE_IP_ADC_V1
|
||||
select STM32_ADC2_JEXTSEL
|
||||
|
||||
config STM32_FOC_USE_ADC3
|
||||
bool
|
||||
default n
|
||||
select STM32_ADC3
|
||||
select STM32_ADC3_SCAN if STM32_HAVE_IP_ADC_V1
|
||||
select STM32_ADC3_JEXTSEL
|
||||
bool
|
||||
default n
|
||||
select STM32_ADC3
|
||||
select STM32_ADC3_SCAN if STM32_HAVE_IP_ADC_V1
|
||||
select STM32_ADC3_JEXTSEL
|
||||
|
||||
config STM32_FOC_USE_ADC4
|
||||
bool
|
||||
default n
|
||||
select STM32_ADC4
|
||||
select STM32_ADC3_JEXTSEL
|
||||
bool
|
||||
default n
|
||||
select STM32_ADC4
|
||||
select STM32_ADC3_JEXTSEL
|
||||
|
||||
config STM32_FOC_G4_ADCCHAN0_WORKAROUND
|
||||
bool "FOC G4 ADC channel 0 unwanted conversion workaround"
|
||||
default n
|
||||
---help---
|
||||
Some STM32G4 family chips have an issue that causes unwanted ADC channel 0
|
||||
conversion when a regular conversion is interrupted by an injected conversion.
|
||||
This FOC implementation uses injected conversion to sample phase currents
|
||||
and allows user to use regular conversion as an auxiliary analog conversion.
|
||||
In this case, there is a certain probability that regular conversion will be
|
||||
interrupted by an injected conversion that will lead to an incorrect reading
|
||||
of phase currents.
|
||||
bool "FOC G4 ADC channel 0 unwanted conversion workaround"
|
||||
default n
|
||||
---help---
|
||||
Some STM32G4 family chips have an issue that causes unwanted ADC channel 0
|
||||
conversion when a regular conversion is interrupted by an injected conversion.
|
||||
This FOC implementation uses injected conversion to sample phase currents
|
||||
and allows user to use regular conversion as an auxiliary analog conversion.
|
||||
In this case, there is a certain probability that regular conversion will be
|
||||
interrupted by an injected conversion that will lead to an incorrect reading
|
||||
of phase currents.
|
||||
|
||||
This workaround inserts a dummy conversion at the beginning of the injected
|
||||
sequence. For more details look at the chip errata documents.
|
||||
This workaround inserts a dummy conversion at the beginning of the injected
|
||||
sequence. For more details look at the chip errata documents.
|
||||
|
||||
endif #STM32_FOC
|
||||
|
@ -58,8 +58,8 @@ config ARCH_MIPS_M5150
|
||||
select ARCH_HAVE_MICROMIPS
|
||||
|
||||
config ARCH_HAVE_EIC
|
||||
bool
|
||||
default n
|
||||
bool
|
||||
default n
|
||||
|
||||
config ARCH_HAVE_MICROMIPS
|
||||
bool
|
||||
|
@ -58,10 +58,10 @@ config ARCH_SH1
|
||||
default n
|
||||
|
||||
config ARCH_RENESAS_RX
|
||||
bool
|
||||
default n
|
||||
select ARCH_HAVE_SETJMP
|
||||
select CYGWIN_WINTOOL if WINDOWS_CYGWIN
|
||||
bool
|
||||
default n
|
||||
select ARCH_HAVE_SETJMP
|
||||
select CYGWIN_WINTOOL if WINDOWS_CYGWIN
|
||||
|
||||
config ARCH_RX65N
|
||||
bool
|
||||
|
@ -71,13 +71,13 @@ config ARCH_CHIP_C906
|
||||
THEAD C906 processor (RISC-V 64bit core with GCVX extensions).
|
||||
|
||||
config ARCH_CHIP_MPFS
|
||||
bool "MicroChip Polarfire (MPFS)"
|
||||
select ARCH_RV64GC
|
||||
select ARCH_HAVE_MPU
|
||||
select ARCH_HAVE_RESET
|
||||
select ARCH_HAVE_SPI_CS_CONTROL
|
||||
select ARCH_HAVE_PWM_MULTICHAN
|
||||
---help---
|
||||
bool "MicroChip Polarfire (MPFS)"
|
||||
select ARCH_RV64GC
|
||||
select ARCH_HAVE_MPU
|
||||
select ARCH_HAVE_RESET
|
||||
select ARCH_HAVE_SPI_CS_CONTROL
|
||||
select ARCH_HAVE_PWM_MULTICHAN
|
||||
---help---
|
||||
MicroChip Polarfire processor (RISC-V 64bit core with GCVX extensions).
|
||||
|
||||
config ARCH_CHIP_RV32M1
|
||||
|
@ -65,13 +65,13 @@ menu "SPI Flash configuration"
|
||||
config BL602_MTD_OFFSET
|
||||
hex "MTD base address in SPI Flash"
|
||||
default 0x001c5000
|
||||
help
|
||||
---help---
|
||||
MTD base address in SPI Flash.
|
||||
|
||||
config BL602_MTD_SIZE
|
||||
hex "MTD size in SPI Flash"
|
||||
default 0x30000
|
||||
help
|
||||
---help---
|
||||
MTD size in SPI Flash.
|
||||
|
||||
endmenu # BL602_SPIFLASH
|
||||
|
@ -830,7 +830,7 @@ choice ESP32C3_WIFI_LOG_LEVEL
|
||||
depends on DEBUG_INFO
|
||||
prompt "WiFi debug log level"
|
||||
default WIFI_LOG_LEVEL_INFO
|
||||
help
|
||||
---help---
|
||||
The WiFi log is divided into the following levels: ERROR,WARNING,INFO,DEBUG,VERBOSE.
|
||||
|
||||
config WIFI_LOG_LEVEL_NONE
|
||||
@ -926,8 +926,8 @@ config ESP32C3_MTD
|
||||
select MTD_BYTE_WRITE
|
||||
select MTD_PARTITION
|
||||
---help---
|
||||
Initialize an MTD driver for the ESP32-C3 SPI Flash, which will
|
||||
add an entry at /dev for application access from userspace.
|
||||
Initialize an MTD driver for the ESP32-C3 SPI Flash, which will
|
||||
add an entry at /dev for application access from userspace.
|
||||
|
||||
config ESP32C3_STORAGE_MTD_BLKSIZE
|
||||
int "Storage MTD block size"
|
||||
|
@ -21,16 +21,16 @@ config MPFS_BOOTLOADER
|
||||
|
||||
config MPFS_BOOT_HART
|
||||
int "HART used for booting"
|
||||
depends on MPFS_BOOTLOADER
|
||||
depends on MPFS_BOOTLOADER
|
||||
default 0
|
||||
---help---
|
||||
The HART number which does the HW initialiization and wakes up the other harts (Default 0, E51 core)
|
||||
|
||||
config MPFS_DDR_INIT
|
||||
bool "Initialize DDR"
|
||||
default n
|
||||
---help---
|
||||
Initializes and performs DDR training on the associated DDR memory.
|
||||
bool "Initialize DDR"
|
||||
default n
|
||||
---help---
|
||||
Initializes and performs DDR training on the associated DDR memory.
|
||||
|
||||
config MPFS_EMMCSD_MUX_GPIO
|
||||
bool "GPIO driven EMMCSD mux"
|
||||
@ -76,12 +76,12 @@ config MPFS_HAVE_UART4
|
||||
# These are the peripheral selections proper
|
||||
|
||||
config MPFS_SPI0
|
||||
bool "SPI 0"
|
||||
default n
|
||||
bool "SPI 0"
|
||||
default n
|
||||
|
||||
config MPFS_SPI1
|
||||
bool "SPI 1"
|
||||
default n
|
||||
bool "SPI 1"
|
||||
default n
|
||||
|
||||
config MPFS_UART0
|
||||
bool "UART 0"
|
||||
@ -119,23 +119,23 @@ config MPFS_UART4
|
||||
select MPFS_HAVE_UART4
|
||||
|
||||
config MPFS_I2C0
|
||||
bool "I2C 0"
|
||||
select ARCH_HAVE_I2CRESET
|
||||
default n
|
||||
bool "I2C 0"
|
||||
select ARCH_HAVE_I2CRESET
|
||||
default n
|
||||
|
||||
config MPFS_I2C1
|
||||
bool "I2C 1"
|
||||
select ARCH_HAVE_I2CRESET
|
||||
default n
|
||||
bool "I2C 1"
|
||||
select ARCH_HAVE_I2CRESET
|
||||
default n
|
||||
|
||||
config MPFS_EMMCSD
|
||||
bool "EMMCSD"
|
||||
select ARCH_HAVE_SDIO
|
||||
select SDIO_BLOCKSETUP
|
||||
select SDIO_DMA
|
||||
default n
|
||||
---help---
|
||||
Selects the MPFS eMMCSD driver.
|
||||
bool "EMMCSD"
|
||||
select ARCH_HAVE_SDIO
|
||||
select SDIO_BLOCKSETUP
|
||||
select SDIO_DMA
|
||||
default n
|
||||
---help---
|
||||
Selects the MPFS eMMCSD driver.
|
||||
|
||||
comment "CorePWM Options"
|
||||
|
||||
|
@ -13,7 +13,7 @@ choice
|
||||
config ARCH_CHIP_RV32M1_RI5CY
|
||||
bool "RV32M1_RI5CY"
|
||||
select RV32M1_HAVE_ITCM
|
||||
select RV32M1_HAVE_TSTMR
|
||||
select RV32M1_HAVE_TSTMR
|
||||
---help---
|
||||
RV32M1 RI5CY, RV32IMC 256KB SRAM, 1MB FLASH.
|
||||
|
||||
@ -45,52 +45,52 @@ config RV32M1_HAVE_ITCM
|
||||
default n
|
||||
|
||||
config RV32M1_HAVE_TSTMR
|
||||
bool
|
||||
default y
|
||||
bool
|
||||
default y
|
||||
|
||||
config RV32M1_LPUART
|
||||
bool
|
||||
default n
|
||||
bool
|
||||
default n
|
||||
|
||||
config RV32M1_SERIALDRIVER
|
||||
bool
|
||||
default n
|
||||
bool
|
||||
default n
|
||||
|
||||
# These are the peripheral selections proper
|
||||
|
||||
config RV32M1_LPUART0
|
||||
bool "LPUART0"
|
||||
default n
|
||||
depends on RV32M1_HAVE_LPUART0
|
||||
select RV32M1_LPUART
|
||||
depends on RV32M1_HAVE_LPUART0
|
||||
select RV32M1_LPUART
|
||||
|
||||
config RV32M1_LPUART1
|
||||
bool "LPUART1"
|
||||
default n
|
||||
depends on RV32M1_HAVE_LPUART1
|
||||
select RV32M1_LPUART
|
||||
depends on RV32M1_HAVE_LPUART1
|
||||
select RV32M1_LPUART
|
||||
|
||||
config RV32M1_LPUART2
|
||||
bool "LPUART2"
|
||||
default n
|
||||
depends on RV32M1_HAVE_LPUART2
|
||||
select RV32M2_LPUART
|
||||
depends on RV32M1_HAVE_LPUART2
|
||||
select RV32M2_LPUART
|
||||
|
||||
config RV32M1_LPUART3
|
||||
bool "LPUART3"
|
||||
default n
|
||||
depends on RV32M1_HAVE_LPUART3
|
||||
select RV32M2_LPUART
|
||||
depends on RV32M1_HAVE_LPUART3
|
||||
select RV32M2_LPUART
|
||||
|
||||
config RV32M1_ITCM
|
||||
bool "ITCM"
|
||||
default n
|
||||
depends on RV32M1_HAVE_ITCM
|
||||
depends on RV32M1_HAVE_ITCM
|
||||
|
||||
config RV32M1_TSTMR
|
||||
bool "TSTMR"
|
||||
default n
|
||||
depends on RV32M1_HAVE_TSTMR
|
||||
depends on RV32M1_HAVE_TSTMR
|
||||
|
||||
menu "LPUART Configuration"
|
||||
depends on RV32M1_LPUART
|
||||
@ -106,7 +106,7 @@ config RV32M1_LPUART0_SERIALDRIVER
|
||||
bool "Standard serial driver"
|
||||
select ARCH_HAVE_SERIAL_TERMIOS
|
||||
select RV32M1_SERIALDRIVER
|
||||
select LPUART0_SERIALDRIVER
|
||||
select LPUART0_SERIALDRIVER
|
||||
|
||||
endchoice # LPUART0 Driver Configuration
|
||||
|
||||
@ -123,7 +123,7 @@ config RV32M1_LPUART1_SERIALDRIVER
|
||||
bool "Standard serial driver"
|
||||
select ARCH_HAVE_SERIAL_TERMIOS
|
||||
select RV32M1_SERIALDRIVER
|
||||
select LPUART1_SERIALDRIVER
|
||||
select LPUART1_SERIALDRIVER
|
||||
|
||||
endchoice # LPUART1 Driver Configuration
|
||||
|
||||
@ -140,7 +140,7 @@ config RV32M1_LPUART2_SERIALDRIVER
|
||||
bool "Standard serial driver"
|
||||
select ARCH_HAVE_SERIAL_TERMIOS
|
||||
select RV32M1_SERIALDRIVER
|
||||
select LPUART2_SERIALDRIVER
|
||||
select LPUART2_SERIALDRIVER
|
||||
|
||||
endchoice # LPUART2 Driver Configuration
|
||||
|
||||
@ -157,7 +157,7 @@ config RV32M1_LPUART3_SERIALDRIVER
|
||||
bool "Standard serial driver"
|
||||
select ARCH_HAVE_SERIAL_TERMIOS
|
||||
select RV32M1_SERIALDRIVER
|
||||
select LPUART3_SERIALDRIVER
|
||||
select LPUART3_SERIALDRIVER
|
||||
|
||||
endchoice # LPUART3 Driver Configuration
|
||||
|
||||
|
@ -18,8 +18,8 @@ config ARCH_INTEL64
|
||||
bool "Intel x86_64"
|
||||
select ARCH_HAVE_MPU
|
||||
select ARCH_USE_MPU
|
||||
select ARCH_HAVE_TICKLESS
|
||||
select ARCH_HAVE_STACKCHECK
|
||||
select ARCH_HAVE_TICKLESS
|
||||
select ARCH_HAVE_STACKCHECK
|
||||
select ARCH_HAVE_RNG
|
||||
---help---
|
||||
Intel x86_64 architecture
|
||||
@ -66,8 +66,8 @@ endif # ARCH_CHIP_QEMU
|
||||
config ARCH_EXCLUDE_MULTIBOOT
|
||||
bool "Don't append multiboot2 header"
|
||||
default n
|
||||
---help---
|
||||
Some platforms, e.g. jailhouse, do not like to have a multiboot header
|
||||
---help---
|
||||
Some platforms, e.g. jailhouse, do not like to have a multiboot header
|
||||
|
||||
|
||||
endif # ARCH_X86_64
|
||||
|
@ -7,16 +7,16 @@ if ARCH_INTEL64
|
||||
comment "intel64 Configuration Options"
|
||||
|
||||
config ARCH_INTEL64_HAVE_TSC_DEADLINE
|
||||
bool "TSC DEADLINE timer support"
|
||||
default y
|
||||
bool "TSC DEADLINE timer support"
|
||||
default y
|
||||
---help---
|
||||
Select to enable the use of TSC DEADLINE timer of x86_64
|
||||
|
||||
if ARCH_INTEL64_HAVE_TSC_DEADLINE
|
||||
|
||||
config ARCH_INTEL64_CORE_FREQ_KHZ
|
||||
int "CPU Core frequency in kHz"
|
||||
default 2000000
|
||||
int "CPU Core frequency in kHz"
|
||||
default 2000000
|
||||
---help---
|
||||
The CPU Core frequency (without Turbo boost). This is used
|
||||
to set the TSC deadline timer frequency.
|
||||
@ -26,8 +26,8 @@ endif
|
||||
if !ARCH_INTEL64_HAVE_TSC_DEADLINE
|
||||
|
||||
config ARCH_INTEL64_APIC_FREQ_KHZ
|
||||
int "APIC timer frequency in kHz"
|
||||
default 2000000
|
||||
int "APIC timer frequency in kHz"
|
||||
default 2000000
|
||||
---help---
|
||||
The APIC timer frequency. This is used to set the APIC timer
|
||||
frequency in case of no TSC DEADLINE timer is available.
|
||||
@ -35,27 +35,27 @@ config ARCH_INTEL64_APIC_FREQ_KHZ
|
||||
endif
|
||||
|
||||
config ARCH_INTEL64_HAVE_XSAVE
|
||||
bool "XSAVE support"
|
||||
default y
|
||||
bool "XSAVE support"
|
||||
default y
|
||||
---help---
|
||||
Select to enable the use of XSAVE and FPU/SSE/AVX functions
|
||||
of x86_64
|
||||
|
||||
config ARCH_INTEL64_HAVE_PCID
|
||||
bool "PCID support"
|
||||
default y
|
||||
bool "PCID support"
|
||||
default y
|
||||
---help---
|
||||
Select to enable the use of PCID to reduce TLB flush
|
||||
|
||||
config ARCH_INTEL64_HAVE_RDRAND
|
||||
bool "RDRAND support"
|
||||
default y
|
||||
bool "RDRAND support"
|
||||
default y
|
||||
---help---
|
||||
Select to enable the use of RDRAND for /dev/random
|
||||
|
||||
config ARCH_INTEL64_DISABLE_INT_INIT
|
||||
bool "Disable Initialization of 8259/APIC/IO-APIC"
|
||||
default n
|
||||
bool "Disable Initialization of 8259/APIC/IO-APIC"
|
||||
default n
|
||||
---help---
|
||||
Select to disable all initialization related to interrupt
|
||||
controllers. This is necessary if those are already
|
||||
|
@ -201,7 +201,7 @@ config XTENSA_INTBACKTRACE
|
||||
config XTENSA_IMEM_USE_SEPARATE_HEAP
|
||||
bool "Use a separate heap for internal memory"
|
||||
default n
|
||||
help
|
||||
---help---
|
||||
This is a separate internal heap that's used by drivers when certain operations
|
||||
are not possible with the provided buffer(s).
|
||||
Mainly, when the provided buffer comes from external RAM and a DMA or flash
|
||||
@ -216,7 +216,7 @@ config XTENSA_IMEM_REGION_SIZE
|
||||
config XTENSA_EXTMEM_BSS
|
||||
bool "Allow BSS section in external memory"
|
||||
default n
|
||||
help
|
||||
---help---
|
||||
Adds a section and an attribute that allows to force variables into
|
||||
the external memory.
|
||||
|
||||
|
@ -51,8 +51,8 @@ config ARCH_CHIP_EZ80F93
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "Toolchain Selection"
|
||||
default EZ80_TOOLCHAIN_ZDSII
|
||||
prompt "Toolchain Selection"
|
||||
default EZ80_TOOLCHAIN_ZDSII
|
||||
|
||||
config EZ80_TOOLCHAIN_ZDSII
|
||||
bool "ZDS-II for Windows"
|
||||
@ -60,7 +60,7 @@ config EZ80_TOOLCHAIN_ZDSII
|
||||
|
||||
config EZ80_TOOLCHAIN_CLANG
|
||||
bool "Clang for Linux, macOS, or Cygwin"
|
||||
depends on EXPERIMENTAL
|
||||
depends on EXPERIMENTAL
|
||||
|
||||
endchoice
|
||||
|
||||
|
@ -319,11 +319,11 @@ config Z180_TOOLCHAIN_SDCCW
|
||||
endchoice
|
||||
|
||||
config Z180_MAX_TASKS
|
||||
int "Max number of tasks for arch chip z180"
|
||||
default 8
|
||||
---help---
|
||||
The maximum number of simultaneously active tasks. This value must be
|
||||
a power of two.
|
||||
int "Max number of tasks for arch chip z180"
|
||||
default 8
|
||||
---help---
|
||||
The maximum number of simultaneously active tasks. This value must be
|
||||
a power of two.
|
||||
|
||||
config LINKER_HOME_AREA
|
||||
hex "Physical start of _HOME area"
|
||||
|
@ -319,15 +319,15 @@ config ARCH_BOARD_FIRE_STM32
|
||||
tested.
|
||||
|
||||
config ARCH_BOARD_CHIPKIT_WIFIRE
|
||||
bool "chipKIT Wi-FIRE"
|
||||
depends on ARCH_CHIP_PIC32MZ2048EFG
|
||||
select ARCH_HAVE_LEDS
|
||||
select ARCH_HAVE_BUTTONS
|
||||
select ARCH_HAVE_IRQBUTTONS
|
||||
---help---
|
||||
This options selects the chipKIT Wi-FIRE board. This
|
||||
board is a chipKIT Arduino-compatible board. This board
|
||||
features the Microchip PIC32MZ2048EFG100 MCU running at 200 MHz.
|
||||
bool "chipKIT Wi-FIRE"
|
||||
depends on ARCH_CHIP_PIC32MZ2048EFG
|
||||
select ARCH_HAVE_LEDS
|
||||
select ARCH_HAVE_BUTTONS
|
||||
select ARCH_HAVE_IRQBUTTONS
|
||||
---help---
|
||||
This options selects the chipKIT Wi-FIRE board. This
|
||||
board is a chipKIT Arduino-compatible board. This board
|
||||
features the Microchip PIC32MZ2048EFG100 MCU running at 200 MHz.
|
||||
|
||||
config ARCH_BOARD_FLIPNCLICK_PIC32MZ
|
||||
bool "Mikroe Flip&Click PIC32MZ"
|
||||
@ -674,20 +674,20 @@ config ARCH_BOARD_SMARTL_C906
|
||||
THEAD smartl-c906 board. This board features the RISC-V C906.
|
||||
|
||||
config ARCH_BOARD_ICICLE_MPFS
|
||||
bool "Polarfire Icicle evaluation board for MPFS"
|
||||
depends on ARCH_CHIP_MPFS
|
||||
select ARCH_HAVE_LEDS if !MPFS_WITH_QEMU
|
||||
---help---
|
||||
This is the board configuration for the port of NuttX to the
|
||||
MicroChip icicle-mpfs board. This board features the RISC-V MPFS.
|
||||
bool "Polarfire Icicle evaluation board for MPFS"
|
||||
depends on ARCH_CHIP_MPFS
|
||||
select ARCH_HAVE_LEDS if !MPFS_WITH_QEMU
|
||||
---help---
|
||||
This is the board configuration for the port of NuttX to the
|
||||
MicroChip icicle-mpfs board. This board features the RISC-V MPFS.
|
||||
|
||||
config ARCH_BOARD_M100PFSEVP_MPFS
|
||||
bool "Aries M100PFSEVP evaluation platform for MPFS"
|
||||
depends on ARCH_CHIP_MPFS
|
||||
select CONFIG_MPFS_EMMCSD_MUX_GPIO if !MPFS_WITH_QEMU
|
||||
---help---
|
||||
This is the board configuration for the port of NuttX to the
|
||||
MicroChip m100pfsevp-mpfs board. This board features the RISC-V MPFS.
|
||||
bool "Aries M100PFSEVP evaluation platform for MPFS"
|
||||
depends on ARCH_CHIP_MPFS
|
||||
select CONFIG_MPFS_EMMCSD_MUX_GPIO if !MPFS_WITH_QEMU
|
||||
---help---
|
||||
This is the board configuration for the port of NuttX to the
|
||||
MicroChip m100pfsevp-mpfs board. This board features the RISC-V MPFS.
|
||||
|
||||
config ARCH_BOARD_MAX32660_EVSYS
|
||||
bool "Maxim Integrated MAX32660-EVSYS"
|
||||
@ -1511,22 +1511,22 @@ config ARCH_BOARD_SABRE_6QUAD
|
||||
board featuring the iMX 6Quad CPU.
|
||||
|
||||
config ARCH_BOARD_SAMA5D2_XULT
|
||||
bool "Atmel SAMA5D2 Xplained Ultra development board"
|
||||
depends on ARCH_CHIP_ATSAMA5D27
|
||||
select ARCH_HAVE_LEDS
|
||||
select ARCH_HAVE_BUTTONS
|
||||
select ARCH_HAVE_IRQBUTTONS
|
||||
---help---
|
||||
The port of NuttX to the Atmel SAMA5D2-XULT development board
|
||||
bool "Atmel SAMA5D2 Xplained Ultra development board"
|
||||
depends on ARCH_CHIP_ATSAMA5D27
|
||||
select ARCH_HAVE_LEDS
|
||||
select ARCH_HAVE_BUTTONS
|
||||
select ARCH_HAVE_IRQBUTTONS
|
||||
---help---
|
||||
The port of NuttX to the Atmel SAMA5D2-XULT development board
|
||||
|
||||
config ARCH_BOARD_GIANT_BOARD
|
||||
bool "Groboards Giant Board (SAMA5D27C-D1G)"
|
||||
depends on ARCH_CHIP_ATSAMA5D27
|
||||
select SAMA5D27_GIANT_BOARD_492MHZ
|
||||
select SAMA5D27_GIANT_BOARD_492MHZ
|
||||
select ARCH_HAVE_LEDS
|
||||
---help---
|
||||
This options selects support for NuttX on the Groboards Giant Board,
|
||||
featuring the SAMA5D27C-D1G SIP with 128MB DDR2 RAM.
|
||||
This options selects support for NuttX on the Groboards Giant Board,
|
||||
featuring the SAMA5D27C-D1G SIP with 128MB DDR2 RAM.
|
||||
|
||||
config ARCH_BOARD_SAMA5D3X_EK
|
||||
bool "Atmel SAMA5D3x-EK development board"
|
||||
@ -2084,7 +2084,7 @@ config ARCH_BOARD_TEENSY_LC
|
||||
select ARCH_HAVE_LEDS
|
||||
---help---
|
||||
This is the configuration for the Teensy LC board.
|
||||
See https://www.pjrc.com/teensy/teensyLC.html. The
|
||||
See https://www.pjrc.com/teensy/teensyLC.html. The
|
||||
Teensy LC is based on the Freescale KL25Z.
|
||||
|
||||
config ARCH_BOARD_TM4C123G_LAUNCHPAD
|
||||
@ -2497,7 +2497,7 @@ config ARCH_BOARD
|
||||
default "s32k144evb" if ARCH_BOARD_S32K144EVB
|
||||
default "ucans32k146" if ARCH_BOARD_UCANS32K146
|
||||
default "rv32m1-vega" if ARCH_BOARD_RV32M1_VEGA
|
||||
default "rv32-virt" if ARCH_BOARD_QEMU_RV32_VIRT
|
||||
default "rv32-virt" if ARCH_BOARD_QEMU_RV32_VIRT
|
||||
default "s32k146evb" if ARCH_BOARD_S32K146EVB
|
||||
default "s32k148evb" if ARCH_BOARD_S32K148EVB
|
||||
default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD
|
||||
|
@ -5,26 +5,26 @@
|
||||
|
||||
if ARCH_BOARD_IMXRT1020_EVK
|
||||
choice
|
||||
prompt "Boot Flash"
|
||||
default IMXRT1020_EVK_HYPER_FLASH
|
||||
prompt "Boot Flash"
|
||||
default IMXRT1020_EVK_HYPER_FLASH
|
||||
|
||||
config IMXRT1020_EVK_HYPER_FLASH
|
||||
bool "HYPER Flash"
|
||||
bool "HYPER Flash"
|
||||
|
||||
config IMXRT1020_EVK_QSPI_FLASH
|
||||
bool "QSPI Flash"
|
||||
bool "QSPI Flash"
|
||||
|
||||
endchoice # Boot Flash
|
||||
|
||||
config IMXRT1020_EVK_SDRAM
|
||||
bool "Enable SDRAM"
|
||||
default n
|
||||
select IMXRT_SEMC_INIT_DONE
|
||||
---help---
|
||||
Activate DCD configuration of SDRAM
|
||||
bool "Enable SDRAM"
|
||||
default n
|
||||
select IMXRT_SEMC_INIT_DONE
|
||||
---help---
|
||||
Activate DCD configuration of SDRAM
|
||||
|
||||
config HAVE_LEDS
|
||||
bool "Have user leds"
|
||||
default y
|
||||
select ARCH_HAVE_LEDS
|
||||
bool "Have user leds"
|
||||
default y
|
||||
select ARCH_HAVE_LEDS
|
||||
endif
|
||||
|
@ -40,8 +40,8 @@ config SAMA5_SDMMC
|
||||
select SDIO_DMA
|
||||
select SCHED_WORKQUEUE
|
||||
select SCHED_HPWORK
|
||||
select MMCSD
|
||||
select MMCSD_SDIO
|
||||
select MMCSD
|
||||
select MMCSD_SDIO
|
||||
select SDIO_BLOCKSETUP
|
||||
select ARCH_HAVE_SDIO
|
||||
select SAMA5_SDMMC_DMA
|
||||
@ -49,87 +49,87 @@ config SAMA5_SDMMC
|
||||
Enable SD Card interface SDMMC0. Selects SAMA5_SDMMC SAMA5_SDMMC0 SAMA5_SDMMC_DMA SDIO_DMA SCHED_WORKQUEUE SCHED_HPWORK SDIO_BLOCKSETUP
|
||||
|
||||
config SAMA5_SDMMC0
|
||||
bool "Enable SDMMC0 (built-in eMMC)"
|
||||
default n if SAMA5_SDMMC
|
||||
depends on SAMA5_SDMMC
|
||||
bool "Enable SDMMC0 (built-in eMMC)"
|
||||
default n if SAMA5_SDMMC
|
||||
depends on SAMA5_SDMMC
|
||||
|
||||
config SAMA5_SDMMC0_SIZE
|
||||
int "SDMMC0 size in bytes"
|
||||
default 4294967296
|
||||
depends on SAMA5_SDMMC0
|
||||
---help---
|
||||
Size of eMMC flash in bytes. Default: 4GB
|
||||
int "SDMMC0 size in bytes"
|
||||
default 4294967296
|
||||
depends on SAMA5_SDMMC0
|
||||
---help---
|
||||
Size of eMMC flash in bytes. Default: 4GB
|
||||
|
||||
config SAMA5D27_SDMMC0_MOUNT
|
||||
bool "Mount SDMMC0 at startup"
|
||||
default n
|
||||
depends on SAMA5_SDMMC0
|
||||
bool "Mount SDMMC0 at startup"
|
||||
default n
|
||||
depends on SAMA5_SDMMC0
|
||||
|
||||
config SAMA5D27_SDMMC0_MOUNT_BLKDEV
|
||||
string "SDMMC0 block device name"
|
||||
default "mmc0"
|
||||
depends on SAMA5_SDMMC0
|
||||
string "SDMMC0 block device name"
|
||||
default "mmc0"
|
||||
depends on SAMA5_SDMMC0
|
||||
|
||||
config SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT
|
||||
string "SDMMC0 mountpoint"
|
||||
default "/mnt/sdmmc0"
|
||||
depends on SAMA5_SDMMC0
|
||||
string "SDMMC0 mountpoint"
|
||||
default "/mnt/sdmmc0"
|
||||
depends on SAMA5_SDMMC0
|
||||
|
||||
config SAMA5D27_SDMMC0_MOUNT_FSTYPE
|
||||
string "SDMMC0 file system type"
|
||||
default "vfat"
|
||||
depends on SAMA5_SDMMC0
|
||||
string "SDMMC0 file system type"
|
||||
default "vfat"
|
||||
depends on SAMA5_SDMMC0
|
||||
|
||||
config CONFIG_SAMA5_SDMMC1_WIDTH_D1_D8
|
||||
bool "SDMMC0 data bus width 8 bits"
|
||||
default y
|
||||
depends on SAMA5_SDMMC0
|
||||
bool "SDMMC0 data bus width 8 bits"
|
||||
default y
|
||||
depends on SAMA5_SDMMC0
|
||||
|
||||
config SAMA5_SDMMC1
|
||||
bool "Enable SDMMC1"
|
||||
bool "Enable SDMMC1"
|
||||
default y if SAMA5_SDMMC
|
||||
select SAMA5_SDMMC1_WIDTH_D1_D4
|
||||
depends on SAMA5_SDMMC
|
||||
select SAMA5_SDMMC1_WIDTH_D1_D4
|
||||
depends on SAMA5_SDMMC
|
||||
|
||||
config SAMA5_SDMMC1_SIZE
|
||||
int "SDMMC1 size in bytes"
|
||||
default 1073741824
|
||||
depends on SAMA5_SDMMC1
|
||||
default 1073741824
|
||||
depends on SAMA5_SDMMC1
|
||||
---help---
|
||||
Size of SD Card in bytes. Default: 16GB
|
||||
|
||||
config SAMA5D27_SDMMC1_MOUNT
|
||||
bool "Mount SDMMC1 at startup"
|
||||
default n
|
||||
depends on SAMA5_SDMMC1
|
||||
bool "Mount SDMMC1 at startup"
|
||||
default n
|
||||
depends on SAMA5_SDMMC1
|
||||
|
||||
config SAMA5D27_SDMMC1_MOUNT_BLKDEV
|
||||
string "SDMMC1 block device name"
|
||||
default "mmc1"
|
||||
depends on SAMA5_SDMMC1
|
||||
string "SDMMC1 block device name"
|
||||
default "mmc1"
|
||||
depends on SAMA5_SDMMC1
|
||||
|
||||
config SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT
|
||||
string "SDMMC1 mountpoint"
|
||||
default "/mnt/sdmmc1"
|
||||
depends on SAMA5_SDMMC1
|
||||
string "SDMMC1 mountpoint"
|
||||
default "/mnt/sdmmc1"
|
||||
depends on SAMA5_SDMMC1
|
||||
|
||||
config SAMA5D27_SDMMC1_MOUNT_FSTYPE
|
||||
string "SDMMC1 file system type"
|
||||
default "vfat"
|
||||
depends on SAMA5_SDMMC1
|
||||
string "SDMMC1 file system type"
|
||||
default "vfat"
|
||||
depends on SAMA5_SDMMC1
|
||||
|
||||
config MMCSD_HAVE_CARDDETECT
|
||||
bool "SDMMC1 card detect"
|
||||
default y
|
||||
depends on SAMA5_SDMMC1
|
||||
bool "SDMMC1 card detect"
|
||||
default y
|
||||
depends on SAMA5_SDMMC1
|
||||
|
||||
config SAMA5_SDMMC1_WIDTH_D1_D4
|
||||
bool "SDMMC1 data bus width 4 bits"
|
||||
default y
|
||||
depends on SAMA5_SDMMC1
|
||||
bool "SDMMC1 data bus width 4 bits"
|
||||
default y
|
||||
depends on SAMA5_SDMMC1
|
||||
|
||||
config SAMA5_SYSTEMRESET
|
||||
bool "Enable system reset - this will enable the nsh reboot command"
|
||||
select BOARDCTL_RESET
|
||||
bool "Enable system reset - this will enable the nsh reboot command"
|
||||
select BOARDCTL_RESET
|
||||
|
||||
endif # ARCH_BOARD_SAMA5D2_XULT
|
||||
|
@ -8,12 +8,12 @@ if ARCH_BOARD_B_G431B_ESC1
|
||||
if STM32_FOC
|
||||
|
||||
config BOARD_STM32_BG431BESC1_FOC_VBUS
|
||||
bool "B-G431B-ESC1 board VBUS sense"
|
||||
default n
|
||||
bool "B-G431B-ESC1 board VBUS sense"
|
||||
default n
|
||||
|
||||
config BOARD_STM32_BG431BESC1_FOC_POT
|
||||
bool "B-G431B-ESC1 board POT support"
|
||||
default n
|
||||
bool "B-G431B-ESC1 board POT support"
|
||||
default n
|
||||
|
||||
endif # STM32_FOC
|
||||
|
||||
|
@ -4,67 +4,67 @@
|
||||
#
|
||||
|
||||
config BOARD_STM32_COMMON
|
||||
bool "Board common logic"
|
||||
default n
|
||||
---help---
|
||||
Board common logic located in each board/common folder.
|
||||
bool "Board common logic"
|
||||
default n
|
||||
---help---
|
||||
Board common logic located in each board/common folder.
|
||||
|
||||
if BOARD_STM32_COMMON
|
||||
|
||||
if STM32_FOC
|
||||
|
||||
menuconfig BOARD_STM32_IHM07M1
|
||||
bool "X-NUCLEO-IHM07M1 board support"
|
||||
default n
|
||||
---help---
|
||||
Board based on the L6230 DMOS driver.
|
||||
bool "X-NUCLEO-IHM07M1 board support"
|
||||
default n
|
||||
---help---
|
||||
Board based on the L6230 DMOS driver.
|
||||
|
||||
if BOARD_STM32_IHM07M1
|
||||
|
||||
config BOARD_STM32_IHM07M1_VBUS
|
||||
bool "X-NUCLEO-IHM07M1 board VBUS sense"
|
||||
default n
|
||||
bool "X-NUCLEO-IHM07M1 board VBUS sense"
|
||||
default n
|
||||
|
||||
config BOARD_STM32_IHM07M1_POT
|
||||
bool "X-NUCLEO-IHM07M1 board POT support"
|
||||
default n
|
||||
bool "X-NUCLEO-IHM07M1 board POT support"
|
||||
default n
|
||||
|
||||
endif # BOARD_STM32_IHM07M1
|
||||
|
||||
menuconfig BOARD_STM32_IHM08M1
|
||||
bool "X-NUCLEO-IHM08M1 board support"
|
||||
default n
|
||||
select STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
---help---
|
||||
Board based on the discrete L6398 gate drivers and STL220N6F7 POWER MOSFETs.
|
||||
bool "X-NUCLEO-IHM08M1 board support"
|
||||
default n
|
||||
select STM32_FOC_HAS_PWM_COMPLEMENTARY
|
||||
---help---
|
||||
Board based on the discrete L6398 gate drivers and STL220N6F7 POWER MOSFETs.
|
||||
|
||||
if BOARD_STM32_IHM08M1
|
||||
|
||||
config BOARD_STM32_IHM08M1_VBUS
|
||||
bool "X-NUCLEO-IHM08M1 board VBUS sense"
|
||||
default n
|
||||
bool "X-NUCLEO-IHM08M1 board VBUS sense"
|
||||
default n
|
||||
|
||||
config BOARD_STM32_IHM08M1_POT
|
||||
bool "X-NUCLEO-IHM08M1 board POT support"
|
||||
default n
|
||||
bool "X-NUCLEO-IHM08M1 board POT support"
|
||||
default n
|
||||
|
||||
endif # BOARD_STM32_IHM08M1
|
||||
|
||||
menuconfig BOARD_STM32_IHM16M1
|
||||
bool "X-NUCLEO-IHM16M1 board support"
|
||||
default n
|
||||
---help---
|
||||
Board based on the STSPIN830 three-phase brushless motor driver.
|
||||
bool "X-NUCLEO-IHM16M1 board support"
|
||||
default n
|
||||
---help---
|
||||
Board based on the STSPIN830 three-phase brushless motor driver.
|
||||
|
||||
if BOARD_STM32_IHM16M1
|
||||
|
||||
config BOARD_STM32_IHM16M1_VBUS
|
||||
bool "X-NUCLEO-IHM16M1 board VBUS sense"
|
||||
default n
|
||||
bool "X-NUCLEO-IHM16M1 board VBUS sense"
|
||||
default n
|
||||
|
||||
config BOARD_STM32_IHM16M1_POT
|
||||
bool "X-NUCLEO-IHM16M1 board POT support"
|
||||
default n
|
||||
bool "X-NUCLEO-IHM16M1 board POT support"
|
||||
default n
|
||||
|
||||
endif # BOARD_STM32_IHM16M1
|
||||
|
||||
@ -73,8 +73,8 @@ endif # STM32_FOC
|
||||
if SENSORS_HALL3PHASE
|
||||
|
||||
config BOARD_STM32_HALL3PHASE_SAMPLES
|
||||
int "3-phase Hall effect sensor number of samples"
|
||||
default 10
|
||||
int "3-phase Hall effect sensor number of samples"
|
||||
default 10
|
||||
|
||||
endif # SENSORS_HALL3PHASE
|
||||
|
||||
|
@ -16,7 +16,7 @@ config STM32_OLIMEXP407_PRIO
|
||||
depends on USBHOST
|
||||
|
||||
config STM32_OLIMEXP407_UEXT_USART3
|
||||
bool "Enable UEXT USART3"
|
||||
default n
|
||||
bool "Enable UEXT USART3"
|
||||
default n
|
||||
|
||||
endif
|
||||
|
@ -6,25 +6,25 @@
|
||||
if ARCH_BOARD_NUCLEO_H743ZI
|
||||
|
||||
config STM32_ROMFS
|
||||
bool "Automount baked-in ROMFS image"
|
||||
default n
|
||||
depends on FS_ROMFS
|
||||
---help---
|
||||
Select STM32_ROMFS_IMAGEFILE, STM32_ROMFS_DEV_MINOR, STM32_ROMFS_MOUNTPOINT
|
||||
bool "Automount baked-in ROMFS image"
|
||||
default n
|
||||
depends on FS_ROMFS
|
||||
---help---
|
||||
Select STM32_ROMFS_IMAGEFILE, STM32_ROMFS_DEV_MINOR, STM32_ROMFS_MOUNTPOINT
|
||||
|
||||
config STM32_ROMFS_DEV_MINOR
|
||||
int "Minor for the block device backing the data"
|
||||
depends on STM32_ROMFS
|
||||
default 64
|
||||
int "Minor for the block device backing the data"
|
||||
depends on STM32_ROMFS
|
||||
default 64
|
||||
|
||||
config STM32_ROMFS_MOUNTPOINT
|
||||
string "Mountpoint of the custom romfs image"
|
||||
depends on STM32_ROMFS
|
||||
default "/rom"
|
||||
string "Mountpoint of the custom romfs image"
|
||||
depends on STM32_ROMFS
|
||||
default "/rom"
|
||||
|
||||
config STM32_ROMFS_IMAGEFILE
|
||||
string "ROMFS image file to include into build"
|
||||
depends on STM32_ROMFS
|
||||
default "../../../rom.img"
|
||||
string "ROMFS image file to include into build"
|
||||
depends on STM32_ROMFS
|
||||
default "../../../rom.img"
|
||||
|
||||
endif # ARCH_BOARD_NUCLEO_H743ZI
|
||||
|
@ -8,7 +8,7 @@ if ARCH_BOARD_RV32M1_VEGA
|
||||
config RV32M1_OPENISA_TOOLCHAIN
|
||||
bool "Utilize OPEN ISA Toolchain"
|
||||
default n
|
||||
select ARCH_RISCV_INTXCPT_EXTENSIONS
|
||||
select ARCH_RISCV_INTXCPT_EXTENSIONS
|
||||
---help---
|
||||
With OPEN ISA Toolchain, RV32M1 RISC-V Core Capability can be exploited.
|
||||
|
||||
|
@ -44,19 +44,19 @@ config D0WD_PSRAM_CLK_IO
|
||||
int "PSRAM CLK IO number"
|
||||
range 0 33
|
||||
default 17
|
||||
help
|
||||
The PSRAM CLOCK IO can be any unused GPIO, user can config it
|
||||
based on hardware design. If user use 1.8V flash and 1.8V psram,
|
||||
this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
|
||||
---help---
|
||||
The PSRAM CLOCK IO can be any unused GPIO, user can config it
|
||||
based on hardware design. If user use 1.8V flash and 1.8V psram,
|
||||
this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
|
||||
|
||||
config D0WD_PSRAM_CS_IO
|
||||
int "PSRAM CS IO number"
|
||||
range 0 33
|
||||
default 16
|
||||
help
|
||||
The PSRAM CS IO can be any unused GPIO, user can config it based
|
||||
on hardware design. If user use 1.8V flash and 1.8V psram, this
|
||||
value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
|
||||
---help---
|
||||
The PSRAM CS IO can be any unused GPIO, user can config it based
|
||||
on hardware design. If user use 1.8V flash and 1.8V psram, this
|
||||
value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
|
||||
endmenu
|
||||
|
||||
menu "PSRAM clock and cs IO for ESP32-D2WD"
|
||||
@ -64,19 +64,19 @@ config D2WD_PSRAM_CLK_IO
|
||||
int "PSRAM CLK IO number"
|
||||
range 0 33
|
||||
default 9
|
||||
help
|
||||
User can config it based on hardware design. For ESP32-D2WD chip,
|
||||
the psram can only be 1.8V psram, so this value can only be one
|
||||
of 6, 7, 8, 9, 10, 11, 16, 17.
|
||||
---help---
|
||||
User can config it based on hardware design. For ESP32-D2WD chip,
|
||||
the psram can only be 1.8V psram, so this value can only be one
|
||||
of 6, 7, 8, 9, 10, 11, 16, 17.
|
||||
|
||||
config D2WD_PSRAM_CS_IO
|
||||
int "PSRAM CS IO number"
|
||||
range 0 33
|
||||
default 10
|
||||
help
|
||||
User can config it based on hardware design. For ESP32-D2WD chip,
|
||||
the psram can only be 1.8V psram, so this value can only be one
|
||||
of 6, 7, 8, 9, 10, 11, 16, 17.
|
||||
---help---
|
||||
User can config it based on hardware design. For ESP32-D2WD chip,
|
||||
the psram can only be 1.8V psram, so this value can only be one
|
||||
of 6, 7, 8, 9, 10, 11, 16, 17.
|
||||
endmenu
|
||||
|
||||
menu "PSRAM clock and cs IO for ESP32-PICO"
|
||||
@ -84,34 +84,34 @@ config PICO_PSRAM_CS_IO
|
||||
int "PSRAM CS IO number"
|
||||
range 0 33
|
||||
default 10
|
||||
help
|
||||
The PSRAM CS IO can be any unused GPIO, user can config it based on
|
||||
hardware design.
|
||||
For ESP32-PICO chip, the psram share clock with flash, so user do
|
||||
not need to configure the clock IO.
|
||||
For the reference hardware design, please refer to
|
||||
https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf
|
||||
---help---
|
||||
The PSRAM CS IO can be any unused GPIO, user can config it based on
|
||||
hardware design.
|
||||
For ESP32-PICO chip, the psram share clock with flash, so user do
|
||||
not need to configure the clock IO.
|
||||
For the reference hardware design, please refer to
|
||||
https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf
|
||||
endmenu
|
||||
|
||||
config ESP32_SPIRAM_SPIWP_SD3_PIN
|
||||
int "SPI PSRAM WP(SD3) Pin when customising pins via eFuse (read help)"
|
||||
range 0 33
|
||||
default 7
|
||||
help
|
||||
This value is ignored unless flash mode is set to DIO or DOUT and
|
||||
the SPI flash pins have been overridden by setting the eFuses
|
||||
SPI_PAD_CONFIG_xxx.
|
||||
---help---
|
||||
This value is ignored unless flash mode is set to DIO or DOUT and
|
||||
the SPI flash pins have been overridden by setting the eFuses
|
||||
SPI_PAD_CONFIG_xxx.
|
||||
|
||||
When this is the case, the eFuse config only defines 3 of the 4
|
||||
Quad I/O data pins. The WP pin (aka ESP32 pin "SD_DATA_3" or SPI
|
||||
flash pin "IO2") is not specified in eFuse. And the psram only
|
||||
has QPI mode, the WP pin is necessary, so we need to configure
|
||||
this value here.
|
||||
When this is the case, the eFuse config only defines 3 of the 4
|
||||
Quad I/O data pins. The WP pin (aka ESP32 pin "SD_DATA_3" or SPI
|
||||
flash pin "IO2") is not specified in eFuse. And the psram only
|
||||
has QPI mode, the WP pin is necessary, so we need to configure
|
||||
this value here.
|
||||
|
||||
When flash mode is set to QIO or QOUT, the PSRAM WP pin will be
|
||||
set as the value configured in bootloader.
|
||||
When flash mode is set to QIO or QOUT, the PSRAM WP pin will be
|
||||
set as the value configured in bootloader.
|
||||
|
||||
For ESP32-PICO chip, the default value of this config should be 7.
|
||||
For ESP32-PICO chip, the default value of this config should be 7.
|
||||
|
||||
endif # ESP32_PSRAM
|
||||
|
||||
|
@ -46,15 +46,15 @@ config I2C_BITBANG
|
||||
|
||||
if I2C_BITBANG
|
||||
|
||||
config I2C_BITBANG_NO_DELAY
|
||||
bool "Do not add delay"
|
||||
default n
|
||||
---help---
|
||||
If you want to go full speed (depending on how fast pins can be toggled)
|
||||
you can enable this option. This will not respect the desired frequency
|
||||
set during the I2C transfer operation.
|
||||
config I2C_BITBANG_NO_DELAY
|
||||
bool "Do not add delay"
|
||||
default n
|
||||
---help---
|
||||
If you want to go full speed (depending on how fast pins can be toggled)
|
||||
you can enable this option. This will not respect the desired frequency
|
||||
set during the I2C transfer operation.
|
||||
|
||||
config I2C_BITBANG_GPIO_OVERHEAD
|
||||
config I2C_BITBANG_GPIO_OVERHEAD
|
||||
int "GPIO overhead"
|
||||
depends on !I2C_BITBANG_NO_DELAY
|
||||
default 0
|
||||
@ -63,13 +63,13 @@ if I2C_BITBANG
|
||||
delays. This overhead will be subtracted from sleep times to achieve
|
||||
desired frquency.
|
||||
|
||||
config I2C_BITBANG_TIMEOUT
|
||||
config I2C_BITBANG_TIMEOUT
|
||||
int "I2C timeout"
|
||||
default 1000
|
||||
---help---
|
||||
Timeout (microseconds) to abort wait on slave
|
||||
|
||||
config I2C_BITBANG_CLOCK_STRETCHING
|
||||
config I2C_BITBANG_CLOCK_STRETCHING
|
||||
bool "Support clock stretching"
|
||||
default n
|
||||
---help---
|
||||
|
@ -551,7 +551,7 @@ config INPUT_SPQ10KBD
|
||||
if INPUT_SPQ10KBD
|
||||
|
||||
config SPQ10KBD_DJOY
|
||||
bool "Joystick Interface for Buttons"
|
||||
bool "Joystick Interface for Buttons"
|
||||
select INPUT_DJOYSTICK
|
||||
default n
|
||||
|
||||
|
@ -1,31 +1,31 @@
|
||||
menuconfig MOTOR_FOC
|
||||
bool "FOC (Field Oriented Controller) driver support"
|
||||
default n
|
||||
---help---
|
||||
Enables building of the "upper-half" FOC driver.
|
||||
bool "FOC (Field Oriented Controller) driver support"
|
||||
default n
|
||||
---help---
|
||||
Enables building of the "upper-half" FOC driver.
|
||||
|
||||
if MOTOR_FOC
|
||||
|
||||
config MOTOR_FOC_INST
|
||||
int "FOC instances"
|
||||
default 1
|
||||
int "FOC instances"
|
||||
default 1
|
||||
|
||||
config MOTOR_FOC_PHASES
|
||||
int "FOC phases number"
|
||||
default 3
|
||||
int "FOC phases number"
|
||||
default 3
|
||||
|
||||
config MOTOR_FOC_SHUNTS
|
||||
int "FOC number of shunts"
|
||||
range 1 3
|
||||
default 3
|
||||
---help---
|
||||
Number of shunts supported (or other types of current sensors).
|
||||
Any current reconstruction must be done on the lower-half side.
|
||||
int "FOC number of shunts"
|
||||
range 1 3
|
||||
default 3
|
||||
---help---
|
||||
Number of shunts supported (or other types of current sensors).
|
||||
Any current reconstruction must be done on the lower-half side.
|
||||
|
||||
config MOTOR_FOC_TRACE
|
||||
bool "FOC trace support"
|
||||
default n
|
||||
---help---
|
||||
Enables FOC driver trace interface.
|
||||
bool "FOC trace support"
|
||||
default n
|
||||
---help---
|
||||
Enables FOC driver trace interface.
|
||||
|
||||
endif #MOTOR_FOC
|
||||
|
@ -476,7 +476,7 @@ if (ARCH_PHY_100BASE_T1)
|
||||
choice
|
||||
prompt "Automotive Ethernet 100BASE-T1 master/slave mode"
|
||||
default PHY_100BASE_T1_SLAVE
|
||||
---help---
|
||||
---help---
|
||||
Automotive Ethernet 100BASE-T1 requires the PHY to be configured
|
||||
in either master or slave mode.
|
||||
|
||||
|
@ -189,7 +189,7 @@ config SENSORS_DS18B20_POLL_INTERVAL
|
||||
int "Polling interval in microseconds, default 1 sec"
|
||||
depends on SENSORS_DS18B20 && SENSORS_DS18B20_POLL
|
||||
default 1000000
|
||||
range 0 4294967295
|
||||
range 0 4294967295
|
||||
---help---
|
||||
The interval until a new sensor measurement will be triggered.
|
||||
|
||||
@ -826,11 +826,11 @@ config SGP30_DEBUG
|
||||
endif # SENSORS_SGP30
|
||||
|
||||
config SENSORS_AHT10
|
||||
bool "ASAIR AHT10 temperature and humidity sensor"
|
||||
default n
|
||||
select I2C
|
||||
---help---
|
||||
Enable driver support for the ASAIR AHT10 temperature and humidity sensors.
|
||||
bool "ASAIR AHT10 temperature and humidity sensor"
|
||||
default n
|
||||
select I2C
|
||||
---help---
|
||||
Enable driver support for the ASAIR AHT10 temperature and humidity sensors.
|
||||
|
||||
if SENSORS_AHT10
|
||||
config AHT10_I2C_FREQUENCY
|
||||
@ -992,12 +992,12 @@ config SENSORS_HDC1008
|
||||
if SENSORS_HDC1008
|
||||
|
||||
config HDC1008_I2C_ADDRESS
|
||||
hex "HDC1008 I2C address"
|
||||
default 0x40
|
||||
range 0x40 0x43
|
||||
---help---
|
||||
The I2C address of the HDC1008 sensor. It can be configured via straps to
|
||||
a value between 0x40 and 0x43.
|
||||
hex "HDC1008 I2C address"
|
||||
default 0x40
|
||||
range 0x40 0x43
|
||||
---help---
|
||||
The I2C address of the HDC1008 sensor. It can be configured via straps to
|
||||
a value between 0x40 and 0x43.
|
||||
|
||||
config HDC1008_I2C_FREQUENCY
|
||||
int "HDC1008 I2C frequency"
|
||||
|
@ -162,7 +162,7 @@ config SYSLOG_PRIORITY
|
||||
Prepend log priority (severity) to syslog message.
|
||||
|
||||
config SYSLOG_PROCESS_NAME
|
||||
bool "Prepend process name to syslog message"
|
||||
bool "Prepend process name to syslog message"
|
||||
default n
|
||||
---help---
|
||||
Prepend Process name to syslog message.
|
||||
|
@ -59,82 +59,82 @@ config VIDEO_STREAM
|
||||
if VIDEO_STREAM
|
||||
|
||||
config VIDEO_SCENE_BACKLIGHT
|
||||
bool "Enable backlight scene"
|
||||
default y
|
||||
---help---
|
||||
Enable backlight scene
|
||||
bool "Enable backlight scene"
|
||||
default y
|
||||
---help---
|
||||
Enable backlight scene
|
||||
|
||||
config VIDEO_SCENE_BEACHSNOW
|
||||
bool "Enable beach snow scene"
|
||||
default y
|
||||
---help---
|
||||
Enable beach snow scene
|
||||
bool "Enable beach snow scene"
|
||||
default y
|
||||
---help---
|
||||
Enable beach snow scene
|
||||
|
||||
config VIDEO_SCENE_CANDLELIGHT
|
||||
bool "Enable candle light scene"
|
||||
default y
|
||||
---help---
|
||||
Enable candle light scene
|
||||
bool "Enable candle light scene"
|
||||
default y
|
||||
---help---
|
||||
Enable candle light scene
|
||||
|
||||
config VIDEO_SCENE_DAWNDUSK
|
||||
bool "Enable dawn dusk scene"
|
||||
default y
|
||||
---help---
|
||||
Enable dawn dusk scene
|
||||
bool "Enable dawn dusk scene"
|
||||
default y
|
||||
---help---
|
||||
Enable dawn dusk scene
|
||||
|
||||
config VIDEO_SCENE_FALLCOLORS
|
||||
bool "Enable fall colors scene"
|
||||
default y
|
||||
---help---
|
||||
Enable fall colors scene
|
||||
bool "Enable fall colors scene"
|
||||
default y
|
||||
---help---
|
||||
Enable fall colors scene
|
||||
|
||||
config VIDEO_SCENE_FIREWORKS
|
||||
bool "Enable fireworks scene"
|
||||
default y
|
||||
---help---
|
||||
Enable fireworks scene
|
||||
bool "Enable fireworks scene"
|
||||
default y
|
||||
---help---
|
||||
Enable fireworks scene
|
||||
|
||||
config VIDEO_SCENE_LANDSCAPE
|
||||
bool "Enable landscape scene"
|
||||
default y
|
||||
---help---
|
||||
Enable landscape scene
|
||||
bool "Enable landscape scene"
|
||||
default y
|
||||
---help---
|
||||
Enable landscape scene
|
||||
|
||||
config VIDEO_SCENE_NIGHT
|
||||
bool "Enable night scene"
|
||||
default y
|
||||
---help---
|
||||
Enable night scene
|
||||
bool "Enable night scene"
|
||||
default y
|
||||
---help---
|
||||
Enable night scene
|
||||
|
||||
config VIDEO_SCENE_PARTYINDOOR
|
||||
bool "Enable party and indoor scene"
|
||||
default y
|
||||
---help---
|
||||
Enable party and indoor scene
|
||||
bool "Enable party and indoor scene"
|
||||
default y
|
||||
---help---
|
||||
Enable party and indoor scene
|
||||
|
||||
config VIDEO_SCENE_PORTRAIT
|
||||
bool "Enable portrait scene"
|
||||
default y
|
||||
---help---
|
||||
Enable portrait scene
|
||||
bool "Enable portrait scene"
|
||||
default y
|
||||
---help---
|
||||
Enable portrait scene
|
||||
|
||||
config VIDEO_SCENE_SPORTS
|
||||
bool "Enable sports scene"
|
||||
default y
|
||||
---help---
|
||||
Enable sports scene
|
||||
bool "Enable sports scene"
|
||||
default y
|
||||
---help---
|
||||
Enable sports scene
|
||||
|
||||
config VIDEO_SCENE_SUNSET
|
||||
bool "Enable sunset scene"
|
||||
default y
|
||||
---help---
|
||||
Enable sunset scene
|
||||
bool "Enable sunset scene"
|
||||
default y
|
||||
---help---
|
||||
Enable sunset scene
|
||||
|
||||
config VIDEO_SCENE_TEXT
|
||||
bool "Enable text scene"
|
||||
default y
|
||||
---help---
|
||||
Enable text scene
|
||||
bool "Enable text scene"
|
||||
default y
|
||||
---help---
|
||||
Enable text scene
|
||||
endif
|
||||
|
||||
config VIDEO_MAX7456
|
||||
@ -146,9 +146,9 @@ config VIDEO_MAX7456
|
||||
multiplexer.
|
||||
|
||||
config VIDEO_ISX012
|
||||
bool "ISX012 Image sensor"
|
||||
default n
|
||||
select I2C
|
||||
bool "ISX012 Image sensor"
|
||||
default n
|
||||
select I2C
|
||||
|
||||
config VIDEO_OV2640
|
||||
bool "OV2640 camera chip"
|
||||
|
@ -36,7 +36,7 @@ config SINC_BEST_CONVERTER
|
||||
bool "Slowest conversion speed with best quality"
|
||||
---help---
|
||||
Slowest conversion speed with best quality.
|
||||
Not suitable for most boards due to resource constrains.
|
||||
Not suitable for most boards due to resource constrains.
|
||||
|
||||
endchoice
|
||||
|
||||
|
@ -4,7 +4,7 @@
|
||||
#
|
||||
|
||||
config RISCV_MEMCPY
|
||||
bool "Enable optimized memcpy() for RISC-V"
|
||||
select LIBC_ARCH_MEMCPY
|
||||
---help---
|
||||
Enable optimized RISC-V specific memcpy() library function
|
||||
bool "Enable optimized memcpy() for RISC-V"
|
||||
select LIBC_ARCH_MEMCPY
|
||||
---help---
|
||||
Enable optimized RISC-V specific memcpy() library function
|
||||
|
@ -4,44 +4,44 @@
|
||||
#
|
||||
|
||||
config XTENSA_MEMCPY
|
||||
bool "Enable optimized memcpy() for XTENSA"
|
||||
select LIBC_ARCH_MEMCPY
|
||||
---help---
|
||||
Enable optimized XTENSA specific memcpy() library function
|
||||
bool "Enable optimized memcpy() for XTENSA"
|
||||
select LIBC_ARCH_MEMCPY
|
||||
---help---
|
||||
Enable optimized XTENSA specific memcpy() library function
|
||||
|
||||
config XTENSA_MEMMOVE
|
||||
bool "Enable optimized memmove() for XTENSA"
|
||||
select LIBC_ARCH_MEMMOVE
|
||||
---help---
|
||||
Enable optimized XTENSA specific memmove() library function
|
||||
bool "Enable optimized memmove() for XTENSA"
|
||||
select LIBC_ARCH_MEMMOVE
|
||||
---help---
|
||||
Enable optimized XTENSA specific memmove() library function
|
||||
|
||||
config XTENSA_MEMSET
|
||||
bool "Enable optimized memset() for XTENSA"
|
||||
select LIBC_ARCH_MEMSET
|
||||
---help---
|
||||
Enable optimized XTENSA specific memset() library function
|
||||
bool "Enable optimized memset() for XTENSA"
|
||||
select LIBC_ARCH_MEMSET
|
||||
---help---
|
||||
Enable optimized XTENSA specific memset() library function
|
||||
|
||||
config XTENSA_STRCMP
|
||||
bool "Enable optimized strcmp() for XTENSA"
|
||||
select LIBC_ARCH_STRCMP
|
||||
---help---
|
||||
Enable optimized XTENSA specific strcmp() library function
|
||||
bool "Enable optimized strcmp() for XTENSA"
|
||||
select LIBC_ARCH_STRCMP
|
||||
---help---
|
||||
Enable optimized XTENSA specific strcmp() library function
|
||||
|
||||
config XTENSA_STRCPY
|
||||
bool "Enable optimized strcpy() for XTENSA"
|
||||
select LIBC_ARCH_STRCPY
|
||||
---help---
|
||||
Enable optimized XTENSA specific strcpy() library function
|
||||
bool "Enable optimized strcpy() for XTENSA"
|
||||
select LIBC_ARCH_STRCPY
|
||||
---help---
|
||||
Enable optimized XTENSA specific strcpy() library function
|
||||
|
||||
config XTENSA_STRLEN
|
||||
bool "Enable optimized strlen() for XTENSA"
|
||||
select LIBC_ARCH_STRLEN
|
||||
---help---
|
||||
Enable optimized XTENSA specific strlen() library function
|
||||
bool "Enable optimized strlen() for XTENSA"
|
||||
select LIBC_ARCH_STRLEN
|
||||
---help---
|
||||
Enable optimized XTENSA specific strlen() library function
|
||||
|
||||
config XTENSA_STRNCPY
|
||||
bool "Enable optimized strncpy() for XTENSA"
|
||||
select LIBC_ARCH_STRNCPY
|
||||
---help---
|
||||
Enable optimized XTENSA specific strncpy() library function
|
||||
bool "Enable optimized strncpy() for XTENSA"
|
||||
select LIBC_ARCH_STRNCPY
|
||||
---help---
|
||||
Enable optimized XTENSA specific strncpy() library function
|
||||
|
||||
|
@ -6,7 +6,7 @@
|
||||
config ALLSYMS
|
||||
bool "Load all symbols for debugging"
|
||||
default n
|
||||
help
|
||||
Say Y here to let the nuttx print out symbolic crash information and
|
||||
symbolic stack backtraces. This increases the size of the nuttx
|
||||
somewhat, as all symbols have to be loaded into the nuttx image.
|
||||
---help---
|
||||
Say Y here to let the nuttx print out symbolic crash information and
|
||||
symbolic stack backtraces. This increases the size of the nuttx
|
||||
somewhat, as all symbols have to be loaded into the nuttx image.
|
||||
|
@ -52,8 +52,8 @@ config NET_CAN_RAW_TX_DEADLINE
|
||||
default n
|
||||
depends on NET_CAN_SOCK_OPTS && NET_CAN_HAVE_TX_DEADLINE
|
||||
---help---
|
||||
Note: Non-standard SocketCAN sockopt, but this options helps us in
|
||||
real-time use cases.
|
||||
Note: Non-standard SocketCAN sockopt, but this options helps us in
|
||||
real-time use cases.
|
||||
|
||||
When the CAN_RAW_TX_DEADLINE sockopt is enabled. The user can send
|
||||
CAN frames using sendmsg() function and add a deadline timespec
|
||||
|
@ -52,12 +52,12 @@ menuconfig WIRELESS_BLUETOOTH
|
||||
if WIRELESS_BLUETOOTH
|
||||
|
||||
menuconfig WIRELESS_BLUETOOTH_HOST
|
||||
bool "BLE Host Layer"
|
||||
default y
|
||||
---help---
|
||||
This enables support for BLE host layer implementation. This can be
|
||||
used to interface to a BLE controller via HCI protocol (either to a local
|
||||
BLE link-layer or to an external device over HCI UART).
|
||||
bool "BLE Host Layer"
|
||||
default y
|
||||
---help---
|
||||
This enables support for BLE host layer implementation. This can be
|
||||
used to interface to a BLE controller via HCI protocol (either to a local
|
||||
BLE link-layer or to an external device over HCI UART).
|
||||
|
||||
if WIRELESS_BLUETOOTH_HOST
|
||||
endif # WIRELESS_BLUETOOTH_HOST
|
||||
|
Loading…
Reference in New Issue
Block a user