armv7-a/r: use arm_timer to setup perf
Signed-off-by: ligd <liguiding1@xiaomi.com>
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5aeab4a36c
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@ -26,6 +26,7 @@
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#include <nuttx/clock.h>
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#include "arm_internal.h"
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#include "arm_timer.h"
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#include "sctlr.h"
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#ifdef CONFIG_ARCH_PERF_EVENTS
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@ -64,6 +65,13 @@ void up_perf_init(void *arg)
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{
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g_cpu_freq = (unsigned long)(uintptr_t)arg;
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#ifdef CONFIG_ARMV7A_HAVE_PTM
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if (g_cpu_freq == ULONG_MAX || g_cpu_freq == 0)
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{
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g_cpu_freq = arm_timer_get_freq();
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}
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#endif
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cp15_pmu_uer(PMUER_UME);
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cp15_pmu_pmcr(PMCR_E);
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cp15_pmu_cesr(PMCESR_CCES);
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@ -87,12 +87,6 @@ static const struct oneshot_operations_s g_arm_timer_ops =
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* Private Functions
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****************************************************************************/
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static inline uint32_t arm_timer_get_freq(void)
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{
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ARM_ISB();
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return CP15_GET(CNTFRQ);
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}
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static inline void arm_timer_set_freq(uint32_t freq)
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{
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CP15_SET(CNTFRQ, freq);
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@ -263,6 +257,12 @@ static int arm_timer_interrupt(int irq, void *context, void *arg)
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* Public Functions
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****************************************************************************/
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uint32_t arm_timer_get_freq(void)
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{
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ARM_ISB();
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return CP15_GET(CNTFRQ);
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}
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struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq)
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{
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struct arm_timer_lowerhalf_s *lower;
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@ -59,8 +59,10 @@ extern "C"
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#ifdef CONFIG_ARMV7A_HAVE_PTM
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struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq);
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uint32_t arm_timer_get_freq(void);
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#else
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# define arm_timer_initialize(freq) NULL
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# define arm_timer_get_freq() 0
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#endif
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#undef EXTERN
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@ -26,6 +26,7 @@
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#include <nuttx/clock.h>
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#include "arm_internal.h"
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#include "arm_timer.h"
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#include "sctlr.h"
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#ifdef CONFIG_ARCH_PERF_EVENTS
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@ -64,6 +65,13 @@ void up_perf_init(void *arg)
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{
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g_cpu_freq = (unsigned long)(uintptr_t)arg;
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#ifdef CONFIG_ARMV7R_HAVE_PTM
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if (g_cpu_freq == ULONG_MAX || g_cpu_freq == 0)
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{
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g_cpu_freq = arm_timer_get_freq();
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}
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#endif
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cp15_pmu_uer(PMUER_UME);
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cp15_pmu_pmcr(PMCR_E);
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cp15_pmu_cesr(PMCESR_CCES);
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@ -87,12 +87,6 @@ static const struct oneshot_operations_s g_arm_timer_ops =
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* Private Functions
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****************************************************************************/
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static inline uint32_t arm_timer_get_freq(void)
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{
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ARM_ISB();
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return CP15_GET(CNTFRQ);
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}
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static inline void arm_timer_set_freq(uint32_t freq)
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{
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CP15_SET(CNTFRQ, freq);
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@ -265,6 +259,12 @@ static int arm_timer_interrupt(int irq, void *context, void *arg)
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* Public Functions
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****************************************************************************/
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uint32_t arm_timer_get_freq(void)
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{
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ARM_ISB();
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return CP15_GET(CNTFRQ);
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}
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struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq)
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{
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struct arm_timer_lowerhalf_s *lower;
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@ -59,8 +59,10 @@ extern "C"
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#ifdef CONFIG_ARMV7R_HAVE_PTM
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struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq);
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uint32_t arm_timer_get_freq(void);
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#else
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# define arm_timer_initialize(freq) NULL
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# define arm_timer_get_freq() 0
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#endif
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#undef EXTERN
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@ -47,6 +47,10 @@
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void arm_boot(void)
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{
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/* Perf init */
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up_perf_init(0);
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/* Set the page table for section */
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goldfish_setupmappings();
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@ -47,6 +47,10 @@
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void arm_boot(void)
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{
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/* Perf init */
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up_perf_init(0);
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/* Set the page table for section */
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qemu_setupmappings();
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