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armv7-a/r: use arm_timer to setup perf

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Signed-off-by: ligd <liguiding1@xiaomi.com>
This commit is contained in:
ligd 2023-12-28 16:05:59 +08:00 committed by Xiang Xiao
parent 5aeab4a36c
commit 51d8bbfbd9
8 changed files with 40 additions and 12 deletions
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8
arch/arm/src/armv7-a/arm_perf.c
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@ -26,6 +26,7 @@
#include <nuttx/clock.h> #include <nuttx/clock.h>
#include "arm_internal.h" #include "arm_internal.h"
#include "arm_timer.h"
#include "sctlr.h" #include "sctlr.h"
#ifdef CONFIG_ARCH_PERF_EVENTS #ifdef CONFIG_ARCH_PERF_EVENTS
@ -64,6 +65,13 @@ void up_perf_init(void *arg)
{ {
g_cpu_freq = (unsigned long)(uintptr_t)arg; g_cpu_freq = (unsigned long)(uintptr_t)arg;
#ifdef CONFIG_ARMV7A_HAVE_PTM
if (g_cpu_freq == ULONG_MAX || g_cpu_freq == 0)
{
g_cpu_freq = arm_timer_get_freq();
}
#endif
cp15_pmu_uer(PMUER_UME); cp15_pmu_uer(PMUER_UME);
cp15_pmu_pmcr(PMCR_E); cp15_pmu_pmcr(PMCR_E);
cp15_pmu_cesr(PMCESR_CCES); cp15_pmu_cesr(PMCESR_CCES);

12
arch/arm/src/armv7-a/arm_timer.c
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@ -87,12 +87,6 @@ static const struct oneshot_operations_s g_arm_timer_ops =
* Private Functions * Private Functions
****************************************************************************/ ****************************************************************************/
static inline uint32_t arm_timer_get_freq(void)
{
ARM_ISB();
return CP15_GET(CNTFRQ);
}
static inline void arm_timer_set_freq(uint32_t freq) static inline void arm_timer_set_freq(uint32_t freq)
{ {
CP15_SET(CNTFRQ, freq); CP15_SET(CNTFRQ, freq);
@ -263,6 +257,12 @@ static int arm_timer_interrupt(int irq, void *context, void *arg)
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
uint32_t arm_timer_get_freq(void)
{
ARM_ISB();
return CP15_GET(CNTFRQ);
}
struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq) struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq)
{ {
struct arm_timer_lowerhalf_s *lower; struct arm_timer_lowerhalf_s *lower;

2
arch/arm/src/armv7-a/arm_timer.h
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@ -59,8 +59,10 @@ extern "C"
#ifdef CONFIG_ARMV7A_HAVE_PTM #ifdef CONFIG_ARMV7A_HAVE_PTM
struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq); struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq);
uint32_t arm_timer_get_freq(void);
#else #else
# define arm_timer_initialize(freq) NULL # define arm_timer_initialize(freq) NULL
# define arm_timer_get_freq() 0
#endif #endif
#undef EXTERN #undef EXTERN

8
arch/arm/src/armv7-r/arm_perf.c
View File

@ -26,6 +26,7 @@
#include <nuttx/clock.h> #include <nuttx/clock.h>
#include "arm_internal.h" #include "arm_internal.h"
#include "arm_timer.h"
#include "sctlr.h" #include "sctlr.h"
#ifdef CONFIG_ARCH_PERF_EVENTS #ifdef CONFIG_ARCH_PERF_EVENTS
@ -64,6 +65,13 @@ void up_perf_init(void *arg)
{ {
g_cpu_freq = (unsigned long)(uintptr_t)arg; g_cpu_freq = (unsigned long)(uintptr_t)arg;
#ifdef CONFIG_ARMV7R_HAVE_PTM
if (g_cpu_freq == ULONG_MAX || g_cpu_freq == 0)
{
g_cpu_freq = arm_timer_get_freq();
}
#endif
cp15_pmu_uer(PMUER_UME); cp15_pmu_uer(PMUER_UME);
cp15_pmu_pmcr(PMCR_E); cp15_pmu_pmcr(PMCR_E);
cp15_pmu_cesr(PMCESR_CCES); cp15_pmu_cesr(PMCESR_CCES);

12
arch/arm/src/armv7-r/arm_timer.c
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@ -87,12 +87,6 @@ static const struct oneshot_operations_s g_arm_timer_ops =
* Private Functions * Private Functions
****************************************************************************/ ****************************************************************************/
static inline uint32_t arm_timer_get_freq(void)
{
ARM_ISB();
return CP15_GET(CNTFRQ);
}
static inline void arm_timer_set_freq(uint32_t freq) static inline void arm_timer_set_freq(uint32_t freq)
{ {
CP15_SET(CNTFRQ, freq); CP15_SET(CNTFRQ, freq);
@ -265,6 +259,12 @@ static int arm_timer_interrupt(int irq, void *context, void *arg)
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
uint32_t arm_timer_get_freq(void)
{
ARM_ISB();
return CP15_GET(CNTFRQ);
}
struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq) struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq)
{ {
struct arm_timer_lowerhalf_s *lower; struct arm_timer_lowerhalf_s *lower;

2
arch/arm/src/armv7-r/arm_timer.h
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@ -59,8 +59,10 @@ extern "C"
#ifdef CONFIG_ARMV7R_HAVE_PTM #ifdef CONFIG_ARMV7R_HAVE_PTM
struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq); struct oneshot_lowerhalf_s *arm_timer_initialize(unsigned int freq);
uint32_t arm_timer_get_freq(void);
#else #else
# define arm_timer_initialize(freq) NULL # define arm_timer_initialize(freq) NULL
# define arm_timer_get_freq() 0
#endif #endif
#undef EXTERN #undef EXTERN

4
arch/arm/src/goldfish/goldfish_boot.c
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@ -47,6 +47,10 @@
void arm_boot(void) void arm_boot(void)
{ {
/* Perf init */
up_perf_init(0);
/* Set the page table for section */ /* Set the page table for section */
goldfish_setupmappings(); goldfish_setupmappings();

4
arch/arm/src/qemu/qemu_boot.c
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@ -47,6 +47,10 @@
void arm_boot(void) void arm_boot(void)
{ {
/* Perf init */
up_perf_init(0);
/* Set the page table for section */ /* Set the page table for section */
qemu_setupmappings(); qemu_setupmappings();