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Fix typographical naming error in STM32 U[S]ART bit defintiions.

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This commit is contained in:
Aleksandr Vyhovanec 2016-05-25 09:04:03 -06:00 committed by Gregory Nutt
parent 9a2002a302
commit 52c6cb1799
5 changed files with 19 additions and 19 deletions
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2
arch/arm/src/stm32/chip/stm32f20xxx_uart.h
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@ -199,7 +199,7 @@
#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */
#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */
#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */
#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
/* Guard time and prescaler register */

26
arch/arm/src/stm32/chip/stm32f30xxx_uart.h
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@ -218,19 +218,19 @@
#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */
#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */
#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */
#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
#define USART_CR1_OVRDIS (1 << 12) /* Bit 12: Overrun Disable */
#define USART_CR1_DDRE (1 << 13) /* Bit 13: DMA Disable on Reception Error */
#define USART_CR1_DEM (1 << 14) /* Bit 14: Driver enable mode */
#define USART_CR1_DEP (1 << 15) /* Bit 15: Driver enable polarity selection */
#define USART_CR1_SCARCNT_SHIFT (17) /* Bit 17-19: Smartcard auto-retry count */
#define USART_CR1_SCARCNT_MASK (7 << USART_CR1_SCARCNT_SHIFT)
#define USART_CR1_WUS_SHIFT (20) /* Bit 20-21: Wakeup from Stop mode interrupt */
#define USART_CR1_WUS_MASK (3 << USART_CR1_WUS_SHIFT)
# define USART_CR1_WUS_ADDRMAT (0 << USART_CR1_WUS_SHIFT) /* Active on address match */
# define USART_CR1_WUS_STARTBIT (2 << USART_CR1_WUS_SHIFT) /* Active on Start bit */
# define USART_CR1_WUS_RXNE (3 << USART_CR1_WUS_SHIFT) /* Active on RXNE */
#define USART_CR1_WUFIE (1 << 22) /* Bit 22: Wakeup from Stop mode interrupt enable */
#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
#define USART_CR3_OVRDIS (1 << 12) /* Bit 12: Overrun Disable */
#define USART_CR3_DDRE (1 << 13) /* Bit 13: DMA Disable on Reception Error */
#define USART_CR3_DEM (1 << 14) /* Bit 14: Driver enable mode */
#define USART_CR3_DEP (1 << 15) /* Bit 15: Driver enable polarity selection */
#define USART_CR3_SCARCNT_SHIFT (17) /* Bit 17-19: Smartcard auto-retry count */
#define USART_CR3_SCARCNT_MASK (7 << USART_CR3_SCARCNT_SHIFT)
#define USART_CR3_WUS_SHIFT (20) /* Bit 20-21: Wakeup from Stop mode interrupt */
#define USART_CR3_WUS_MASK (3 << USART_CR3_WUS_SHIFT)
# define USART_CR3_WUS_ADDRMAT (0 << USART_CR3_WUS_SHIFT) /* Active on address match */
# define USART_CR3_WUS_STARTBIT (2 << USART_CR3_WUS_SHIFT) /* Active on Start bit */
# define USART_CR3_WUS_RXNE (3 << USART_CR3_WUS_SHIFT) /* Active on RXNE */
#define USART_CR3_WUFIE (1 << 22) /* Bit 22: Wakeup from Stop mode interrupt enable */
/* Baud Rate Register */

2
arch/arm/src/stm32/chip/stm32f40xxx_uart.h
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@ -217,7 +217,7 @@
#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */
#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */
#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */
#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
/* Guard time and prescaler register */

2
arch/arm/src/stm32/chip/stm32l15xxx_uart.h
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@ -191,7 +191,7 @@
#define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */
#define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */
#define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */
#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */
/* Guard time and prescaler register */

6
arch/arm/src/stm32/stm32_lowputc.c
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@ -273,9 +273,9 @@
# define USART_CR3_CLRBITS \
(USART_CR3_EIE | USART_CR3_IREN | USART_CR3_IRLP | USART_CR3_HDSEL | \
USART_CR3_NACK | USART_CR3_SCEN | USART_CR3_DMAR | USART_CR3_DMAT | \
USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_CTSIE | USART_CR1_ONEBIT | \
USART_CR1_OVRDIS | USART_CR1_DDRE | USART_CR1_DEM | USART_CR1_DEP | \
USART_CR1_SCARCNT_MASK | USART_CR1_WUS_MASK | USART_CR1_WUFIE)
USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_CTSIE | USART_CR3_ONEBIT | \
USART_CR3_OVRDIS | USART_CR3_DDRE | USART_CR3_DEM | USART_CR3_DEP | \
USART_CR3_SCARCNT_MASK | USART_CR3_WUS_MASK | USART_CR3_WUFIE)
# else
# define USART_CR3_CLRBITS \
(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE)