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arch/arm/src/lpc54xx: Add USART pin configuration. Need enable IOCON and GPIO clocking.

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This commit is contained in:
Gregory Nutt 2017-12-09 09:11:17 -06:00
parent 246a97008e
commit 52f9128562
10 changed files with 291 additions and 78 deletions
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5
arch/arm/src/lpc54xx/Kconfig
View File

@ -230,3 +230,8 @@ endmenu # LPC54xx Peripheral Selection
config LPC54_GPIOIRQ
bool "Support GPIO Interrupts"
default n
config LPC54_GPIOIRQ_GROUPS
bool "Support GPIO Interrupt groupe"
default n
depends on LPC54_GPIOIRQ && EXPERIMENTAL

4
arch/arm/src/lpc54xx/Make.defs
View File

@ -97,3 +97,7 @@ endif
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
CHIP_CSRCS += lpc54_idle.c
endif
ifneq ($(CONFIG_LPC54_GPIOIRQ),y)
CHIP_CSRCS += lpc54_gpioirq.c
endif

8
arch/arm/src/lpc54xx/chip/lpc546x_pinmux.h
View File

@ -67,7 +67,7 @@
*/
/* Analog-to-Digital Conversion (ADC) */
#define GPIO_ADC0_0 (GPIO_INPUT | GPIO_MODE_ANALOG | GPIO_PORT0 | GPIO_PIN10) /* Type A */
#define GPIO_ADC0_1 (GPIO_INPUT | GPIO_MODE_ANALOG | GPIO_PORT0 | GPIO_PIN11) /* Type A */
#define GPIO_ADC0_2 (GPIO_INPUT | GPIO_MODE_ANALOG | GPIO_PORT0 | GPIO_PIN12) /* Type A */
@ -423,7 +423,7 @@
#define GPIO_FC1_SCK_1 (GPIO_ALT2 | GPIO_MODE_DIGITAL | GPIO_PORT1 | GPIO_PIN9)
#define GPIO_FC1_SCK_2 (GPIO_ALT3 | GPIO_MODE_DIGITAL | GPIO_PORT3 | GPIO_PIN11)
#define GPIO_FC1_SCK_3 (GPIO_ALT4 | GPIO_MODE_DIGITAL | GPIO_PORT0 | GPIO_PIN7)
#define GPIO_FC1_SCK_1 (GPIO_ALT4 | GPIO_MODE_DIGITAL | GPIO_PORT4 | GPIO_PIN27)
#define GPIO_FC1_SCK_4 (GPIO_ALT4 | GPIO_MODE_DIGITAL | GPIO_PORT4 | GPIO_PIN27)
#define GPIO_FC1_TXD_SCL_MISO_1 (GPIO_ALT2 | GPIO_MODE_DIGITAL | GPIO_PORT1 | GPIO_PIN11)
#define GPIO_FC1_TXD_SCL_MISO_2 (GPIO_ALT3 | GPIO_MODE_DIGITAL | GPIO_PORT2 | GPIO_PIN4)
#define GPIO_FC1_TXD_SCL_MISO_3 (GPIO_ALT4 | GPIO_MODE_DIGITAL | GPIO_PORT0 | GPIO_PIN10) /* Type A */
@ -825,8 +825,8 @@
/* SWD */
#define GPIO_SWDIO (GPIO_ALT6 | GPIO_MODE_DIGITAL | GPIO_PORT0 | GPIO_PIN12) /* Type A */
#define GPIO_SWO (GPIO_ALT4 | GPIO_MODE_DIGITAL | GPIO_PORT0 | GPIO_PIN8)
#define GPIO_SWO (GPIO_ALT6 | GPIO_MODE_DIGITAL | GPIO_PORT0 | GPIO_PIN10) /* Type A */
#define GPIO_SWO_1 (GPIO_ALT4 | GPIO_MODE_DIGITAL | GPIO_PORT0 | GPIO_PIN8)
#define GPIO_SWO_2 (GPIO_ALT6 | GPIO_MODE_DIGITAL | GPIO_PORT0 | GPIO_PIN10) /* Type A */
/* Trace */

2
arch/arm/src/lpc54xx/chip/lpc54_memorymap.h
View File

@ -45,7 +45,7 @@
#if defined(CONFIG_ARCH_FAMILY_LPC546XX)
# include "chip/lpc546x_memorymap.h"
#else
# error "Unsupported LPC54 memory map"
# error "Unsupported LPC54 family"
#endif
#endif /* __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_MEMORYMAP_H */

64
arch/arm/src/lpc54xx/lpc54_gpio.c
View File

@ -166,15 +166,15 @@ static void lpc54_setpinfunction(unsigned int port, unsigned int pin,
}
/****************************************************************************
* Name: lpc54_configinput
* Name: lpc54_gpio_input
*
* Description:
* Configure a GPIO input pin based on bit-encoded description of the pin.
*
****************************************************************************/
static inline void lpc54_configinput(lpc54_pinset_t cfgset,
unsigned int port, unsigned int pin)
static inline void lpc54_gpio_input(lpc54_pinset_t cfgset,
unsigned int port, unsigned int pin)
{
uintptr_t regaddr;
uint32_t regval;
@ -193,29 +193,15 @@ static inline void lpc54_configinput(lpc54_pinset_t cfgset,
}
/****************************************************************************
* Name: lpc54_configinterrupt
*
* Description:
* Configure a GPIO interrupt pin based on bit-encoded description of the pin.
*
****************************************************************************/
static inline void lpc54_configinterrupt(lpc54_pinset_t cfgset,
unsigned int port, unsigned int pin)
{
#warning Missing logic
}
/****************************************************************************
* Name: lpc54_configoutput
* Name: lpc54_gpio_output
*
* Description:
* Configure a GPIO output pin based on bit-encoded description of the pin.
*
****************************************************************************/
static inline void lpc54_configoutput(lpc54_pinset_t cfgset,
unsigned int port, unsigned int pin)
static inline void lpc54_gpio_output(lpc54_pinset_t cfgset,
unsigned int port, unsigned int pin)
{
uintptr_t regaddr;
uint32_t regval;
@ -233,7 +219,7 @@ static inline void lpc54_configoutput(lpc54_pinset_t cfgset,
}
/****************************************************************************
* Name: lpc54_configalternate
* Name: lpc54_gpio_alternate
*
* Description:
* Configure a GPIO alternate function pin based on bit-encoded description
@ -241,9 +227,9 @@ static inline void lpc54_configoutput(lpc54_pinset_t cfgset,
*
****************************************************************************/
static inline void lpc54_configalternate(lpc54_pinset_t cfgset,
unsigned int port, unsigned int pin,
uint32_t alt)
static inline void lpc54_gpio_alternate(lpc54_pinset_t cfgset,
unsigned int port, unsigned int pin,
uint32_t alt)
{
/* Select the alternate pin function */
@ -251,15 +237,15 @@ static inline void lpc54_configalternate(lpc54_pinset_t cfgset,
}
/****************************************************************************
* Name: lpc54_setiocon
* Name: lpc54_gpio_iocon
*
* Description:
* Configure the pin IOCON register.
*
****************************************************************************/
static void lpc54_setiocon(lpc54_pinset_t cfgset, unsigned int port,
unsigned int pin)
static void lpc54_gpio_iocon(lpc54_pinset_t cfgset, unsigned int port,
unsigned int pin)
{
uintptr_t regaddr;
uint32_t iocon;
@ -381,11 +367,11 @@ int lpc54_gpio_config(lpc54_pinset_t cfgset)
*/
definput = (cfgset & PORTPIN_MASK) | DEFAULT_INPUT;
lpc54_configinput(definput, port, pin);
lpc54_gpio_input(definput, port, pin);
/* Set the IOCON bits */
lpc54_setiocon(cfgset, port, pin);
lpc54_gpio_iocon(cfgset, port, pin);
/* Handle according to pin function */
@ -394,42 +380,44 @@ int lpc54_gpio_config(lpc54_pinset_t cfgset)
case GPIO_INPUT: /* GPIO input pin */
break; /* Already configured */
#ifdef CONFIG_LPC54_GPIOIRQ
case GPIO_INTFE: /* GPIO interrupt falling edge */
case GPIO_INTRE: /* GPIO interrupt rising edge */
case GPIO_INTBOTH: /* GPIO interrupt both edges */
lpc54_configinterrupt(cfgset, port, pin);
lpc54_gpio_interrupt(cfgset, port, pin);
break;
#endif
case GPIO_OUTPUT: /* GPIO outpout pin */
lpc54_configoutput(cfgset, port, pin);
lpc54_gpio_output(cfgset, port, pin);
break;
case GPIO_ALT1: /* Alternate function 1 */
lpc54_configalternate(cfgset, port, pin, IOCON_FUNC_ALT1);
lpc54_gpio_alternate(cfgset, port, pin, IOCON_FUNC_ALT1);
break;
case GPIO_ALT2: /* Alternate function 2 */
lpc54_configalternate(cfgset, port, pin, IOCON_FUNC_ALT2);
lpc54_gpio_alternate(cfgset, port, pin, IOCON_FUNC_ALT2);
break;
case GPIO_ALT3: /* Alternate function 3 */
lpc54_configalternate(cfgset, port, pin, IOCON_FUNC_ALT3);
lpc54_gpio_alternate(cfgset, port, pin, IOCON_FUNC_ALT3);
break;
case GPIO_ALT4: /* Alternate function 4 */
lpc54_configalternate(cfgset, port, pin, IOCON_FUNC_ALT4);
lpc54_gpio_alternate(cfgset, port, pin, IOCON_FUNC_ALT4);
break;
case GPIO_ALT5: /* Alternate function 5 */
lpc54_configalternate(cfgset, port, pin, IOCON_FUNC_ALT5);
lpc54_gpio_alternate(cfgset, port, pin, IOCON_FUNC_ALT5);
break;
case GPIO_ALT6: /* Alternate function 6 */
lpc54_configalternate(cfgset, port, pin, IOCON_FUNC_ALT6);
lpc54_gpio_alternate(cfgset, port, pin, IOCON_FUNC_ALT6);
break;
case GPIO_ALT7: /* Alternate function 7 */
lpc54_configalternate(cfgset, port, pin, IOCON_FUNC_ALT7);
lpc54_gpio_alternate(cfgset, port, pin, IOCON_FUNC_ALT7);
break;
default:

51
arch/arm/src/lpc54xx/lpc54_gpio.h
View File

@ -73,7 +73,7 @@
*
* .... .... TTTT TTTT .... .... .... ....
*/
#define GPIO_I2CSLEW_SHIFT (16) /* Bit 16: Controls slew rate of I2C pad */
#define GPIO_I2CSLEW_MASK (1 << GPIO_I2CSLEW_SHIFT)
# define GPIO_I2CSLEW_I2C (0)
@ -238,15 +238,16 @@ extern "C"
#define EXTERN extern
#endif
/****************************************************************************
/************************************************************************************
* Public Functions
****************************************************************************/
************************************************************************************/
/************************************************************************************
* Name: lpc54_gpio_irqinitialize
*
* Description:
* Initialize logic to support a second level of interrupt decoding for GPIO pins.
* Initialize logic to support interrupting GPIO pins. This function is called by
* the OS inialization logic and is not a user interface.
*
************************************************************************************/
@ -266,6 +267,20 @@ void lpc54_gpio_irqinitialize(void);
int lpc54_gpio_config(lpc54_pinset_t cfgset);
/************************************************************************************
* Name: lpc54_gpio_interrupt
*
* Description:
* Configure a GPIO interrupt pin based on bit-encoded description of the pin.
* This function is called by lpc54_gpio_config to setup interrupting pins. It is
* not a user interface.
*
************************************************************************************/
#ifdef CONFIG_LPC54_GPIOIRQ
void lpc54_gpio_interrupt(lpc54_pinset_t pinset);
#endif
/************************************************************************************
* Name: lpc54_gpio_write
*
@ -286,34 +301,6 @@ void lpc54_gpio_write(lpc54_pinset_t pinset, bool value);
bool lpc54_gpio_read(lpc54_pinset_t pinset);
/************************************************************************************
* Name: lpc54_gpio_irqenable
*
* Description:
* Enable the interrupt for specified GPIO IRQ
*
************************************************************************************/
#ifdef CONFIG_LPC54_GPIOIRQ
void lpc54_gpio_irqenable(int irq);
#else
# define lpc54_gpio_irqenable(irq)
#endif
/************************************************************************************
* Name: lpc54_gpio_disable
*
* Description:
* Disable the interrupt for specified GPIO IRQ
*
************************************************************************************/
#ifdef CONFIG_LPC54_GPIOIRQ
void lpc54_gpio_disable(int irq);
#else
# define lpc54_gpio_disable(irq)
#endif
/************************************************************************************
* Function: lpc54_gpio_dump
*

95
arch/arm/src/lpc54xx/lpc54_gpioirq.c Normal file
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@ -0,0 +1,95 @@
/****************************************************************************
* arch/arm/src/lpc54/lpc54_gpioirq.c
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "up_arch.h"
#include "chip/lpc54_syscon.h"
#include "lpc54_gpio.h"
#ifdef CONFIG_LPC54_GPIOIRQ
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lpc54_gpio_irqinitialize
*
* Description:
* Initialize logic to support interrupting GPIO pins. This function is
* called by the OS inialization logic and is not a user interface.
*
****************************************************************************/
void lpc54_gpio_irqinitialize(void)
{
#ifdef CONFIG_LPC54_GPIOIRQ_GROUPS
/* Enable the Input Mux, PINT, and GINT modules */
putreg32(SYSCON_AHBCLKCTRL0_INPUTMUX | SYSCON_AHBCLKCTRL0_PINT |
SYSCON_AHBCLKCTRL0_GINT, LPC54_SYSCON_AHBCLKCTRLSET0);
#else
/* Enable the Input Mux and PINT modules */
putreg32(SYSCON_AHBCLKCTRL0_INPUTMUX | SYSCON_AHBCLKCTRL0_PINT,
LPC54_SYSCON_AHBCLKCTRLSET0);
#endif
#warning Missing logic
}
/************************************************************************************
* Name: lpc54_gpio_interrupt
*
* Description:
* Configure a GPIO interrupt pin based on bit-encoded description of the pin.
* This function is called by lpc54_gpio_config to setup interrupting pins. It is
* not a user interface.
*
************************************************************************************/
void lpc54_gpio_interrupt(lpc54_pinset_t pinset)
{
#warning Missing logic
}
#endif /* CONFIG_LPC54_GPIOIRQ */

125
arch/arm/src/lpc54xx/lpc54_lowputc.c
View File

@ -50,12 +50,16 @@
#include "up_arch.h"
#include "up_internal.h"
#include "chip/lpc54_memorymap.h"
#include "chip/lpc54_syscon.h"
#include "chip/lpc54_flexcomm.h"
#include "chip/lpc54_pinmux.h"
#include "chip/lpc54_usart.h"
#include "lpc54_config.h"
#include "lpc54_clockconfig.h"
#include "lpc54_gpio.h"
#include "lpc54_lowputc.h"
#include <arch/board/board.h>
@ -389,7 +393,16 @@ static void lp54_setbaud(uintptr_t base, FAR const struct uart_config_s *config)
void lpc54_lowsetup(void)
{
/* TODO: Configure Fractional Rate Generate in case it is selected as a Flexcomm
/* Enable the IOCON and all GPIO modules */
putreg32(SYSCON_AHBCLKCTRL0_IOCON | SYSCON_AHBCLKCTRL0_GPIO0 |
SYSCON_AHBCLKCTRL0_GPIO1 | SYSCON_AHBCLKCTRL0_GPIO2 |
SYSCON_AHBCLKCTRL0_GPIO3, LPC54_SYSCON_AHBCLKCTRLSET0);
putreg32(SYSCON_AHBCLKCTRL2_GPIO4 | SYSCON_AHBCLKCTRL2_GPIO5,
LPC54_SYSCON_AHBCLKCTRLSET2);
/* TODO: Configure Fractional Rate Generator in case it is selected as a Flexcomm
* clock source.
*/
@ -404,6 +417,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM0_PSELID);
/* Configure USART0 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART0_RXD);
lpc54_gpio_config(GPIO_USART0_TXD);
#ifdef CONFIG_USART0_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART0_CTS);
#endif
#ifdef CONFIG_USART0_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART0_RTS);
#endif
/* Set up the FLEXCOMM0 function clock */
putreg32(BOARD_FLEXCOMM0_CLKSEL, LPC54_SYSCON_FCLKSEL0);
@ -419,6 +443,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM1_PSELID);
/* Configure USART1 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART1_RXD);
lpc54_gpio_config(GPIO_USART1_TXD);
#ifdef CONFIG_USART1_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART1_CTS);
#endif
#ifdef CONFIG_USART1_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART1_RTS);
#endif
/* Set up the FLEXCOMM1 function clock */
putreg32(BOARD_FLEXCOMM1_CLKSEL, LPC54_SYSCON_FCLKSEL1);
@ -434,6 +469,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM2_PSELID);
/* Configure USART2 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART2_RXD);
lpc54_gpio_config(GPIO_USART2_TXD);
#ifdef CONFIG_USART2_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART2_CTS);
#endif
#ifdef CONFIG_USART2_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART2_RTS);
#endif
/* Set up the FLEXCOMM0 function clock */
putreg32(BOARD_FLEXCOMM2_CLKSEL, LPC54_SYSCON_FCLKSEL2);
@ -449,6 +495,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM3_PSELID);
/* Configure USART3 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART3_RXD);
lpc54_gpio_config(GPIO_USART3_TXD);
#ifdef CONFIG_USART3_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART3_CTS);
#endif
#ifdef CONFIG_USART3_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART3_RTS);
#endif
/* Set up the FLEXCOMM3 function clock */
putreg32(BOARD_FLEXCOMM3_CLKSEL, LPC54_SYSCON_FCLKSEL3);
@ -464,6 +521,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM4_PSELID);
/* Configure USART4 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART4_RXD);
lpc54_gpio_config(GPIO_USART4_TXD);
#ifdef CONFIG_USART4_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART4_CTS);
#endif
#ifdef CONFIG_USART4_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART4_RTS);
#endif
/* Set up the FLEXCOMM4 function clock */
putreg32(BOARD_FLEXCOMM4_CLKSEL, LPC54_SYSCON_FCLKSEL4);
@ -479,6 +547,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM5_PSELID);
/* Configure USART5 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART5_RXD);
lpc54_gpio_config(GPIO_USART5_TXD);
#ifdef CONFIG_USART5_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART5_CTS);
#endif
#ifdef CONFIG_USART5_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART5_RTS);
#endif
/* Set up the FLEXCOMM5 function clock */
putreg32(BOARD_FLEXCOMM5_CLKSEL, LPC54_SYSCON_FCLKSEL5);
@ -494,6 +573,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM6_PSELID);
/* Configure USART6 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART6_RXD);
lpc54_gpio_config(GPIO_USART6_TXD);
#ifdef CONFIG_USART6_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART6_CTS);
#endif
#ifdef CONFIG_USART6_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART6_RTS);
#endif
/* Set up the FLEXCOMM6 function clock */
putreg32(BOARD_FLEXCOMM6_CLKSEL, LPC54_SYSCON_FCLKSEL6);
@ -509,6 +599,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM7_PSELID);
/* Configure USART7 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART7_RXD);
lpc54_gpio_config(GPIO_USART7_TXD);
#ifdef CONFIG_USART7_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART7_CTS);
#endif
#ifdef CONFIG_USART7_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART7_RTS);
#endif
/* Set up the FLEXCOMM7 function clock */
putreg32(BOARD_FLEXCOMM7_CLKSEL, LPC54_SYSCON_FCLKSEL7);
@ -524,6 +625,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM8_PSELID);
/* Configure USART8 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART8_RXD);
lpc54_gpio_config(GPIO_USART8_TXD);
#ifdef CONFIG_USART8_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART8_CTS);
#endif
#ifdef CONFIG_USART8_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART8_RTS);
#endif
/* Set up the FLEXCOMM0 function clock */
putreg32(BOARD_FLEXCOMM8_CLKSEL, LPC54_SYSCON_FCLKSEL8);
@ -539,6 +651,17 @@ void lpc54_lowsetup(void)
putreg32(FLEXCOMM_PSELID_PERSEL_USART | FLEXCOMM_PSELID_LOCK,
LPC54_FLEXCOMM9_PSELID);
/* Configure USART9 pins (defined in board.h) */
lpc54_gpio_config(GPIO_USART9_RXD);
lpc54_gpio_config(GPIO_USART9_TXD);
#ifdef CONFIG_USART9_OFLOWCONTROL
lpc54_gpio_config(GPIO_USART9_CTS);
#endif
#ifdef CONFIG_USART9_IFLOWCONTROL
lpc54_gpio_config(GPIO_USART9_RTS);
#endif
/* Set up the FLEXCOMM9 function clock */
putreg32(BOARD_FLEXCOMM9_CLKSEL, LPC54_SYSCON_FCLKSEL9);

14
configs/lpcxpresso-lpc54628/include/board.h
View File

@ -231,7 +231,19 @@
/* To be provided */
/* Pin Disambiguation *******************************************************/
/* To be provided */
/* Flexcomm0/USART0
*
* USART0 connects to the serial bridge on LPC4322JET100 and is typlical used
* for the serial console.
*
* BRIDGE_UART_RXD -> P0_29-ISP_FC0_RXD -> P0.29 GPIO_FC0_RXD_SDA_MOSI_2
* BRIDGE_UART_TXD <- P0_30-ISP_FC0_TXD <- P0.30 GPIO_FC0_TXD_SCL_MISO_2
*/
#ifdef CONFIG_LPC54_USART0
# define GPIO_USART0_RXD (GPIO_FC0_RXD_SDA_MOSI_2 | GPIO_FILTER_OFF)
# define GPIO_USART0_TXD (GPIO_FC0_TXD_SCL_MISO_2 | GPIO_FILTER_OFF)
#endif
/****************************************************************************
* Public Types

1
configs/lpcxpresso-lpc54628/nsh/defconfig
View File

@ -9,7 +9,6 @@ CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_STDARG_H=y
CONFIG_ARCH="arm"
CONFIG_BOARD_LOOPSPERMSEC=18535
CONFIG_DEBUG_NOOPT=y
CONFIG_EXAMPLES_NSH=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y