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arch/arm: Rename all up_*.S files to arm_*.S

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Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.S files.

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
This commit is contained in:
Gregory Nutt 2020-05-01 07:28:15 -06:00 committed by Alan Carvalho de Assis
parent f8a809eb5b
commit 542b684f73
56 changed files with 182 additions and 178 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/src/arm/up_cache.S → arch/arm/src/arm/arm_cache.S
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@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/arm/up_cache.S
* arch/arm/src/arm/arm_cache.S
*
* Copyright (C) 2007, 2009, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -41,7 +41,7 @@
*
****************************************************************************/
.file "up_cache.S"
.file "arm_cache.S"
/****************************************************************************
* Included Files

2
arch/arm/src/arm/up_head.S → arch/arm/src/arm/arm_head.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/arm/up_head.S
* arch/arm/src/arm/arm_head.S
*
* Copyright (C) 2007, 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

2
arch/arm/src/arm/up_nommuhead.S → arch/arm/src/arm/arm_nommuhead.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/arm/up_nommuhead.S
* arch/arm/src/arm/arm_nommuhead.S
*
* Copyright (C) 2007, 2009-2010, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

0
arch/arm/src/arm/up_vectoraddrexcptn.S → arch/arm/src/arm/arm_vectoraddrexcptn.S
View File

2
arch/arm/src/arm/up_vectors.S → arch/arm/src/arm/arm_vectors.S
View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/arm/up_vectors.S
* arch/arm/src/arm/arm_vectors.S
*
* Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

2
arch/arm/src/arm/up_vectortab.S → arch/arm/src/arm/arm_vectortab.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/arm/up_vectortab.S
* arch/arm/src/arm/arm_vectortab.S
*
* Copyright (C) 2007, 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

4
arch/arm/src/armv6-m/up_exception.S → arch/arm/src/armv6-m/arm_exception.S
View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/armv6-m/up_exception.S
* arch/arm/src/armv6-m/arm_exception.S
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -55,7 +55,7 @@
.globl exception_common
.cpu cortex-m0
.file "up_exception.S"
.file "arm_exception.S"
/************************************************************************************
* .text

2
arch/arm/src/armv6-m/arm_signal_dispatch.c
View File

@ -61,7 +61,7 @@
*
* Normally the user-mode signalling handling stub will also execute
* before the ultimate signal handler is called. See
* arch/arm/src/armv6-m/up_signal_handler.S. This function is the
* arch/arm/src/armv6-m/arm_signal_handler.S. This function is the
* user-space, signal handler trampoline function. It is called from
* up_signal_dispatch() in user-mode.
*

4
arch/arm/src/armv6-m/up_signal_handler.S → arch/arm/src/armv6-m/arm_signal_handler.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/srcm/armv6-m/up_signal_handler.S
* arch/arm/srcm/armv6-m/arm_signal_handler.S
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -48,7 +48,7 @@
****************************************************************************/
.cpu cortex-m0
.file "up_signal_handler.S"
.file "arm_signal_handler.S"
/****************************************************************************
* Private Functions

2
arch/arm/src/armv7-m/arm_signal_dispatch.c
View File

@ -46,7 +46,7 @@
*
* Normally the user-mode signaling handling stub will also execute
* before the ultimate signal handler is called. See
* arch/arm/src/armv7-m/gnu/up_signal_handler.S. This function is the
* arch/arm/src/armv7-m/gnu/arm_signal_handler.S. This function is the
* user-space, signal handler trampoline function. It is called from
* up_signal_dispatch() in user-mode.
*

4
arch/arm/src/armv7-m/gnu/up_exception.S → arch/arm/src/armv7-m/gnu/arm_exception.S
View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/armv7-m/gnu/up_exception.S
* arch/arm/src/armv7-m/gnu/arm_exception.S
*
* Copyright (C) 2009-2013, 2015-2016, 2018 Gregory Nutt. All rights reserved.
* Copyright (C) 2012 Michael Smith. All rights reserved.
@ -88,7 +88,7 @@
.syntax unified
.thumb
.file "up_exception.S"
.file "arm_exception.S"
/************************************************************************************
* Macro Definitions

4
arch/arm/src/armv7-m/gnu/up_fetchadd.S → arch/arm/src/armv7-m/gnu/arm_fetchadd.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/armv7-m/gnu/up_fetchadd.S
* arch/arm/src/armv7-m/gnu/arm_fetchadd.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@ -26,7 +26,7 @@
.syntax unified
.thumb
.file "up_fetchadd.S"
.file "arm_fetchadd.S"
/****************************************************************************
* Public Functions

4
arch/arm/src/armv7-m/gnu/up_fpu.S → arch/arm/src/armv7-m/gnu/arm_fpu.S
View File

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/armv7-m/gnu/up_fpu.S
* arch/arm/src/armv7-m/gnu/arm_fpu.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@ -46,7 +46,7 @@
.syntax unified
.thumb
.file "up_fpu.S"
.file "arm_fpu.S"
/************************************************************************************
* Public Functions

2
arch/arm/src/armv7-m/gnu/up_lazyexception.S → arch/arm/src/armv7-m/gnu/arm_lazyexception.S
View File

@ -71,7 +71,7 @@
.syntax unified
.thumb
.file "up_lazyexception.S"
.file "arm_lazyexception.S"
/************************************************************************************************
* Macro Definitions

2
arch/arm/src/armv7-m/gnu/up_setjmp.S → arch/arm/src/armv7-m/gnu/arm_setjmp.S
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@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/armv7-m/gnu/up_setjmp.S
* arch/arm/src/armv7-m/gnu/arm_setjmp.S
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: David S. Alessio <David@DSA.Consulting>

4
arch/arm/src/armv7-m/gnu/up_signal_handler.S → arch/arm/src/armv7-m/gnu/arm_signal_handler.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/armv7-m/gnu/up_signal_handler.S
* arch/arm/src/armv7-m/gnu/arm_signal_handler.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@ -35,7 +35,7 @@
.syntax unified
.thumb
.cpu cortex-m3
.file "up_signal_handler.S"
.file "arm_signal_handler.S"
/****************************************************************************
* Private Functions

4
arch/arm/src/armv7-m/gnu/up_testset.S → arch/arm/src/armv7-m/gnu/arm_testset.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/armv7-m/gnu/up_testset.S
* arch/arm/src/armv7-m/gnu/arm_testset.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@ -27,7 +27,7 @@
.syntax unified
.thumb
.file "up_testset.S"
.file "arm_testset.S"
/****************************************************************************
* Pre-processor Definitions

2
arch/arm/src/armv7-m/iar/up_fetchadd.S → arch/arm/src/armv7-m/iar/arm_fetchadd.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/armv7-m/iar/up_fetchadd.S
* arch/arm/src/armv7-m/iar/arm_fetchadd.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with

2
arch/arm/src/armv7-m/iar/up_testset.S → arch/arm/src/armv7-m/iar/arm_testset.S
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/armv7-m/iar/up_testset.S
* arch/arm/src/armv7-m/iar/arm_testset.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with

2
arch/arm/src/armv7-r/arm_fetchadd.S
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@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/armv7-r/up_fetchadd.S
* arch/arm/src/armv7-r/arm_fetchadd.S
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

2
arch/arm/src/armv8-m/arm_signal_dispatch.c
View File

@ -46,7 +46,7 @@
*
* Normally the user-mode signaling handling stub will also execute
* before the ultimate signal handler is called. See
* arch/arm/src/armv8-m/gnu/up_signal_handler.S. This function is the
* arch/arm/src/armv8-m/gnu/arm_signal_handler.S. This function is the
* user-space, signal handler trampoline function. It is called from
* up_signal_dispatch() in user-mode.
*

2
arch/arm/src/c5471/Make.defs
View File

@ -33,7 +33,7 @@
#
############################################################################
HEAD_ASRC = up_nommuhead.S
HEAD_ASRC = arm_nommuhead.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S vfork.S

2
arch/arm/src/common/arm_internal.h
View File

@ -206,7 +206,7 @@ EXTERN volatile uint32_t *g_current_regs[1];
#endif
/* This is the beginning of heap as provided from up_head.S.
/* This is the beginning of heap as provided from arm_head.S.
* This is the first address in DRAM after the loaded
* program+bss+idle stack. The end of the heap is
* CONFIG_RAM_END

12
arch/arm/src/cxd56xx/Make.defs
View File

@ -38,11 +38,11 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S vfork.S
CMN_ASRCS += arm_testset.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -56,9 +56,9 @@ CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
CMN_CSRCS += arm_svcall.c arm_vfork.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -73,7 +73,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -81,7 +81,7 @@ CMN_CSRCS += arm_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
CMN_CSRCS += arm_copyarmstate.c
else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)

6
arch/arm/src/dm320/Make.defs
View File

@ -33,10 +33,10 @@
#
############################################################################
HEAD_ASRC = up_head.S
HEAD_ASRC = arm_head.S
CMN_ASRCS = up_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c

12
arch/arm/src/efm32/Make.defs
View File

@ -39,11 +39,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -57,9 +57,9 @@ CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -70,7 +70,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -78,7 +78,7 @@ CMN_CSRCS += arm_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

6
arch/arm/src/imx1/Make.defs
View File

@ -33,10 +33,10 @@
#
############################################################################
HEAD_ASRC = up_head.S
HEAD_ASRC = arm_head.S
CMN_ASRCS = up_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c

12
arch/arm/src/imxrt/Make.defs
View File

@ -39,11 +39,11 @@ HEAD_ASRC =
# Common ARM and Cortex-M7 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -63,9 +63,9 @@ endif
# Configuration-dependent common files
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -80,7 +80,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -90,7 +90,7 @@ endif
CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

12
arch/arm/src/kinetis/Make.defs
View File

@ -39,11 +39,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -61,9 +61,9 @@ CMN_CSRCS += arm_stackcheck.c
endif
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -78,7 +78,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -96,7 +96,7 @@ endif
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

4
arch/arm/src/kl/Make.defs
View File

@ -35,7 +35,7 @@
HEAD_ASRC =
CMN_ASRCS = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
@ -50,7 +50,7 @@ CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

6
arch/arm/src/lc823450/Make.defs
View File

@ -45,7 +45,7 @@ CMN_ASRCS += vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -61,7 +61,7 @@ CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c
# CMN_CSRCS += up_dwt.c
CMN_CSRCS += arm_stackframe.c
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
CMN_CSRCS += arm_vectors.c
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
@ -71,7 +71,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_ARCH_MEMCPY),y)

12
arch/arm/src/lpc17xx_40xx/Make.defs
View File

@ -43,11 +43,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -66,9 +66,9 @@ CMN_CSRCS += arm_stackcheck.c
endif
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -83,7 +83,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
# Use of common/arm_etherstub.c is deprecated. The preferred mechanism is to
@ -97,7 +97,7 @@ endif
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

2
arch/arm/src/lpc214x/Make.defs
View File

@ -36,7 +36,7 @@
HEAD_ASRC = lpc214x_head.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_vectors.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c

2
arch/arm/src/lpc2378/Make.defs
View File

@ -40,7 +40,7 @@
HEAD_ASRC = lpc23xx_head.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_vectors.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c

6
arch/arm/src/lpc31xx/Make.defs
View File

@ -33,10 +33,10 @@
#
############################################################################
HEAD_ASRC = up_head.S
HEAD_ASRC = arm_head.S
CMN_ASRCS = up_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c

18
arch/arm/src/lpc31xx/lpc31_boot.c
View File

@ -134,7 +134,8 @@ static const struct section_mapping_s g_section_mapping[] =
************************************************************************************/
#ifndef CONFIG_ARCH_ROMPGTABLE
static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr,
uint32_t mmuflags)
{
uint32_t *pgtable = (uint32_t *)PGTABLE_BASE_VADDR;
uint32_t index = vaddr >> 20;
@ -174,7 +175,8 @@ static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
#ifndef CONFIG_ARCH_ROMPGTABLE
static void up_setupmappings(void)
{
int i, j;
int i;
int j;
for (i = 0; i < NMAPPINGS; i++)
{
@ -288,16 +290,18 @@ static void up_copyvectorblock(void)
* read only, then temporarily mark the mapping write-able (non-buffered).
*/
#if !defined(CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_LOWVECTORS) && defined(CONFIG_PAGING)
#if !defined(CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_LOWVECTORS) && \
defined(CONFIG_PAGING)
up_vectorpermissions(MMU_L2_VECTRWFLAGS);
#endif
/* Copy the vectors into ISRAM at the address that will be mapped to the vector
* address:
/* Copy the vectors into ISRAM at the address that will be mapped to the
* vector address:
*
* LPC31_VECTOR_PADDR - Unmapped, physical address of vector table in SRAM
* LPC31_VECTOR_VSRAM - Virtual address of vector table in SRAM
* LPC31_VECTOR_VADDR - Virtual address of vector table (0x00000000 or 0xffff0000)
* LPC31_VECTOR_VADDR - Virtual address of vector table (0x00000000 or
* 0xffff0000)
*/
src = (uint32_t *)&_vector_start;
@ -331,7 +335,7 @@ static void up_copyvectorblock(void)
* Name: arm_boot
*
* Description:
* Complete boot operations started in up_head.S
* Complete boot operations started in arm_head.S
*
************************************************************************************/

12
arch/arm/src/lpc43xx/Make.defs
View File

@ -36,11 +36,11 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -54,9 +54,9 @@ CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
CMN_CSRCS += arm_usestack.c arm_vfork.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -71,7 +71,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -79,7 +79,7 @@ CMN_CSRCS += arm_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

12
arch/arm/src/lpc54xx/Make.defs
View File

@ -36,11 +36,11 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -54,9 +54,9 @@ CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
CMN_CSRCS += arm_usestack.c arm_vfork.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -71,7 +71,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -79,7 +79,7 @@ CMN_CSRCS += arm_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

12
arch/arm/src/max326xx/Make.defs
View File

@ -38,11 +38,11 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -56,9 +56,9 @@ CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -69,7 +69,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -77,7 +77,7 @@ CMN_CSRCS += arm_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

4
arch/arm/src/moxart/Make.defs
View File

@ -38,8 +38,8 @@
HEAD_ASRC = moxart_head.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_vectors.S
CMN_ASRCS += up_nommuhead.S vfork.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
CMN_ASRCS += arm_nommuhead.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
CMN_CSRCS += arm_exit.c arm_initialstate.c arm_initialize.c

12
arch/arm/src/nrf52/Make.defs
View File

@ -36,11 +36,11 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S vfork.S
CMN_ASRCS += arm_testset.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -54,9 +54,9 @@ CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_udelay.c
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -67,7 +67,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -75,7 +75,7 @@ CMN_CSRCS += arm_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

4
arch/arm/src/nuc1xx/Make.defs
View File

@ -35,7 +35,7 @@
HEAD_ASRC =
CMN_ASRCS = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
@ -50,7 +50,7 @@ CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

4
arch/arm/src/s32k1xx/s32k11x/Make.defs
View File

@ -35,7 +35,7 @@
# Source files specific to the Cortex-M0+
CMN_ASRCS += up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@ -46,7 +46,7 @@ CMN_CSRCS += arm_vectors.c
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_DEBUG_FEATURES),y)

12
arch/arm/src/s32k1xx/s32k14x/Make.defs
View File

@ -36,11 +36,11 @@
# Source files specific to the Cortex-M4F
CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -51,9 +51,9 @@ CMN_CSRCS += arm_sigdeliver.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
CMN_CSRCS += arm_systemreset.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -63,11 +63,11 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_mpu.c arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

12
arch/arm/src/sam34/Make.defs
View File

@ -44,11 +44,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -70,9 +70,9 @@ endif
# Configuration-dependent common files
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -87,11 +87,11 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

4
arch/arm/src/samd2l2/Make.defs
View File

@ -35,7 +35,7 @@
HEAD_ASRC =
CMN_ASRCS = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
@ -50,7 +50,7 @@ CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

12
arch/arm/src/samd5e5/Make.defs
View File

@ -43,11 +43,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -63,9 +63,9 @@ CMN_CSRCS += arm_hardfault.c arm_vfork.c
# Configuration-dependent common files
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -76,11 +76,11 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_mpu.c arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

12
arch/arm/src/samv7/Make.defs
View File

@ -44,11 +44,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -72,16 +72,16 @@ CMN_CSRCS += arm_stackcheck.c
endif
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
@ -94,7 +94,7 @@ CMN_CSRCS += arm_mpu.c
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
endif

12
arch/arm/src/stm32/Make.defs
View File

@ -39,11 +39,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -65,9 +65,9 @@ CMN_CSRCS += arm_lwl_console.c
endif
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -82,7 +82,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -90,7 +90,7 @@ CMN_CSRCS += arm_checkstack.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif

4
arch/arm/src/stm32f0l0g0/Make.defs
View File

@ -36,7 +36,7 @@
HEAD_ASRC =
CMN_ASRCS = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
@ -51,7 +51,7 @@ CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

12
arch/arm/src/stm32f7/Make.defs
View File

@ -44,11 +44,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -72,16 +72,16 @@ endif
# Configuration-dependent common files
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
@ -100,7 +100,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

12
arch/arm/src/stm32h7/Make.defs
View File

@ -44,11 +44,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S vfork.S
CMN_ASRCS += arm_testset.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -68,15 +68,15 @@ CMN_CSRCS += arm_stackcheck.c
endif
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
@ -99,7 +99,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

12
arch/arm/src/stm32l4/Make.defs
View File

@ -45,11 +45,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -69,14 +69,14 @@ CMN_CSRCS += arm_stackcheck.c
endif
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
@ -91,7 +91,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

2
arch/arm/src/str71x/Make.defs
View File

@ -35,7 +35,7 @@
HEAD_ASRC = str71x_head.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_vectors.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c

12
arch/arm/src/tiva/Make.defs
View File

@ -37,11 +37,11 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -63,15 +63,15 @@ ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
endif
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
@ -90,7 +90,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
else
CMN_CSRCS += arm_allocateheap.c
endif

12
arch/arm/src/xmc4/Make.defs
View File

@ -39,11 +39,11 @@ CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
CMN_ASRCS += up_setjmp.S
CMN_ASRCS += arm_setjmp.S
endif
endif
@ -61,9 +61,9 @@ CMN_CSRCS += arm_stackcheck.c
endif
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
CMN_ASRCS += arm_lazyexception.S
else
CMN_ASRCS += up_exception.S
CMN_ASRCS += arm_exception.S
endif
CMN_CSRCS += arm_vectors.c
@ -78,7 +78,7 @@ endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
CMN_CSRCS += arm_signal_dispatch.c
CMN_UASRCS += up_signal_handler.S
CMN_UASRCS += arm_signal_handler.S
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
@ -96,7 +96,7 @@ endif
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += up_fpu.S
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif