Review of PR 135
This commit is contained in:
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28b4082020
commit
54eee5b303
@ -60,28 +60,6 @@
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#include "chip/tiva_pinmap.h"
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#include "chip/tm4c_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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#define qeierr(fmt, args...) printf("%s(%d): " fmt, __FUNCTION__, __LINE__, ##args);
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_QE
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#endif
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#ifdef CONFIG_DEBUG_QEI
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# define qeidbg dbg
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# ifdef CONFIG_DEBUG_VERBOSE
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# define qeivdbg vdbg
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# else
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# define qeivdbg(x...)
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# endif
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#else
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# define qeidbg(x...)
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# define qeivdbg(x...)
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#endif
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/************************************************************************************
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* Private Types
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************************************************************************************/
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@ -101,14 +79,18 @@ struct tiva_qe_s
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* Private Function Prototypes
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************************************************************************************/
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static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset, uint32_t regval);
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static inline uint32_t tiva_qe_getreg(struct tiva_qe_s *qe, unsigned int offset);
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static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset,
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uint32_t regval);
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static inline uint32_t tiva_qe_getreg(struct tiva_qe_s *qe,
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unsigned int offset);
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static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower);
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static int tiva_qe_shutdown(FAR struct qe_lowerhalf_s *lower);
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static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos);
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static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower,
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FAR int32_t * pos);
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static int tiva_qe_reset(FAR struct qe_lowerhalf_s *lower);
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static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg);
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static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
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unsigned long arg);
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static int tiva_qe_direction(struct tiva_qe_s *qe, unsigned long *dir);
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static int tiva_qe_velocity(struct tiva_qe_s *qe, unsigned long *vel);
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@ -119,26 +101,26 @@ static int tiva_qe_velocity(struct tiva_qe_s *qe, unsigned long *vel);
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static const struct qe_ops_s g_qe_ops =
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{
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.setup = tiva_qe_setup,
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.setup = tiva_qe_setup,
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.shutdown = tiva_qe_shutdown,
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.position = tiva_qe_position,
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.reset = tiva_qe_reset,
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.ioctl = tiva_qe_ioctl,
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.reset = tiva_qe_reset,
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.ioctl = tiva_qe_ioctl,
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};
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#ifdef CONFIG_TIVA_QEI0
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static struct tiva_qe_s g_qe0 =
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{
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.ops = &g_qe_ops,
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.id = 0,
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.base = TIVA_QEI0_BASE,
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.idx = GPIO_QEI0_IDX,
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.pha = GPIO_QEI0_PHA,
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.phb = GPIO_QEI0_PHB,
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.ops = &g_qe_ops,
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.id = 0,
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.base = TIVA_QEI0_BASE,
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.idx = GPIO_QEI0_IDX,
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.pha = GPIO_QEI0_PHA,
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.phb = GPIO_QEI0_PHB,
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# ifdef CONFIG_TIVA_QEI0_PULSES
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.pulses = CONFIG_TIVA_QEI0_PULSES,
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.pulses = CONFIG_TIVA_QEI0_PULSES,
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# else
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.pulses = 0,
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.pulses = 0,
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# endif
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};
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#endif
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@ -146,16 +128,16 @@ static struct tiva_qe_s g_qe0 =
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#ifdef CONFIG_TIVA_QEI1
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static struct tiva_qe_s g_qe1 =
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{
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.ops = &g_qe_ops,
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.id = 1,
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.base = TIVA_QEI1_BASE,
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.idx = GPIO_QEI1_IDX,
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.pha = GPIO_QEI1_PHA,
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.phb = GPIO_QEI1_PHB,
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.ops = &g_qe_ops,
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.id = 1,
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.base = TIVA_QEI1_BASE,
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.idx = GPIO_QEI1_IDX,
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.pha = GPIO_QEI1_PHA,
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.phb = GPIO_QEI1_PHB,
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# ifdef CONFIG_TIVA_QEI1_PULSES
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.pulses = CONFIG_TIVA_QEI1_PUSLSE,
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.pulses = CONFIG_TIVA_QEI1_PUSLSE,
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# else
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.pulses = 0,
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.pulses = 0,
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# endif
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};
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#endif
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@ -186,7 +168,8 @@ static inline uint32_t tiva_qe_getreg(struct tiva_qe_s *qe, unsigned int offset)
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*
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************************************************************************************/
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static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset, uint32_t regval)
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static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset,
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uint32_t regval)
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{
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uintptr_t regaddr = qe->base + offset;
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putreg32(regval, regaddr);
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@ -213,57 +196,68 @@ static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower)
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{
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uint32_t ctlreg = 0;
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FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
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qeidbg("setup QEI %d\n", qe->id);
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int ret;
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sninfo("setup QEI %d\n", qe->id);
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/* Enable GPIO port, GPIO pin type and GPIO alternate function */
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/* (refer to TM4C1294NC 24.4.2-4) */
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int ret;
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ret = tiva_configgpio(qe->idx);
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if (ret < 0)
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{
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qeierr("tiva_configgpio failed (%x)\n", qe->idx);
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snerr("ERROR: tiva_configgpio failed (%x)\n", qe->idx);
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return -1;
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}
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ret = tiva_configgpio(qe->pha);
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if (ret < 0)
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{
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qeierr("tiva_configgpio failed (%x)\n", qe->pha);
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snerr("ERROR: tiva_configgpio failed (%x)\n", qe->pha);
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return -1;
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}
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ret = tiva_configgpio(qe->phb);
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if (ret < 0)
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{
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qeierr("tiva_configgpio failed (%x)\n", qe->phb);
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snerr("ERROR: tiva_configgpio failed (%x)\n", qe->phb);
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return -1;
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}
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/* Set reset mode */
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/* (refer to TM4C1294NC 24.4.5.1) */
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if (qe->pulses == 0) {
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ctlreg = RESMODE_BY_INDEX_PULSE << TIVA_QEI_CTL_RESMODE;
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} else {
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ctlreg = RESMODE_BY_MAXPOS << TIVA_QEI_CTL_RESMODE;
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}
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if (qe->pulses == 0)
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{
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ctlreg = RESMODE_BY_INDEX_PULSE << TIVA_QEI_CTL_RESMODE;
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}
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else
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{
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ctlreg = RESMODE_BY_MAXPOS << TIVA_QEI_CTL_RESMODE;
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}
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tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
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/* Set capture mode (PHA_AND_PHB) */
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/* (refer to TM4C1294NC 24.4.5.1) */
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ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
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ctlreg |= CAPMODE_PHA_AND_PHB << TIVA_QEI_CTL_CAPMODE;
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tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
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/* Set maxpos */
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/* (refer to TM4C1294NC 24.4.5.2) */
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tiva_qe_putreg(qe, TIVA_QEI_MAXPOS_OFFSET, qe->pulses * 4);
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/* Enable velocity capture */
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ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
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ctlreg |= VELEN_ENABLE << TIVA_QEI_CTL_VELEN;
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tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
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/* Set prediv (1) */
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ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
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ctlreg |= VELDIV_1 << TIVA_QEI_CTL_VELDIV;
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tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
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@ -273,6 +267,7 @@ static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower)
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/* Enable the QEI */
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/* (refer to TM4C1294NC 24.4.6) */
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ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
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ctlreg |= QEI_ENABLE << TIVA_QEI_CTL_ENABLE;
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tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
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@ -298,13 +293,15 @@ static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower)
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static int tiva_qe_shutdown(FAR struct qe_lowerhalf_s *lower)
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{
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FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
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qeidbg("shutdown QEI %d\n", qe->id);
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FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
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/* Disable the QEI */
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tiva_qe_putreg(qe, TIVA_SYSCON_SRQEI_OFFSET, SYSCON_SRQEI(qe->id));
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sninfo("shutdown QEI %d\n", qe->id);
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return OK;
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/* Disable the QEI */
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tiva_qe_putreg(qe, TIVA_SYSCON_SRQEI_OFFSET, SYSCON_SRQEI(qe->id));
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return OK;
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}
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/****************************************************************************
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@ -323,12 +320,13 @@ static int tiva_qe_shutdown(FAR struct qe_lowerhalf_s *lower)
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static int tiva_qe_reset(FAR struct qe_lowerhalf_s *lower)
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{
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FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
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qeidbg("reset QEI %d\n", qe->id);
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FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
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tiva_qe_putreg(qe, TIVA_QEI_POS_OFFSET, 0);
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sninfo("reset QEI %d\n", qe->id);
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return OK;
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tiva_qe_putreg(qe, TIVA_QEI_POS_OFFSET, 0);
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return OK;
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}
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/****************************************************************************
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@ -346,15 +344,16 @@ static int tiva_qe_reset(FAR struct qe_lowerhalf_s *lower)
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*
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****************************************************************************/
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static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
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static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t * pos)
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{
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FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
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qeidbg("get position of QEI %d\n", qe->id);
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FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
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/* (refer to TM4C1294NC 24.4.8) */
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*pos = (int32_t)tiva_qe_getreg(qe, TIVA_QEI_POS_OFFSET);
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sninfo("get position of QEI %d\n", qe->id);
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return OK;
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/* (refer to TM4C1294NC 24.4.8) */
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*pos = (int32_t) tiva_qe_getreg(qe, TIVA_QEI_POS_OFFSET);
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return OK;
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}
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/****************************************************************************
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@ -373,22 +372,26 @@ static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
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*
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****************************************************************************/
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static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg)
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static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
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unsigned long arg)
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{
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FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
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qeidbg("ioctl QEI %d\n", qe->id);
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sninfo("ioctl QEI %d\n", qe->id);
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switch (cmd)
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{
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case QEIOC_DIRECTION:
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tiva_qe_direction(qe, (unsigned long *)arg);
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break;
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case QEIOC_VELOCITY:
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tiva_qe_velocity(qe, (unsigned long *)arg);
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break;
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default:
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qeierr("invalid cmd %x\n", cmd);
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break;
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case QEIOC_DIRECTION:
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tiva_qe_direction(qe, (unsigned long *)arg);
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break;
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case QEIOC_VELOCITY:
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tiva_qe_velocity(qe, (unsigned long *)arg);
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break;
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default:
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snerr("ERROR: invalid cmd %x\n", cmd);
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break;
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}
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return OK;
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@ -411,17 +414,18 @@ static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned lon
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static int tiva_qe_direction(FAR struct tiva_qe_s *qe, unsigned long *dir)
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{
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qeidbg("get direction of QEI %d\n", qe->id);
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sninfo("get direction of QEI %d\n", qe->id);
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uint32_t statreg;
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statreg = tiva_qe_getreg(qe, TIVA_QEI_STAT_OFFSET);
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uint32_t statreg;
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statreg = tiva_qe_getreg(qe, TIVA_QEI_STAT_OFFSET);
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int32_t dirbit;
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dirbit = (statreg & (1 << TIVA_QEI_STAT_DIRECTION)) == DIRECTION_FORWARD ? 1 : -1;
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int32_t dirbit;
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dirbit =
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(statreg & (1 << TIVA_QEI_STAT_DIRECTION)) == DIRECTION_FORWARD ? 1 : -1;
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*dir = dirbit;
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*dir = dirbit;
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return OK;
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return OK;
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}
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/****************************************************************************
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@ -440,11 +444,11 @@ static int tiva_qe_direction(FAR struct tiva_qe_s *qe, unsigned long *dir)
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static int tiva_qe_velocity(FAR struct tiva_qe_s *qe, unsigned long *vel)
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{
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qeidbg("get direction of QEI %d\n", qe->id);
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sninfo("get direction of QEI %d\n", qe->id);
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*vel = (int32_t)tiva_qe_getreg(qe, TIVA_QEI_SPEED_OFFSET);
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*vel = (int32_t) tiva_qe_getreg(qe, TIVA_QEI_SPEED_OFFSET);
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return OK;
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return OK;
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}
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/************************************************************************************
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@ -465,7 +469,6 @@ static int tiva_qe_velocity(FAR struct tiva_qe_s *qe, unsigned long *vel)
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FAR struct qe_lowerhalf_s *tiva_qei_initialize(int id)
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{
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assert(id >= 0);
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FAR struct tiva_qe_s *qe;
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FAR struct qe_lowerhalf_s *lower;
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@ -484,15 +487,17 @@ FAR struct qe_lowerhalf_s *tiva_qei_initialize(int id)
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#endif
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default:
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qeierr("ERROR: invalid QEI %d\n", id);
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snerr("ERROR: invalid QEI %d\n", id);
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return NULL;
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}
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/* Enable QEI clock (refer to TM4C1294NC 24.4.1) */
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tiva_qei_enablepwr(qe->id);
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tiva_qei_enableclk(qe->id);
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/* Make sure that the QEI enable bit has been cleared */
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lower = (FAR struct qe_lowerhalf_s *)qe;
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tiva_qe_shutdown(lower);
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@ -171,11 +171,11 @@ static void tm4c_i2ctool(void)
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****************************************************************************/
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#ifdef HAVE_PWM
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void tm4c_pwm_register(int channel)
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static void tm4c_pwm_register(int channel)
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{
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FAR struct pwm_lowerhalf_s *dev;
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int ret;
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char pwm_path[PWM_PATH_FMTLEN];
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int ret;
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dev = tiva_pwm_initialize(channel);
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if (dev == NULL)
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@ -247,7 +247,7 @@ static void tm4c_pwm(void)
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*
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****************************************************************************/
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void tm4c_qei_register(int id)
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static void tm4c_qei_register(int id)
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{
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FAR struct qe_lowerhalf_s *dev;
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int ret;
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