multiple fixes in nrf24l01 driver
- signal POLLIN if there is already data in the FIFO - send ETIMEDOUT to userspace after 2 seconds if TX IRQ was not received - handle FIFO overflow - handle invalid pipes/empty FIFO - multiple cosmetics (missing static, duplicate define, missing \n)
This commit is contained in:
Leif Jakob
parent
ae87df8ec6
commit
5534e0c493
@ -93,6 +93,9 @@
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/* power-down -> standby transition timing (in us). Note: this value is probably larger than required. */
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#define NRF24L01_TPD2STBY_DELAY 4500
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/* max time to wait for TX irq (in ms) */
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#define NRF24L01_MAX_TX_IRQ_WAIT 2000
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#define FIFO_PKTLEN_MASK 0x1F /* 5 ls bits used to store packet length */
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#define FIFO_PKTLEN_SHIFT 0
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#define FIFO_PIPENO_MASK 0xE0 /* 3 ms bits used to store pipe # */
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@ -134,6 +137,7 @@ struct nrf24l01_dev_s
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uint8_t last_recvpipeno;
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sem_t sem_tx;
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bool tx_pending; /* is userspace waiting for TX IRQ? - accessor needs to hold lock on SPI bus */
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#ifdef CONFIG_WL_NRF24L01_RXSUPPORT
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uint8_t *rx_fifo; /* Circular RX buffer. [pipe# / pkt_len] [packet data...] */
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@ -193,9 +197,9 @@ static int nrf24l01_unregister(FAR struct nrf24l01_dev_s *dev);
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#ifdef CONFIG_WL_NRF24L01_RXSUPPORT
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void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno,
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static void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno,
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FAR uint8_t *buffer, uint8_t buflen);
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uint8_t fifoget(struct nrf24l01_dev_s *dev, FAR uint8_t *buffer,
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static uint8_t fifoget(struct nrf24l01_dev_s *dev, FAR uint8_t *buffer,
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uint8_t buflen, FAR uint8_t *pipeno);
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static void nrf24l01_worker(FAR void *arg);
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@ -419,7 +423,7 @@ static uint8_t nrf24l01_setregbit(struct nrf24l01_dev_s *dev, uint8_t reg,
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/* RX fifo mgt */
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void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno, uint8_t *buffer, uint8_t buflen)
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static void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno, uint8_t *buffer, uint8_t buflen)
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{
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sem_wait(&dev->sem_fifo);
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while (dev->fifo_len + buflen + 1 > CONFIG_WL_NRF24L01_RXFIFO_LEN)
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@ -447,14 +451,18 @@ void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno, uint8_t *buffer, uint8_
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sem_post(&dev->sem_fifo);
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}
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uint8_t fifoget(struct nrf24l01_dev_s *dev, uint8_t *buffer, uint8_t buflen, uint8_t *pipeno)
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static uint8_t fifoget(struct nrf24l01_dev_s *dev, uint8_t *buffer, uint8_t buflen, uint8_t *pipeno)
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{
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uint8_t pktlen;
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uint8_t i;
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sem_wait(&dev->sem_fifo);
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ASSERT(dev->fifo_len > 0);
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if ( dev->fifo_len == 0 ) /* sem_rx contains count of inserted packets in FIFO, but FIFO can overflow - fail smart */
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{
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pktlen = 0;
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goto no_data;
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}
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pktlen = FIFO_PKTLEN(dev);
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if (NULL != pipeno)
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@ -479,6 +487,7 @@ uint8_t fifoget(struct nrf24l01_dev_s *dev, uint8_t *buffer, uint8_t buflen, uin
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dev->fifo_len -= (pktlen + 1);
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no_data:
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sem_post(&dev->sem_fifo);
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return pktlen;
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}
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@ -489,7 +498,7 @@ static int nrf24l01_irqhandler(int irq, FAR void *context, FAR void *arg)
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{
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FAR struct nrf24l01_dev_s *dev = (FAR struct nrf24l01_dev_s *)arg;
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winfo("*IRQ*");
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winfo("*IRQ*\n");
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#ifdef CONFIG_WL_NRF24L01_RXSUPPORT
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@ -548,6 +557,8 @@ static void nrf24l01_worker(FAR void *arg)
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winfo("RX_DR is set!\n");
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bool has_data = false;
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/* Read and store all received payloads */
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do
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@ -563,6 +574,12 @@ static void nrf24l01_worker(FAR void *arg)
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*/
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pipeno = (status & NRF24L01_RX_P_NO_MASK) >> NRF24L01_RX_P_NO_SHIFT;
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if ( pipeno >= NRF24L01_PIPE_COUNT ) /* 6=invalid 7=fifo empty */
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{
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werr("invalid pipe rx: %d\n", (int)pipeno);
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nrf24l01_flush_rx(dev);
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break;
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}
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pktlen = dev->pipedatalen[pipeno];
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if (NRF24L01_DYN_LENGTH == pktlen)
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@ -572,11 +589,19 @@ static void nrf24l01_worker(FAR void *arg)
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nrf24l01_access(dev, MODE_READ, NRF24L01_R_RX_PL_WID, &pktlen, 1);
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}
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if ( pktlen > NRF24L01_MAX_PAYLOAD_LEN ) /* bad length */
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{
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werr("invalid length in rx: %d\n", (int)pktlen);
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nrf24l01_flush_rx(dev);
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break;
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}
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/* Get payload content */
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nrf24l01_access(dev, MODE_READ, NRF24L01_R_RX_PAYLOAD, buf, pktlen);
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fifoput(dev, pipeno, buf, pktlen);
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has_data = true;
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sem_post(&dev->sem_rx); /* Wake-up any thread waiting in recv */
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status = nrf24l01_readreg(dev, NRF24L01_FIFO_STATUS, &fifo_status, 1);
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@ -584,7 +609,17 @@ static void nrf24l01_worker(FAR void *arg)
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winfo("FIFO_STATUS=%02x\n", fifo_status);
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winfo("STATUS=%02x\n", status);
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}
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while (!(fifo_status | NRF24L01_RX_EMPTY));
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while ( !(fifo_status & NRF24L01_RX_EMPTY) ); /* 1=empty 0=more data */
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#ifndef CONFIG_DISABLE_POLL
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if (dev->pfd && has_data)
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{
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dev->pfd->revents |= POLLIN; /* Data available for input */
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winfo("Wake up polled fd\n");
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sem_post(dev->pfd->sem);
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}
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#endif
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/* Clear interrupt sources */
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@ -593,23 +628,24 @@ static void nrf24l01_worker(FAR void *arg)
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/* Restore CE */
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nrf24l01_chipenable(dev, ce);
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#ifndef CONFIG_DISABLE_POLL
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if (dev->pfd)
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{
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dev->pfd->revents |= POLLIN; /* Data available for input */
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winfo("Wake up polled fd");
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sem_post(dev->pfd->sem);
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}
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#endif
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}
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if (status & (NRF24L01_TX_DS | NRF24L01_MAX_RT))
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{
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/* The actual work is done in the send function */
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/* confirm send */
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sem_post(&dev->sem_tx);
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nrf24l01_chipenable(dev, false);
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if ( dev->tx_pending )
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{
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/* The actual work is done in the send function */
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sem_post(&dev->sem_tx);
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}
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else
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{
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werr("invalid length in rx: %d\n", (int)pktlen);
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}
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}
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if (dev->state == ST_RX)
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@ -679,33 +715,40 @@ static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_
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nrf24l01_tostate(dev, ST_STANDBY);
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/* flush old - can't harm */
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nrf24l01_flush_tx(dev);
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/* Write payload */
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nrf24l01_access(dev, MODE_WRITE, NRF24L01_W_TX_PAYLOAD, (FAR uint8_t *)data, datalen);
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/* Enable CE to start transmission */
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nrf24l01_chipenable(dev, true);
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dev->tx_pending = true;
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/* Free the SPI bus during the IRQ wait */
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nrf24l01_unlock(dev->spi);
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/* Wait for IRQ (TX_DS or MAX_RT) */
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/* cause rising CE edge to start transmission */
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while (sem_wait(&dev->sem_tx) != 0)
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{
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/* Note that we really need to wait here, as the interrupt source
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* (either TX_DS in case of success, or MAX_RT for failure) needs to be cleared.
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*/
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nrf24l01_chipenable(dev, true);
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DEBUGASSERT(errno == EINTR);
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}
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/* Wait for IRQ (TX_DS or MAX_RT) - but don't hang on lost IRQ */
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result = sem_tickwait(&dev->sem_tx, clock_systimer(), MSEC2TICK(NRF24L01_MAX_TX_IRQ_WAIT));
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/* Re-acquire the SPI bus */
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nrf24l01_lock(dev->spi);
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dev->tx_pending = false;
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if ( result < 0 )
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{
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werr("wait for irq failed\n");
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nrf24l01_flush_tx(dev);
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goto out;
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}
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status = nrf24l01_readreg(dev, NRF24L01_OBSERVE_TX, &obsvalue, 1);
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if (status & NRF24L01_TX_DS)
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{
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@ -719,7 +762,7 @@ static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_
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}
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else if (status & NRF24L01_MAX_RT)
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{
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winfo("MAX_RT!\n", dev->lastxmitcount);
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winfo("MAX_RT! (lastxmitcount=%d)\n", dev->lastxmitcount);
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result = -ECOMM;
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dev->lastxmitcount = NRF24L01_XMIT_MAXRT;
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@ -735,10 +778,15 @@ static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_
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result = -EIO;
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}
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out:
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/* Clear interrupt sources */
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nrf24l01_writeregbyte(dev, NRF24L01_STATUS, NRF24L01_TX_DS | NRF24L01_MAX_RT);
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/* Clear fifo */
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nrf24l01_flush_tx(dev);
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/* Restore state */
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nrf24l01_tostate(dev, prevstate);
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@ -1152,6 +1200,16 @@ static int nrf24l01_poll(FAR struct file *filep, FAR struct pollfd *fds,
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}
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dev->pfd = fds;
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/* is there is already data in the fifo? then trigger POLLIN now - don't wait for RX */
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sem_wait(&dev->sem_fifo);
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if ( dev->fifo_len > 0 )
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{
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dev->pfd->revents |= POLLIN; /* Data available for input */
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sem_post(dev->pfd->sem);
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}
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sem_post(&dev->sem_fifo);
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}
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else /* Tear it down */
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{
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@ -92,11 +92,9 @@
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#ifdef NRF24L01_DEBUG
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# define werr(format, ...) _err(format, ##__VA_ARGS__)
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# define werr(format, ...) _err(format, ##__VA_ARGS__)
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# define winfo(format, ...) _info(format, ##__VA_ARGS__)
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#else
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# define werr(x...)
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# define werr(x...)
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# define winfo(x...)
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#endif
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