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Fix DM320 serial configuration problem

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@661 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2008-02-08 17:25:29 +00:00
parent 01eecb67ea
commit 55a397984b
3 changed files with 25 additions and 21 deletions
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10
arch/arm/src/common/up_internal.h
View File

@ -49,11 +49,11 @@
* board bring-up and not part of normal platform configuration.
*/
#undef CONFIG_SUPPRESS_INTERRUPTS /* Do not enable interrupts */
#undef CONFIG_SUPPRESS_TIMER_INTS /* No timer */
#undef CONFIG_SUPPRESS_SERIAL_INTS /* Console will poll */
#define CONFIG_SUPPRESS_UART_CONFIG 1 /* Do not reconfig UART */
#undef CONFIG_DUMP_ON_EXIT /* Dump task state on exit */
#undef CONFIG_SUPPRESS_INTERRUPTS /* DEFINED: Do not enable interrupts */
#undef CONFIG_SUPPRESS_TIMER_INTS /* DEFINED: No timer */
#undef CONFIG_SUPPRESS_SERIAL_INTS /* DEFINED: Console will poll */
#undef CONFIG_SUPPRESS_UART_CONFIG /* DEFINED: Do not reconfig UART */
#undef CONFIG_DUMP_ON_EXIT /* DEFINED: Dump task state on exit */
/****************************************************************************
* Public Types

2
arch/arm/src/dm320/dm320_serial.c
View File

@ -379,7 +379,7 @@ static int up_setup(struct uart_dev_s *dev)
/* Setup the new UART configuration */
up_serialout(priv,UART_MSR, priv->msr);
up_serialout(priv, UART_MSR, priv->msr);
up_serialout(priv, UART_BRSR, brsr);
up_enablebreaks(priv, FALSE);
#endif

34
arch/arm/src/dm320/dm320_uart.h
View File

@ -70,24 +70,28 @@
#define UART_DTRR_DTR_MASK 0x00ff /* Data transmit/receive */
/* UART BRSR register bit definitions */
/* The UART clock is half of the ARM clock */
/* The UART module is clocked by either the AHB clock or PLLIN / 16 */
#define UART_CLK (DM320_ARM_CLOCK / 2)
#ifdef CONFIG_DM320_UARTPPLIN
# define UART_REFCLK (27000000 / 16)
#else
# define UART_REFCLK (DM320_AHB_CLOCK / 16)
#endif
/* And baud rate = UART_CLK / 16 / (VALUE+1) */
/* And baud = UART_REFCLK / (brsr+1) */
#define UART_BAUD_2400 ((uint16)(((UART_CLK / 16) / 2400 ) - 1))
#define UART_BAUD_4800 ((uint16)(((UART_CLK / 16) / 4800 ) - 1))
#define UART_BAUD_9600 ((uint16)(((UART_CLK / 16) / 9600 ) - 1))
#define UART_BAUD_14400 ((uint16)(((UART_CLK / 16) / 14400 ) - 1))
#define UART_BAUD_19200 ((uint16)(((UART_CLK / 16) / 19200 ) - 1))
#define UART_BAUD_28800 ((uint16)(((UART_CLK / 16) / 28800 ) - 1))
#define UART_BAUD_38400 ((uint16)(((UART_CLK / 16) / 38400 ) - 1))
#define UART_BAUD_57600 ((uint16)(((UART_CLK / 16) / 57600 ) - 1))
#define UART_BAUD_115200 ((uint16)(((UART_CLK / 16) / 115200) - 1))
#define UART_BAUD_230400 ((uint16)(((UART_CLK / 16) / 230400) - 1))
#define UART_BAUD_460800 ((uint16)(((UART_CLK / 16) / 460800) - 1))
#define UART_BAUD_921600 ((uint16)(((UART_CLK / 16) / 921600) - 1))
#define UART_BAUD_2400 ((uint16)((UART_REFCLK / 2400 ) - 1))
#define UART_BAUD_4800 ((uint16)((UART_REFCLK / 4800 ) - 1))
#define UART_BAUD_9600 ((uint16)((UART_REFCLK / 9600 ) - 1))
#define UART_BAUD_14400 ((uint16)((UART_REFCLK / 14400 ) - 1))
#define UART_BAUD_19200 ((uint16)((UART_REFCLK / 19200 ) - 1))
#define UART_BAUD_28800 ((uint16)((UART_REFCLK / 28800 ) - 1))
#define UART_BAUD_38400 ((uint16)((UART_REFCLK / 38400 ) - 1))
#define UART_BAUD_57600 ((uint16)((UART_REFCLK / 57600 ) - 1))
#define UART_BAUD_115200 ((uint16)((UART_REFCLK / 115200) - 1))
#define UART_BAUD_230400 ((uint16)((UART_REFCLK / 230400) - 1))
#define UART_BAUD_460800 ((uint16)((UART_REFCLK / 460800) - 1))
#define UART_BAUD_921600 ((uint16)((UART_REFCLK / 921600) - 1))
/* UART MSR register bit definitions */