imxrt:SPI add DMA support
This commit is contained in:
David Sidrane
Xiang Xiao
parent
fa58381e58
commit
55aaba53fc
@ -1809,6 +1809,55 @@ config IMXRT_EDMA_EDBG
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endmenu # eDMA Global Configuration
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menu "LPSPI Configuration"
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depends on IMXRT_LPSPI
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config IMXRT_LPSPI_DMA
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bool "LPSPI DMA"
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depends on IMXRT_EDMA
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default n
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---help---
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Use DMA to improve LPSPI transfer performance.
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config IMXRT_LPSPI_DMATHRESHOLD
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int "LPSPI DMA threshold"
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default 4
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depends on IMXRT_LPSPI_DMA
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---help---
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When SPI DMA is enabled, small DMA transfers will still be performed
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by polling logic. But we need a threshold value to determine what
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is small.
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config IMXRT_LPSPI1_DMA
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bool "LPSPI1 DMA"
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default n
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depends on IMXRT_LPSPI1 && IMXRT_LPSPI_DMA
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---help---
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Use DMA to improve LPSPI1 transfer performance.
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config IMXRT_LPSPI2_DMA
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bool "LPSPI2 DMA"
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default n
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depends on IMXRT_LPSPI2 && IMXRT_LPSPI_DMA
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---help---
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Use DMA to improve LPSPI2 transfer performance.
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config IMXRT_LPSPI3_DMA
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bool "LPSPI3 DMA"
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default n
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depends on IMXRT_LPSPI3 && IMXRT_LPSPI_DMA
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---help---
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Use DMA to improve LPSPI3 transfer performance.
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config IMXRT_LPSPI4_DMA
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bool "LPSPI4 DMA"
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default n
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depends on IMXRT_LPSPI4 && IMXRT_LPSPI_DMA
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---help---
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Use DMA to improve SPI4 transfer performance.
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endmenu # LPSPI Configuration
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if PM
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config IMXRT_PM_SERIAL_ACTIVITY
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@ -74,6 +74,9 @@
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#include "hardware/imxrt_ccm.h"
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#include "imxrt_periphclks.h"
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#include "hardware/imxrt_dmamux.h"
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#include "imxrt_edma.h"
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#if defined(CONFIG_IMXRT_LPSPI1) || defined(CONFIG_IMXRT_LPSPI2) || \
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defined(CONFIG_IMXRT_LPSPI3) || defined(CONFIG_IMXRT_LPSPI4)
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@ -89,16 +92,15 @@
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# error "Interrupt driven SPI not yet supported"
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#endif
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#if defined(CONFIG_IMXRT_LPSPI_DMA)
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# error "DMA mode is not yet supported"
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#endif
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/* Can't have both interrupt driven SPI and SPI DMA */
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#if defined(CONFIG_IMXRT_LPSPI_INTERRUPTS) && defined(CONFIG_IMXRT_LPSPI_DMA)
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# error "Cannot enable both interrupt mode and DMA mode for SPI"
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#endif
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#define SPI_SR_CLEAR (LPSPI_SR_WCF | LPSPI_SR_FCF | LPSPI_SR_TCF | \
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LPSPI_SR_TEF | LPSPI_SR_REF | LPSPI_SR_DMF)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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@ -115,6 +117,16 @@ struct imxrt_lpspidev_s
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uint32_t actual; /* Actual clock frequency */
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int8_t nbits; /* Width of word in bits */
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uint8_t mode; /* Mode 0,1,2,3 */
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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volatile uint32_t rxresult; /* Result of the RX DMA */
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volatile uint32_t txresult; /* Result of the TX DMA */
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const uint16_t rxch; /* The RX DMA channel number */
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const uint16_t txch; /* The TX DMA channel number */
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DMACH_HANDLE rxdma; /* DMA channel handle for RX transfers */
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DMACH_HANDLE txdma; /* DMA channel handle for TX transfers */
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sem_t rxsem; /* Wait for RX DMA to complete */
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sem_t txsem; /* Wait for TX DMA to complete */
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#endif
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};
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enum imxrt_delay_e
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@ -149,6 +161,21 @@ static inline void imxrt_lpspi_master_set_delay_scaler(
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uint32_t scaler,
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enum imxrt_delay_e type);
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/* DMA support */
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static int spi_dmarxwait(FAR struct imxrt_lpspidev_s *priv);
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static int spi_dmatxwait(FAR struct imxrt_lpspidev_s *priv);
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static inline void spi_dmarxwakeup(FAR struct imxrt_lpspidev_s *priv);
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static inline void spi_dmatxwakeup(FAR struct imxrt_lpspidev_s *priv);
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static void spi_dmarxcallback(DMACH_HANDLE handle, void *arg,
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bool done, int result);
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static void spi_dmatxcallback(DMACH_HANDLE handle, void *arg,
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bool done, int result);
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static inline void spi_dmarxstart(FAR struct imxrt_lpspidev_s *priv);
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static inline void spi_dmatxstart(FAR struct imxrt_lpspidev_s *priv);
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#endif
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/* SPI methods */
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static int imxrt_lpspi_lock(struct spi_dev_s *dev, bool lock);
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@ -221,9 +248,9 @@ static struct imxrt_lpspidev_s g_lpspi1dev =
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#ifdef CONFIG_IMXRT_LPSPI_INTERRUPTS
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.spiirq = IMXRT_IRQ_LPSPI1,
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#endif
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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.rxch = DMAMAP_LPSPI1_RX,
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.txch = DMAMAP_LPSPI1_TX,
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#ifdef CONFIG_IMXRT_LPSPI1_DMA
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.rxch = IMXRT_DMACHAN_LPSPI1_RX,
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.txch = IMXRT_DMACHAN_LPSPI1_TX,
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#endif
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};
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#endif
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@ -267,9 +294,9 @@ static struct imxrt_lpspidev_s g_lpspi2dev =
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#ifdef CONFIG_IMXRT_LPSPI_INTERRUPTS
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.spiirq = IMXRT_IRQ_LPSPI2,
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#endif
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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.rxch = DMAMAP_LPSPI2_RX,
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.txch = DMAMAP_LPSPI2_TX,
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#ifdef CONFIG_IMXRT_LPSPI2_DMA
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.rxch = IMXRT_DMACHAN_LPSPI2_RX,
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.txch = IMXRT_DMACHAN_LPSPI2_TX,
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#endif
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};
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#endif
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@ -313,9 +340,9 @@ static struct imxrt_lpspidev_s g_lpspi3dev =
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#ifdef CONFIG_IMXRT_LPSPI_INTERRUPTS
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.spiirq = IMXRT_IRQ_LPSPI3,
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#endif
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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.rxch = DMAMAP_LPSPI3_RX,
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.txch = DMAMAP_LPSPI3_TX,
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#ifdef CONFIG_IMXRT_LPSPI3_DMA
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.rxch = IMXRT_DMACHAN_LPSPI3_RX,
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.txch = IMXRT_DMACHAN_LPSPI3_TX,
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#endif
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};
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#endif
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@ -359,9 +386,9 @@ static struct imxrt_lpspidev_s g_lpspi4dev =
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#ifdef CONFIG_IMXRT_LPSPI_INTERRUPTS
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.spiirq = IMXRT_IRQ_LPSPI4,
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#endif
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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.rxch = DMAMAP_LPSPI4_RX,
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.txch = DMAMAP_LPSPI4_TX,
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#ifdef CONFIG_IMXRT_LPSPI4_DMA
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.rxch = IMXRT_DMACHAN_LPSPI4_RX,
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.txch = IMXRT_DMACHAN_LPSPI4_TX,
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#endif
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};
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#endif
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@ -596,7 +623,7 @@ imxrt_lpspi_9to16bitmode(struct imxrt_lpspidev_s *priv)
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}
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/****************************************************************************
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* Name: imxrt_lpspi_modifyreg
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* Name: imxrt_lpspi_modifyreg32
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*
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* Description:
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* Clear and set bits in register
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@ -1269,7 +1296,6 @@ static uint32_t imxrt_lpspi_send(struct spi_dev_s *dev, uint32_t wd)
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*
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****************************************************************************/
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#if !defined(CONFIG_IMXRT_LPSPI_DMA) || defined(CONFIG_IMXRT_DMACAPABLE)
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#if !defined(CONFIG_IMXRT_LPSPI_DMA)
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static void imxrt_lpspi_exchange(struct spi_dev_s *dev,
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const void *txbuffer,
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@ -1355,7 +1381,159 @@ static void imxrt_lpspi_exchange_nodma(struct spi_dev_s *dev,
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}
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}
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}
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#endif /* !CONFIG_IMXRT_LPSPI_DMA || CONFIG_IMXRT_DMACAPABLE */
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/****************************************************************************
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* Name: spi_exchange (with DMA capability)
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*
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* Description:
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* Exchange a block of data on SPI using DMA
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*
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* Input Parameters:
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* dev - Device-specific state data
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* txbuffer - A pointer to the buffer of data to be sent
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* rxbuffer - A pointer to a buffer in which to receive data
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* nwords - the length of data to be exchanged in units of words.
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* The wordsize is determined by the number of bits-per-word
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* selected for the SPI interface. If nbits <= 8, the data is
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* packed into uint8_t's; if nbits > 8, the data is packed into
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* uint16_t's
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static void imxrt_lpspi_exchange(FAR struct spi_dev_s * dev,
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FAR const void * txbuffer,
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FAR void * rxbuffer, size_t nwords)
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{
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int ret;
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size_t adjust;
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ssize_t nbytes;
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static uint8_t rxdummy[4] aligned_data(4);
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static const uint16_t txdummy = 0xffff;
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uint32_t regval;
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FAR struct imxrt_lpspidev_s *priv = (FAR struct imxrt_lpspidev_s *)dev;
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DEBUGASSERT(priv != NULL);
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DEBUGASSERT(priv && priv->spibase);
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spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
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/* Convert the number of word to a number of bytes */
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nbytes = (priv->nbits > 8) ? nwords << 2 : nwords;
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/* Invalid DMA channels fall back to non-DMA method. */
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if (priv->rxdma == NULL || priv->txdma == NULL
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#ifdef CONFIG_IMXRT_LPSPI_DMATHRESHOLD
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/* If this is a small SPI transfer, then let
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* imxrt_lpspi_exchange_nodma() do the work.
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*/
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|| nbytes <= CONFIG_IMXRT_LPSPI_DMATHRESHOLD
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#endif
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)
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{
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imxrt_lpspi_exchange_nodma(dev, txbuffer, rxbuffer, nwords);
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return;
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}
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/* ERR050456 workaround: Reset FIFOs using CR[RST] bit */
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regval = imxrt_lpspi_getreg32(priv, IMXRT_LPSPI_CFGR1_OFFSET);
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imxrt_lpspi_modifyreg32(priv, IMXRT_LPSPI_CR_OFFSET,
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LPSPI_CR_RTF | LPSPI_CR_RRF,
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LPSPI_CR_RTF | LPSPI_CR_RRF);
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imxrt_lpspi_putreg32(priv, IMXRT_LPSPI_CFGR1_OFFSET, regval);
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/* Clear all status bits */
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imxrt_lpspi_putreg32(priv, IMXRT_LPSPI_SR_OFFSET, SPI_SR_CLEAR);
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/* disable DMA */
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imxrt_lpspi_putreg32(priv, IMXRT_LPSPI_DER_OFFSET, 0);
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if (txbuffer)
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{
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up_clean_dcache((uintptr_t)txbuffer, (uintptr_t)txbuffer + nbytes);
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}
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if (rxbuffer)
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{
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up_invalidate_dcache((uintptr_t)rxbuffer,
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(uintptr_t)rxbuffer + nbytes);
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}
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/* Set up the DMA */
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adjust = (priv->nbits > 8) ? 2 : 1;
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struct imxrt_edma_xfrconfig_s config;
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config.saddr = priv->spibase + IMXRT_LPSPI_RDR_OFFSET;
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config.daddr = (uint32_t) (rxbuffer ? rxbuffer : rxdummy);
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config.soff = 0;
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config.doff = rxbuffer ? adjust : 0;
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config.iter = nbytes;
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config.flags = EDMA_CONFIG_LINKTYPE_LINKNONE;
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config.ssize = adjust == 1 ? EDMA_8BIT : EDMA_16BIT;
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config.dsize = adjust == 1 ? EDMA_8BIT : EDMA_16BIT;
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config.nbytes = adjust;
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#ifdef CONFIG_KINETIS_EDMA_ELINK
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config.linkch = NULL;
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#endif
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imxrt_dmach_xfrsetup(priv->rxdma, &config);
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config.saddr = (uint32_t) (txbuffer ? txbuffer : &txdummy);
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config.daddr = priv->spibase + IMXRT_LPSPI_TDR_OFFSET;
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config.soff = txbuffer ? adjust : 0;
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config.doff = 0;
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config.iter = nbytes;
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config.flags = EDMA_CONFIG_LINKTYPE_LINKNONE;
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config.ssize = adjust == 1 ? EDMA_8BIT : EDMA_16BIT;
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config.dsize = adjust == 1 ? EDMA_8BIT : EDMA_16BIT;
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config.nbytes = adjust;
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#ifdef CONFIG_KINETIS_EDMA_ELINK
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config.linkch = NULL;
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#endif
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imxrt_dmach_xfrsetup(priv->txdma, &config);
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/* Start the DMAs */
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spi_dmarxstart(priv);
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spi_dmatxstart(priv);
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/* Invoke SPI DMA */
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imxrt_lpspi_modifyreg32(priv, IMXRT_LPSPI_DER_OFFSET,
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0, LPSPI_DER_TDDE | LPSPI_DER_RDDE);
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/* Then wait for each to complete */
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ret = spi_dmarxwait(priv);
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if (ret < 0)
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{
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ret = spi_dmatxwait(priv);
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}
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/* Reset any status */
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imxrt_lpspi_putreg32(priv, IMXRT_LPSPI_SR_OFFSET,
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imxrt_lpspi_getreg32(priv,
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IMXRT_LPSPI_SR_OFFSET));
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/* Disable DMA */
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imxrt_lpspi_putreg32(priv, IMXRT_LPSPI_DER_OFFSET, 0);
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}
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#endif /* CONFIG_IMXRT_SPI_DMA */
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/****************************************************************************
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* Name: imxrt_lpspi_sndblock
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@ -1542,6 +1720,174 @@ static void imxrt_lpspi_bus_initialize(struct imxrt_lpspidev_s *priv)
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imxrt_lpspi_modifyreg32(priv, IMXRT_LPSPI_CR_OFFSET, 0, LPSPI_CR_MEN);
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}
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/****************************************************************************
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* Name: spi_dmarxwait
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*
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* Description:
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* Wait for DMA to complete.
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static int spi_dmarxwait(FAR struct imxrt_lpspidev_s *priv)
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{
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int ret;
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/* Take the semaphore (perhaps waiting). If the result is zero, then the
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* DMA must not really have completed.
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*/
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do
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{
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ret = nxsem_wait_uninterruptible(&priv->rxsem);
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/* The only expected error is ECANCELED which would occur if the
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* calling thread were canceled.
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*/
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DEBUGASSERT(ret == OK || ret == -ECANCELED);
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}
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while (priv->rxresult == 0 && ret == OK);
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return ret;
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}
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#endif
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/****************************************************************************
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* Name: spi_dmatxwait
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*
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* Description:
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* Wait for DMA to complete.
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static int spi_dmatxwait(FAR struct imxrt_lpspidev_s *priv)
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{
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int ret;
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/* Take the semaphore (perhaps waiting). If the result is zero, then the
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* DMA must not really have completed.
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*/
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do
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{
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ret = nxsem_wait_uninterruptible(&priv->txsem);
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/* The only expected error is ECANCELED which would occur if the
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* calling thread were canceled.
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*/
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DEBUGASSERT(ret == OK || ret == -ECANCELED);
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}
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while (priv->txresult == 0 && ret == OK);
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return ret;
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}
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#endif
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/****************************************************************************
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* Name: spi_dmarxwakeup
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*
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* Description:
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* Signal that DMA is complete
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static inline void spi_dmarxwakeup(FAR struct imxrt_lpspidev_s *priv)
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{
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nxsem_post(&priv->rxsem);
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}
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#endif
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/****************************************************************************
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* Name: spi_dmatxwakeup
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*
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* Description:
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* Signal that DMA is complete
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*
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static inline void spi_dmatxwakeup(FAR struct imxrt_lpspidev_s *priv)
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{
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nxsem_post(&priv->txsem);
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}
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#endif
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/****************************************************************************
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* Name: spi_dmarxcallback
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*
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* Description:
|
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* Called when the RX DMA completes
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_IMXRT_LPSPI_DMA
|
||||
static void spi_dmarxcallback(DMACH_HANDLE handle, void *arg, bool done,
|
||||
int result)
|
||||
{
|
||||
FAR struct imxrt_lpspidev_s *priv = (FAR struct imxrt_lpspidev_s *)arg;
|
||||
|
||||
priv->rxresult = result | 0x80000000; /* assure non-zero */
|
||||
spi_dmarxwakeup(priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: spi_dmatxcallback
|
||||
*
|
||||
* Description:
|
||||
* Called when the RX DMA completes
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_IMXRT_LPSPI_DMA
|
||||
static void spi_dmatxcallback(DMACH_HANDLE handle, void *arg, bool done,
|
||||
int result)
|
||||
{
|
||||
FAR struct imxrt_lpspidev_s *priv = (FAR struct imxrt_lpspidev_s *)arg;
|
||||
|
||||
/* Wake-up the SPI driver */
|
||||
|
||||
priv->txresult = result | 0x80000000; /* assure non-zero */
|
||||
spi_dmatxwakeup(priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: spi_dmarxstart
|
||||
*
|
||||
* Description:
|
||||
* Start RX DMA
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_IMXRT_LPSPI_DMA
|
||||
static inline void spi_dmarxstart(FAR struct imxrt_lpspidev_s *priv)
|
||||
{
|
||||
priv->rxresult = 0;
|
||||
imxrt_dmach_start(priv->rxdma, spi_dmarxcallback, priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: spi_dmatxstart
|
||||
*
|
||||
* Description:
|
||||
* Start TX DMA
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_IMXRT_LPSPI_DMA
|
||||
static inline void spi_dmatxstart(FAR struct imxrt_lpspidev_s *priv)
|
||||
{
|
||||
priv->txresult = 0;
|
||||
imxrt_dmach_start(priv->txdma, spi_dmatxcallback, priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
@ -1694,9 +2040,39 @@ struct spi_dev_s *imxrt_lpspibus_initialize(int bus)
|
||||
spierr("ERROR: Unsupported SPI bus: %d\n", bus);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IMXRT_LPSPI_DMA
|
||||
/* Initialize the SPI semaphores that is used to wait for DMA completion.
|
||||
* This semaphore is used for signaling and, hence, should not have
|
||||
* priority inheritance enabled.
|
||||
*/
|
||||
|
||||
if (priv->rxch && priv->txch)
|
||||
{
|
||||
if (priv->txdma == NULL && priv->rxdma == NULL)
|
||||
{
|
||||
nxsem_init(&priv->rxsem, 0, 0);
|
||||
nxsem_init(&priv->txsem, 0, 0);
|
||||
|
||||
nxsem_set_protocol(&priv->rxsem, SEM_PRIO_NONE);
|
||||
nxsem_set_protocol(&priv->txsem, SEM_PRIO_NONE);
|
||||
|
||||
priv->txdma = imxrt_dmach_alloc(priv->txch | DMAMUX_CHCFG_ENBL,
|
||||
0);
|
||||
priv->rxdma = imxrt_dmach_alloc(priv->rxch | DMAMUX_CHCFG_ENBL,
|
||||
0);
|
||||
DEBUGASSERT(priv->rxdma && priv->txdma);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
priv->rxdma = NULL;
|
||||
priv->txdma = NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
leave_critical_section(flags);
|
||||
|
||||
return (struct spi_dev_s *)priv;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_IMXRT_LPSPI1 */
|
||||
#endif /* CONFIG_IMXRT_LPSPI1 || CONFIG_IMXRT_LPSPI2 || CONFIG_IMXRT_LPSPI3 || CONFIG_IMXRT_LPSPI4 */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user