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Use the correct register and bit to send an STM32 non-bsd compatible break

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This commit is contained in:
David Sidrane 2016-05-17 07:54:26 -10:00
parent 8bd57a7fbc
commit 55d8b0e277
3 changed files with 18 additions and 18 deletions
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12
arch/arm/src/stm32/stm32_serial.c
View File

@ -2060,24 +2060,24 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_USART_BREAKS
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
uint32_t cr2;
uint32_t cr1;
irqstate_t flags;
flags = enter_critical_section();
cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET);
up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN);
cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
uint32_t cr2;
uint32_t cr1;
irqstate_t flags;
flags = enter_critical_section();
cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET);
up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN);
cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
leave_critical_section(flags);
}
break;

12
arch/arm/src/stm32f7/stm32_serial.c
View File

@ -1967,24 +1967,24 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_USART_BREAKS
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
uint32_t cr2;
uint32_t cr1;
irqstate_t flags;
flags = enter_critical_section();
cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET);
up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN);
cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
uint32_t cr2;
uint32_t cr1;
irqstate_t flags;
flags = enter_critical_section();
cr2 = up_serialin(priv, STM32_USART_CR2_OFFSET);
up_serialout(priv, STM32_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN);
cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
leave_critical_section(flags);
}
break;

12
arch/arm/src/stm32l4/stm32l4_serial.c
View File

@ -1723,24 +1723,24 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_USART_BREAKS
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
uint32_t cr2;
uint32_t cr1;
irqstate_t flags;
flags = enter_critical_section();
cr2 = up_serialin(priv, STM32L4_USART_CR2_OFFSET);
up_serialout(priv, STM32L4_USART_CR2_OFFSET, cr2 | USART_CR2_LINEN);
cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 | USART_CR1_SBK);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
uint32_t cr2;
uint32_t cr1;
irqstate_t flags;
flags = enter_critical_section();
cr2 = up_serialin(priv, STM32L4_USART_CR2_OFFSET);
up_serialout(priv, STM32L4_USART_CR2_OFFSET, cr2 & ~USART_CR2_LINEN);
cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
up_serialout(priv, STM32_USART_CR1_OFFSET, cr1 & ~USART_CR1_SBK);
leave_critical_section(flags);
}
break;