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STM3240G-EVAL LCD updates

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4656 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-04-25 22:14:00 +00:00
parent d0966fb200
commit 55dfb14526
2 changed files with 11 additions and 12 deletions
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15
configs/stm3240g-eval/src/up_lcd.c
View File

@ -36,7 +36,7 @@
**************************************************************************************/ **************************************************************************************/
/* This driver supports the following LCDs on the STM324xG_EVAL board: /* This driver supports the following LCDs on the STM324xG_EVAL board:
* *
* AM-240320L8TNQW00H (LCD_ILI9320) and * AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) and
* AM-240320D5TOQW01H (LCD_ILI9325) * AM-240320D5TOQW01H (LCD_ILI9325)
*/ */
@ -69,7 +69,7 @@
**************************************************************************************/ **************************************************************************************/
/* Configuration **********************************************************************/ /* Configuration **********************************************************************/
/* CONFIG_STM32_ILI9320_DISABLE may be defined to disabled the AM-240320L8TNQW00H /* CONFIG_STM32_ILI9320_DISABLE may be defined to disabled the AM-240320L8TNQW00H
* (LCD_ILI9320) * (LCD_ILI9320 or LCD_ILI9321)
* CONFIG_STM32_ILI9325_DISABLE may be defined to disabled the AM-240320D5TOQW01H * CONFIG_STM32_ILI9325_DISABLE may be defined to disabled the AM-240320D5TOQW01H
* (LCD_ILI9325) * (LCD_ILI9325)
*/ */
@ -169,9 +169,9 @@
#define STM3240G_COLORFMT FB_FMT_RGB16_565 #define STM3240G_COLORFMT FB_FMT_RGB16_565
/* STM3240G-EVAL LCD Hardware Definitions *********************************************/ /* STM3240G-EVAL LCD Hardware Definitions *********************************************/
/* LCD /CS is CE4, Bank 4 of NOR/SRAM Bank 1~4 */ /* LCD /CS is CE4, Bank 3 of NOR/SRAM Bank 1~4 */
#define STM3240G_LCDBASE ((uint32_t)(0x60000000 | 0x0c000000)) #define STM3240G_LCDBASE ((uint32_t)(0x60000000 | 0x08000000))
#define LCD ((struct lcd_regs_s *) STM3240G_LCDBASE) #define LCD ((struct lcd_regs_s *) STM3240G_LCDBASE)
#define LCD_REG_0 0x00 #define LCD_REG_0 0x00
@ -288,6 +288,7 @@
/* LCD IDs */ /* LCD IDs */
#define ILI9320_ID 0x9320 #define ILI9320_ID 0x9320
#define ILI9321_ID 0x9321
#define ILI9325_ID 0x9325 #define ILI9325_ID 0x9325
/* Debug ******************************************************************************/ /* Debug ******************************************************************************/
@ -1016,10 +1017,10 @@ static inline void stm3240g_lcdinitialize(void)
id = stm3240g_readreg(LCD_REG_0); id = stm3240g_readreg(LCD_REG_0);
lcddbg("LCD ID: %04x\n", id); lcddbg("LCD ID: %04x\n", id);
/* Check if the ID is for the STM32_ILI9320 & STM32_ILI9325 */ /* Check if the ID is for the STM32_ILI9320 (or ILI9321) & STM32_ILI9325 */
#if !defined(CONFIG_STM32_ILI9320_DISABLE) #if !defined(CONFIG_STM32_ILI9320_DISABLE)
if (id == 0x9320) if ((id == ILI9320_ID) || (id == ILI9321_ID))
{ {
g_lcddev.type = LCD_TYPE_ILI9320; g_lcddev.type = LCD_TYPE_ILI9320;
lcddbg("LCD type: %d\n", g_lcddev.type); lcddbg("LCD type: %d\n", g_lcddev.type);
@ -1114,7 +1115,7 @@ static inline void stm3240g_lcdinitialize(void)
else else
#endif #endif
#if !defined(CONFIG_STM32_ILI9325_DISABLE) #if !defined(CONFIG_STM32_ILI9325_DISABLE)
if (id == 0x9325) if (id == ILI9325_ID)
{ {
g_lcddev.type = LCD_TYPE_ILI9325; g_lcddev.type = LCD_TYPE_ILI9325;
lcddbg("LCD type: %d\n", g_lcddev.type); lcddbg("LCD type: %d\n", g_lcddev.type);

8
configs/stm3240g-eval/src/up_selectlcd.c
View File

@ -141,17 +141,16 @@ void stm32_selectlcd(void)
/* Color LCD configuration (LCD configured as follow): /* Color LCD configuration (LCD configured as follow):
* *
* - Data/Address MUX = Disable "FSMC_BCR_MUXEN" just not enable it. * - Data/Address MUX = Disable "FSMC_BCR_MUXEN" just not enable it.
* - Extended Mode = Disable "FSMC_BCR_EXTMOD"
* - Memory Type = SRAM "FSMC_BCR_SRAM" * - Memory Type = SRAM "FSMC_BCR_SRAM"
* - Data Width = 16bit "FSMC_BCR_MWID16" * - Data Width = 16bit "FSMC_BCR_MWID16"
* - Write Operation = Enable "FSMC_BCR_WREN" * - Write Operation = Enable "FSMC_BCR_WREN"
* - Extended Mode = Enable "FSMC_BCR_EXTMOD"
* - Asynchronous Wait = Disable * - Asynchronous Wait = Disable
*/ */
/* Bank3 NOR/SRAM control register configuration */ /* Bank3 NOR/SRAM control register configuration */
putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN | FSMC_BCR_EXTMOD, putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR3);
STM32_FSMC_BCR3);
/* Bank3 NOR/SRAM timing register configuration */ /* Bank3 NOR/SRAM timing register configuration */
@ -162,8 +161,7 @@ void stm32_selectlcd(void)
/* Enable the bank by setting the MBKEN bit */ /* Enable the bank by setting the MBKEN bit */
putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN | FSMC_BCR_EXTMOD, putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR3);
STM32_FSMC_BCR3);
} }
#endif /* CONFIG_STM32_FSMC */ #endif /* CONFIG_STM32_FSMC */