tiva/serial: Allow changing CTS/RTS with termios
This is a follow-up to PR #6548, which added UART CTS/RTS support for Tiva (TI TM4C12x) microcontrollers. This follow-up makes it possible, when termios support is enabled with CONFIG_SERIAL_TERMIOS and CTS/RTS support is enabled with CONFIG_SERIAL_OFLOWCONTROL and/or CONFIG_SERIAL_IFLOWCONTROL, to query whether CTS/RTS are on/off at runtime by utilizing ioctl TCGETS and to turn CTS/RTS on/off at runtime by utilizing ioctl TCSETS. * arch/arm/src/tiva/common/tiva_serial.c (up_set_format): Because this function is called from ioctl TCSETS to modify UART settings, and that IOCTL now respects CCTS_OFLOW and CRTS_IFLOW, move setting/clearing of Tiva UART's CTL register's RTSEN and CTSEN bits here... (up_setup): ...from here. (up_ioctl): For TCGETS, populate CCTS_OFLOW and CRTS_IFLOW bits as appropriate. For TCSETS, populate priv's oflow and iflow from supplied CCTS_OFLOW and CRTS_IFLOW bits. Thanks to Petro Karashchenko for review and suggested fixes. Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
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f2e15b431c
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5651940d02
@ -871,12 +871,36 @@ static void up_set_format(struct uart_dev_s *dev)
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up_serialout(priv, TIVA_UART_LCRH_OFFSET, lcrh);
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/* Enable or disable CTS/RTS, if applicable */
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#if defined(CONFIG_SERIAL_IFLOWCONTROL)
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if (priv->iflow)
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{
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ctl |= UART_CTL_RTSEN;
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}
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else
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{
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ctl &= ~UART_CTL_RTSEN;
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}
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#endif
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#if defined(CONFIG_SERIAL_OFLOWCONTROL)
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if (priv->oflow)
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{
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ctl |= UART_CTL_CTSEN;
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}
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else
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{
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ctl &= ~UART_CTL_CTSEN;
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}
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#endif
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if (was_active)
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{
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ctl = up_serialin(priv, TIVA_UART_CTL_OFFSET);
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ctl |= UART_CTL_UARTEN;
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up_serialout(priv, TIVA_UART_CTL_OFFSET, ctl);
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}
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up_serialout(priv, TIVA_UART_CTL_OFFSET, ctl);
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}
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/****************************************************************************
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@ -923,33 +947,11 @@ static int up_setup(struct uart_dev_s *dev)
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lcrh |= UART_LCRH_FEN;
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up_serialout(priv, TIVA_UART_LCRH_OFFSET, lcrh);
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/* Enable Rx, Tx, CTS/RTS (if requested), and the UART */
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/* Enable Rx, Tx, and the UART */
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ctl = up_serialin(priv, TIVA_UART_CTL_OFFSET);
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ctl |= (UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE);
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#if defined(CONFIG_SERIAL_IFLOWCONTROL)
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if (priv->iflow)
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{
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ctl |= UART_CTL_RTSEN;
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}
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else
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{
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ctl &= ~(UART_CTL_RTSEN);
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}
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#endif
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#if defined(CONFIG_SERIAL_OFLOWCONTROL)
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if (priv->oflow)
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{
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ctl |= UART_CTL_CTSEN;
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}
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else
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{
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ctl &= ~(UART_CTL_CTSEN);
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}
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#endif
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up_serialout(priv, TIVA_UART_CTL_OFFSET, ctl);
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/* Set up the cache IM value */
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@ -1156,8 +1158,22 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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ccflag |= PARENB | PARODD;
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}
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/* TODO append support for HUPCL, CLOCAL and flow control bits
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* as well as os-compliant break sequence
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#ifdef CONFIG_SERIAL_OFLOWCONTROL
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if (priv->oflow)
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{
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ccflag |= CCTS_OFLOW;
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}
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#endif
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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if (priv->iflow)
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{
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ccflag |= CRTS_IFLOW;
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}
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#endif
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/* TODO append support for HUPCL and CLOCAL as well as os-compliant
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* break sequence
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*/
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termiosp->c_cflag = ccflag;
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@ -1201,6 +1217,13 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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priv->bits = (termiosp->c_cflag & CSIZE) + 5;
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priv->baud = cfgetispeed(termiosp);
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#ifdef CONFIG_SERIAL_OFLOWCONTROL
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priv->oflow = (termiosp->c_cflag & CCTS_OFLOW) != 0;
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#endif
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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priv->iflow = (termiosp->c_cflag & CRTS_IFLOW) != 0;
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#endif
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/* Effect the changes immediately - note that we do not implement
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* TCSADRAIN / TCSAFLUSH
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*/
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