espressif: Update internal libraries reference
Update internal reference to get the most updated Espressif's libraries. Those libraries are based on branch `release/v5.1` of the ESP-IDF and include `v5.1.4` version of it.
This commit is contained in:
Tiago Medicci Serrano
Xiang Xiao
parent
c40358ff0d
commit
5680e9d5a4
@ -130,7 +130,7 @@ endif
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ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
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ifndef ESP_HAL_3RDPARTY_VERSION
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ESP_HAL_3RDPARTY_VERSION = 8e8e62cf6a7ae8a9659b91706024cab38af29118
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ESP_HAL_3RDPARTY_VERSION = 51afbfd1a17e806fa6fd8227a18395c1bbecbad3
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endif
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ifndef ESP_HAL_3RDPARTY_URL
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@ -161,7 +161,7 @@ include common$(DELIM)espressif$(DELIM)Bootloader.mk
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# Silent preprocessor warnings
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CFLAGS += -Wno-undef -Wno-unused-variable
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CFLAGS += -Wno-undef -Wno-unused-variable -fno-jump-tables -fno-tree-switch-conversion
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# Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration
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@ -68,6 +68,7 @@ CHIP_CSRCS += pkcs5.c
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CHIP_CSRCS += platform_util.c
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CHIP_CSRCS += platform.c
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CHIP_CSRCS += sha1.c
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CHIP_CSRCS += sha3.c
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CHIP_CSRCS += sha256.c
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CHIP_CSRCS += sha512.c
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CHIP_CSRCS += pk.c
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@ -81,9 +82,9 @@ CHIP_CSRCS += md5.c
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CHIP_CSRCS += oid.c
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CHIP_CSRCS += pem.c
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CHIP_CSRCS += hmac_drbg.c
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CHIP_CSRCS += hash_info.c
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CHIP_CSRCS += rsa_alt_helpers.c
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CHIP_CSRCS += ecdh.c
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CHIP_CSRCS += pk_ecc.c
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VPATH += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port
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@ -112,6 +113,7 @@ CFLAGS += $(DEFINE_PREFIX)IEEE8021X_EAPOL
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CFLAGS += $(DEFINE_PREFIX)USE_WPA2_TASK
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CFLAGS += $(DEFINE_PREFIX)CONFIG_SHA256
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CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE
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CFLAGS += $(DEFINE_PREFIX)USE_WPS_TASK
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ifeq ($(CONFIG_ESPRESSIF_WIFI_ENABLE_SAE_PK),y)
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CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE_PK
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@ -222,11 +224,11 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)
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CHIP_CSRCS += esp_common.c
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CHIP_CSRCS += esp_hostap.c
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CHIP_CSRCS += esp_wpa_main.c
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CHIP_CSRCS += esp_wpa2.c
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CHIP_CSRCS += esp_wpa3.c
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CHIP_CSRCS += esp_wpas_glue.c
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CHIP_CSRCS += esp_owe.c
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CHIP_CSRCS += esp_scan.c
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CHIP_CSRCS += esp_wps.c
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VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src$(DELIM)crypto
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@ -424,6 +424,47 @@ void IRAM_ATTR esp_hr_timer_start(struct esp_hr_timer_s *timer,
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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/****************************************************************************
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* Name: esp_hr_timer_start_once
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*
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* Description:
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* Start the High Resolution Timer with one shot mode.
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*
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* Input Parameters:
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* timer - HR Timer pointer.
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* timeout - Timeout value.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp_hr_timer_start_once(struct esp_hr_timer_s *timer, uint64_t timeout)
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{
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esp_hr_timer_start(timer, timeout, false);
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}
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/****************************************************************************
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* Name: esp_hr_timer_start_periodic
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*
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* Description:
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* Start the High Resolution Timer with periodic mode.
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*
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* Input Parameters:
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* timer - HR Timer pointer.
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* timeout - Timeout value.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp_hr_timer_start_periodic(struct esp_hr_timer_s *timer,
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uint64_t timeout)
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{
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esp_hr_timer_start(timer, timeout, true);
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}
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/****************************************************************************
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* Name: esp_hr_timer_stop
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*
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@ -71,6 +71,8 @@ struct esp_hr_timer_args_s
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{
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void (*callback)(void *arg); /* Callback function */
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void *arg; /* Private data */
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const char *name; /* Timer name, used in esp_timer_dump function */
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bool skip_unhandled_events; /* Skip unhandled events for periodic timers */
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};
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#undef EXTERN
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@ -127,6 +129,41 @@ void esp_hr_timer_start(struct esp_hr_timer_s *timer,
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uint64_t timeout,
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bool repeat);
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/****************************************************************************
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* Name: esp_hr_timer_start_once
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*
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* Description:
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* Start the High Resolution Timer with one shot mode.
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*
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* Input Parameters:
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* timer - HR Timer pointer.
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* timeout - Timeout value.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp_hr_timer_start_once(struct esp_hr_timer_s *timer, uint64_t timeout);
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/****************************************************************************
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* Name: esp_hr_timer_start_periodic
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*
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* Description:
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* Start the High Resolution Timer with periodic mode.
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*
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* Input Parameters:
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* timer - HR Timer pointer.
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* timeout - Timeout value.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp_hr_timer_start_periodic(struct esp_hr_timer_s *timer,
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uint64_t timeout);
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/****************************************************************************
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* Name: esp_hr_timer_stop
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*
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@ -38,6 +38,7 @@
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#include "esp_start.h"
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#include "esp_clk_internal.h"
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#include "esp_private/rtc_clk.h"
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#include "esp_cpu.h"
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#include "esp_private/brownout.h"
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#include "hal/wdt_hal.h"
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@ -436,6 +437,10 @@ void __esp_start(void)
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CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
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#endif /* CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE */
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#if CONFIG_ESP_SYSTEM_BBPLL_RECALIB
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rtc_clk_recalib_bbpll();
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#endif
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#ifdef CONFIG_ESPRESSIF_REGION_PROTECTION
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/* Configure region protection */
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@ -35,7 +35,7 @@
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#include "esp_sleep.h"
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#include "esp_private/esp_clk.h"
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#include "esp_wpa.h"
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#include "esp_coexist_internal.h"
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#include "private/esp_coexist_internal.h"
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#include "esp_phy_init.h"
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#include "esp_private/phy.h"
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@ -237,7 +237,7 @@ endif
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ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
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ifndef ESP_HAL_3RDPARTY_VERSION
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ESP_HAL_3RDPARTY_VERSION = 45c33111b441363e1267158186a60f42525228ca
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ESP_HAL_3RDPARTY_VERSION = 51afbfd1a17e806fa6fd8227a18395c1bbecbad3
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endif
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ifndef ESP_HAL_3RDPARTY_URL
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@ -41,11 +41,11 @@
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#include "esp_timer.h"
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#include "soc/rtc.h"
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#include "esp_private/esp_clk.h"
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#include "esp_coexist_adapter.h"
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#include "private/esp_coexist_adapter.h"
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#include "rom/ets_sys.h"
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#include "soc/soc_caps.h"
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#include "soc/system_reg.h"
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#include "esp_modem_wrapper.h"
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#include "private/esp_modem_wrapper.h"
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/****************************************************************************
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* Pre-processor Definitions
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@ -74,9 +74,9 @@
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#include "esp_private/esp_clk.h"
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#include "os.h"
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#include "esp_smartconfig.h"
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#include "esp_coexist_internal.h"
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#include "private/esp_coexist_internal.h"
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#include "rom/ets_sys.h"
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#include "esp_modem_wrapper.h"
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#include "private/esp_modem_wrapper.h"
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#include "esp_wlan.h"
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#include "esp_wifi_adapter.h"
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@ -282,6 +282,8 @@ int32_t esp_event_post_wrapper(const char *event_base,
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uint32_t ticks);
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static void wifi_apb80m_request_wrapper(void);
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static void wifi_apb80m_release_wrapper(void);
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static void esp_phy_enable_wrapper(void);
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static void esp_phy_disable_wrapper(void);
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static void timer_arm_wrapper(void *timer, uint32_t tmout, bool repeat);
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static void wifi_reset_mac_wrapper(void);
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static void wifi_rtc_enable_iso_wrapper(void);
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@ -327,6 +329,8 @@ static void *coex_schm_curr_phase_get_wrapper(void);
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static int coex_register_start_cb_wrapper(int (* cb)(void));
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static int coex_schm_process_restart_wrapper(void);
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static int coex_schm_register_cb_wrapper(int type, int(*cb)(int));
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static int coex_schm_flexible_period_set_wrapper(uint8_t period);
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static uint8_t coex_schm_flexible_period_get_wrapper(void);
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static void esp_empty_wrapper(void);
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/* Second block of functions
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@ -501,8 +505,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
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esp_empty_wrapper,
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._wifi_apb80m_request = wifi_apb80m_request_wrapper,
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._wifi_apb80m_release = wifi_apb80m_release_wrapper,
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._phy_disable = esp_phy_disable,
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._phy_enable = esp_phy_enable,
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._phy_disable = esp_phy_disable_wrapper,
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._phy_enable = esp_phy_enable_wrapper,
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._phy_update_country_info = esp_phy_update_country_info,
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._read_mac = esp_read_mac_wrapper,
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._timer_arm = timer_arm_wrapper,
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@ -564,6 +568,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
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._coex_register_start_cb = coex_register_start_cb_wrapper,
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._coex_schm_process_restart = coex_schm_process_restart_wrapper,
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._coex_schm_register_cb = coex_schm_register_cb_wrapper,
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._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
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._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
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._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
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};
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@ -1561,6 +1567,48 @@ static void IRAM_ATTR wifi_apb80m_release_wrapper(void)
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#endif
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}
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/****************************************************************************
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* Name: esp_phy_enable_wrapper
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*
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* Description:
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* This function enables the WiFi PHY. It first enables the PHY for the
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* WiFi modem, then sets the WiFi PHY enable flag to 1.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void esp_phy_enable_wrapper(void)
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{
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esp_phy_enable(PHY_MODEM_WIFI);
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phy_wifi_enable_set(1);
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}
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/****************************************************************************
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* Name: esp_phy_disable_wrapper
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*
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* Description:
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* This function disables the WiFi PHY. It first sets the WiFi PHY enable
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* flag to 0, then disables the PHY for the WiFi modem.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void esp_phy_disable_wrapper(void)
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{
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phy_wifi_enable_set(0);
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esp_phy_disable(PHY_MODEM_WIFI);
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}
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/****************************************************************************
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* Name: timer_arm_wrapper
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*
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@ -2345,6 +2393,60 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
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#endif
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}
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/****************************************************************************
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* Name: coex_schm_flexible_period_set_wrapper
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*
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* Description:
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* This function sets the coexistence scheme flexible period. If the
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* coexistence power management feature is enabled
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* (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the function
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* coex_schm_flexible_period_set with the given period and returns its
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* result. If the feature is not enabled, it returns 0.
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*
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* Input Parameters:
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* period - The flexible period to set.
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*
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* Returned Value:
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* ESP_OK on success, or the result of coex_schm_flexible_period_set.
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*
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****************************************************************************/
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static int coex_schm_flexible_period_set_wrapper(uint8_t period)
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{
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#if CONFIG_ESP_COEX_POWER_MANAGEMENT
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return coex_schm_flexible_period_set(period);
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#else
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return 0;
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#endif
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}
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/****************************************************************************
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* Name: coex_schm_flexible_period_get_wrapper
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*
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* Description:
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* This function gets the coexistence scheme flexible period. If the
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* coexistence power management feature is enabled
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* (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the function
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* coex_schm_flexible_period_get and returns its result. If the feature is
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* not enabled, it returns 1.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* The coexistence scheme flexible period.
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*
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****************************************************************************/
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static uint8_t coex_schm_flexible_period_get_wrapper(void)
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{
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#if CONFIG_ESP_COEX_POWER_MANAGEMENT
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return coex_schm_flexible_period_get();
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#else
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return 1;
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#endif
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}
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/****************************************************************************
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* Name: esp_empty_wrapper
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*
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@ -69,9 +69,10 @@ endif
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# Linker scripts
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco3.ld
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco3.ld
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
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ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
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@ -106,6 +107,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)lib_printf.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
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CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
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@ -114,6 +116,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)brownout_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gdma_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gpio_hal.c
|
||||
@ -121,8 +124,6 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)systimer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mpu_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
|
||||
|
||||
@ -41,10 +41,10 @@
|
||||
#include "esp_timer.h"
|
||||
#include "soc/rtc.h"
|
||||
#include "esp_private/esp_clk.h"
|
||||
#include "esp_coexist_adapter.h"
|
||||
#include "private/esp_coexist_adapter.h"
|
||||
#include "rom/ets_sys.h"
|
||||
#include "soc/soc_caps.h"
|
||||
#include "esp_modem_wrapper.h"
|
||||
#include "private/esp_modem_wrapper.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@ -73,9 +73,9 @@
|
||||
#include "esp_private/esp_clk.h"
|
||||
#include "os.h"
|
||||
#include "esp_smartconfig.h"
|
||||
#include "esp_coexist_internal.h"
|
||||
#include "private/esp_coexist_internal.h"
|
||||
#include "rom/ets_sys.h"
|
||||
#include "esp_modem_wrapper.h"
|
||||
#include "private/esp_modem_wrapper.h"
|
||||
|
||||
#if SOC_PM_MODEM_RETENTION_BY_REGDMA
|
||||
#include "esp_private/esp_regdma.h"
|
||||
@ -284,6 +284,8 @@ int32_t esp_event_post_wrapper(const char *event_base,
|
||||
uint32_t ticks);
|
||||
static void wifi_apb80m_request_wrapper(void);
|
||||
static void wifi_apb80m_release_wrapper(void);
|
||||
static void esp_phy_enable_wrapper(void);
|
||||
static void esp_phy_disable_wrapper(void);
|
||||
static void timer_arm_wrapper(void *timer, uint32_t tmout, bool repeat);
|
||||
static void wifi_reset_mac_wrapper(void);
|
||||
static void wifi_clock_enable_wrapper(void);
|
||||
@ -327,6 +329,8 @@ static void *coex_schm_curr_phase_get_wrapper(void);
|
||||
static int coex_register_start_cb_wrapper(int (* cb)(void));
|
||||
static int coex_schm_process_restart_wrapper(void);
|
||||
static int coex_schm_register_cb_wrapper(int type, int(*cb)(int));
|
||||
static int coex_schm_flexible_period_set_wrapper(uint8_t period);
|
||||
static uint8_t coex_schm_flexible_period_get_wrapper(void);
|
||||
static void esp_empty_wrapper(void);
|
||||
|
||||
/* Second block of functions
|
||||
@ -501,8 +505,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
|
||||
esp_empty_wrapper,
|
||||
._wifi_apb80m_request = wifi_apb80m_request_wrapper,
|
||||
._wifi_apb80m_release = wifi_apb80m_release_wrapper,
|
||||
._phy_disable = esp_phy_disable,
|
||||
._phy_enable = esp_phy_enable,
|
||||
._phy_disable = esp_phy_disable_wrapper,
|
||||
._phy_enable = esp_phy_enable_wrapper,
|
||||
._phy_update_country_info = esp_phy_update_country_info,
|
||||
._read_mac = esp_read_mac_wrapper,
|
||||
._timer_arm = timer_arm_wrapper,
|
||||
@ -564,6 +568,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
|
||||
._coex_register_start_cb = coex_register_start_cb_wrapper,
|
||||
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
|
||||
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
|
||||
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
|
||||
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
|
||||
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
|
||||
};
|
||||
|
||||
@ -1561,6 +1567,48 @@ static void IRAM_ATTR wifi_apb80m_release_wrapper(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_phy_enable_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This function enables the WiFi PHY. It first enables the PHY for the
|
||||
* WiFi modem, then sets the WiFi PHY enable flag to 1.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void esp_phy_enable_wrapper(void)
|
||||
{
|
||||
esp_phy_enable(PHY_MODEM_WIFI);
|
||||
phy_wifi_enable_set(1);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_phy_disable_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This function disables the WiFi PHY. It first sets the WiFi PHY enable
|
||||
* flag to 0, then disables the PHY for the WiFi modem.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void esp_phy_disable_wrapper(void)
|
||||
{
|
||||
phy_wifi_enable_set(0);
|
||||
esp_phy_disable(PHY_MODEM_WIFI);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: timer_arm_wrapper
|
||||
*
|
||||
@ -2299,6 +2347,60 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: coex_schm_flexible_period_set_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This function sets the coexistence scheme flexible period. If the
|
||||
* coexistence power management feature is enabled
|
||||
* (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the function
|
||||
* coex_schm_flexible_period_set with the given period and returns its
|
||||
* result. If the feature is not enabled, it returns 0.
|
||||
*
|
||||
* Input Parameters:
|
||||
* period - The flexible period to set.
|
||||
*
|
||||
* Returned Value:
|
||||
* ESP_OK on success, or the result of coex_schm_flexible_period_set.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
|
||||
{
|
||||
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
|
||||
return coex_schm_flexible_period_set(period);
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: coex_schm_flexible_period_get_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This function gets the coexistence scheme flexible period. If the
|
||||
* coexistence power management feature is enabled
|
||||
* (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the function
|
||||
* coex_schm_flexible_period_get and returns its result. If the feature is
|
||||
* not enabled, it returns 1.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* The coexistence scheme flexible period.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static uint8_t coex_schm_flexible_period_get_wrapper(void)
|
||||
{
|
||||
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
|
||||
return coex_schm_flexible_period_get();
|
||||
#else
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_empty_wrapper
|
||||
*
|
||||
|
||||
@ -61,17 +61,19 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)spi_flash
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_app_format$(DELIM)include
|
||||
endif
|
||||
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
|
||||
|
||||
# Linker scripts
|
||||
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.coexist.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.net80211.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.phy.ld
|
||||
@ -112,8 +114,9 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)lib_printf.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_regi2c_$(CHIP_SERIES).c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_hp_regi2c_$(CHIP_SERIES).c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)brownout.c
|
||||
@ -131,7 +134,6 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
|
||||
|
||||
@ -36,6 +36,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include$(DELIM)$(CHIP_SERIES)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)ld
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
|
||||
@ -65,8 +66,9 @@ endif
|
||||
|
||||
# Linker scripts
|
||||
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.spiflash.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
|
||||
@ -117,7 +119,6 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mpu_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mcpwm_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c
|
||||
|
||||
@ -208,7 +208,7 @@ endif
|
||||
|
||||
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
|
||||
ifndef ESP_HAL_3RDPARTY_VERSION
|
||||
ESP_HAL_3RDPARTY_VERSION = 8e8e62cf6a7ae8a9659b91706024cab38af29118
|
||||
ESP_HAL_3RDPARTY_VERSION = 51afbfd1a17e806fa6fd8227a18395c1bbecbad3
|
||||
endif
|
||||
|
||||
ifndef ESP_HAL_3RDPARTY_URL
|
||||
|
||||
@ -79,6 +79,7 @@ CHIP_CSRCS += pkcs5.c
|
||||
CHIP_CSRCS += platform_util.c
|
||||
CHIP_CSRCS += platform.c
|
||||
CHIP_CSRCS += sha1.c
|
||||
CHIP_CSRCS += sha3.c
|
||||
CHIP_CSRCS += sha256.c
|
||||
CHIP_CSRCS += sha512.c
|
||||
CHIP_CSRCS += pk.c
|
||||
@ -92,9 +93,9 @@ CHIP_CSRCS += md5.c
|
||||
CHIP_CSRCS += oid.c
|
||||
CHIP_CSRCS += pem.c
|
||||
CHIP_CSRCS += hmac_drbg.c
|
||||
CHIP_CSRCS += hash_info.c
|
||||
CHIP_CSRCS += rsa_alt_helpers.c
|
||||
CHIP_CSRCS += ecdh.c
|
||||
CHIP_CSRCS += pk_ecc.c
|
||||
|
||||
VPATH += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port
|
||||
|
||||
@ -123,6 +124,7 @@ CFLAGS += $(DEFINE_PREFIX)IEEE8021X_EAPOL
|
||||
CFLAGS += $(DEFINE_PREFIX)USE_WPA2_TASK
|
||||
CFLAGS += $(DEFINE_PREFIX)CONFIG_SHA256
|
||||
CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE
|
||||
CFLAGS += $(DEFINE_PREFIX)USE_WPS_TASK
|
||||
|
||||
ifeq ($(CONFIG_ESP_WIFI_ENABLE_SAE_PK),y)
|
||||
CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE_PK
|
||||
@ -233,11 +235,11 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)
|
||||
CHIP_CSRCS += esp_common.c
|
||||
CHIP_CSRCS += esp_hostap.c
|
||||
CHIP_CSRCS += esp_wpa_main.c
|
||||
CHIP_CSRCS += esp_wpa2.c
|
||||
CHIP_CSRCS += esp_wpa3.c
|
||||
CHIP_CSRCS += esp_wpas_glue.c
|
||||
CHIP_CSRCS += esp_owe.c
|
||||
CHIP_CSRCS += esp_scan.c
|
||||
CHIP_CSRCS += esp_wps.c
|
||||
|
||||
VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src$(DELIM)crypto
|
||||
|
||||
|
||||
@ -71,7 +71,8 @@
|
||||
#include "soc/soc_caps.h"
|
||||
#include "xtensa/core-macros.h"
|
||||
#include "xtensa/xtensa_api.h"
|
||||
#include "esp_coexist_internal.h"
|
||||
#include "private/esp_coexist_internal.h"
|
||||
#include "private/esp_coexist_adapter.h"
|
||||
|
||||
#include "esp32_ble_adapter.h"
|
||||
|
||||
@ -107,7 +108,7 @@
|
||||
#define BTDM_MODEM_WAKE_UP_DELAY (4) /* delay in slots of modem wake up procedure, including re-enable PHY/RF */
|
||||
|
||||
#define OSI_FUNCS_TIME_BLOCKING 0xffffffff
|
||||
#define OSI_VERSION 0x00010004
|
||||
#define OSI_VERSION 0x00010005
|
||||
#define OSI_MAGIC_VALUE 0xfadebead
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
@ -228,6 +229,7 @@ struct osi_funcs_s
|
||||
int (* _coex_version_get)(unsigned int *major,
|
||||
unsigned int *minor,
|
||||
unsigned int *patch);
|
||||
void (* _patch_apply)(void);
|
||||
uint32_t _magic;
|
||||
};
|
||||
|
||||
@ -381,6 +383,7 @@ static int coex_register_wifi_channel_change_callback_wrapper(void *cb);
|
||||
static int coex_version_get_wrapper(unsigned int *major,
|
||||
unsigned int *minor,
|
||||
unsigned int *patch);
|
||||
static void patch_apply(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Other functions
|
||||
@ -468,6 +471,8 @@ extern void btdm_controller_scan_duplicate_list_clear(void);
|
||||
/* Shutdown */
|
||||
|
||||
extern void esp_bt_controller_shutdown(void);
|
||||
extern void sdk_config_set_bt_pll_track_enable(bool enable);
|
||||
extern void sdk_config_set_uart_flow_ctrl_enable(bool enable);
|
||||
|
||||
extern uint8_t _bss_start_btdm[];
|
||||
extern uint8_t _bss_end_btdm[];
|
||||
@ -478,16 +483,16 @@ extern uint32_t _data_end_btdm_rom;
|
||||
|
||||
extern uint32_t _bt_bss_start;
|
||||
extern uint32_t _bt_bss_end;
|
||||
extern uint32_t _nimble_bss_start;
|
||||
extern uint32_t _nimble_bss_end;
|
||||
extern uint32_t _btdm_bss_start;
|
||||
extern uint32_t _btdm_bss_end;
|
||||
extern uint32_t _bt_controller_bss_start;
|
||||
extern uint32_t _bt_controller_bss_end;
|
||||
extern uint32_t _bt_data_start;
|
||||
extern uint32_t _bt_data_end;
|
||||
extern uint32_t _nimble_data_start;
|
||||
extern uint32_t _nimble_data_end;
|
||||
extern uint32_t _btdm_data_start;
|
||||
extern uint32_t _btdm_data_end;
|
||||
extern uint32_t _bt_controller_data_start;
|
||||
extern uint32_t _bt_controller_data_end;
|
||||
|
||||
extern void config_bt_funcs_reset(void);
|
||||
extern void config_ble_funcs_reset(void);
|
||||
extern void config_btdm_funcs_reset(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
@ -560,6 +565,7 @@ static struct osi_funcs_s g_osi_funcs_ro =
|
||||
._interrupt_l3_restore = interrupt_restore,
|
||||
._customer_queue_create = NULL,
|
||||
._coex_version_get = coex_version_get_wrapper,
|
||||
._patch_apply = patch_apply,
|
||||
._magic = OSI_MAGIC_VALUE,
|
||||
};
|
||||
|
||||
@ -1834,7 +1840,7 @@ static void btdm_sleep_enter_phase2_wrapper(void)
|
||||
{
|
||||
if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG)
|
||||
{
|
||||
esp_phy_disable();
|
||||
esp_phy_disable(PHY_MODEM_BT);
|
||||
#ifdef CONFIG_PM
|
||||
if (g_pm_lock_acquired)
|
||||
{
|
||||
@ -1845,7 +1851,7 @@ static void btdm_sleep_enter_phase2_wrapper(void)
|
||||
}
|
||||
else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED)
|
||||
{
|
||||
esp_phy_disable();
|
||||
esp_phy_disable(PHY_MODEM_BT);
|
||||
|
||||
/* pause bluetooth baseband */
|
||||
|
||||
@ -1879,7 +1885,7 @@ void btdm_sleep_exit_phase3_wrapper(void)
|
||||
|
||||
if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG)
|
||||
{
|
||||
esp_phy_enable();
|
||||
esp_phy_enable(PHY_MODEM_BT);
|
||||
btdm_check_and_init_bb();
|
||||
#ifdef CONFIG_PM
|
||||
esp_timer_stop(g_btdm_slp_tmr);
|
||||
@ -1890,7 +1896,7 @@ void btdm_sleep_exit_phase3_wrapper(void)
|
||||
/* resume bluetooth baseband */
|
||||
|
||||
periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
|
||||
esp_phy_enable();
|
||||
esp_phy_enable(PHY_MODEM_BT);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2260,41 +2266,50 @@ static int coex_version_get_wrapper(unsigned int *major,
|
||||
unsigned int *patch)
|
||||
{
|
||||
#ifdef CONFIG_ESP32_WIFI_BT_COEXIST
|
||||
const char *ver_str = coex_version_get();
|
||||
coex_version_t version;
|
||||
|
||||
if (ver_str != NULL)
|
||||
{
|
||||
unsigned int _major = 0;
|
||||
unsigned int _minor = 0;
|
||||
unsigned int _patch = 0;
|
||||
ASSERT(coex_version_get_value(&version) == ESP_OK);
|
||||
|
||||
if (sscanf(ver_str, "%u.%u.%u", &_major, &_minor, &_patch) != 3)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
*major = (unsigned int)version.major;
|
||||
*minor = (unsigned int)version.minor;
|
||||
*patch = (unsigned int)version.patch;
|
||||
|
||||
if (major != NULL)
|
||||
{
|
||||
*major = _major;
|
||||
}
|
||||
|
||||
if (minor != NULL)
|
||||
{
|
||||
*minor = _minor;
|
||||
}
|
||||
|
||||
if (patch != NULL)
|
||||
{
|
||||
*patch = _patch;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
return 0;
|
||||
#endif
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: patch_apply
|
||||
*
|
||||
* Description:
|
||||
* This function resets the BTDM and BT functions based on the current
|
||||
* configuration. If the configuration is not set to BLE only, it resets
|
||||
* the BT functions. If the configuration is not set to BR/EDR only, it
|
||||
* resets the BLE functions.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void patch_apply(void)
|
||||
{
|
||||
config_btdm_funcs_reset();
|
||||
|
||||
#ifndef CONFIG_BTDM_CTRL_MODE_BLE_ONLY
|
||||
config_bt_funcs_reset();
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY
|
||||
config_ble_funcs_reset();
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Other functions
|
||||
****************************************************************************/
|
||||
@ -3046,6 +3061,12 @@ int esp32_bt_controller_init(void)
|
||||
UNUSED(set_div_ret);
|
||||
#endif
|
||||
|
||||
#if CONFIG_BTDM_CTRL_HCI_UART_FLOW_CTRL_EN
|
||||
sdk_config_set_uart_flow_ctrl_enable(true);
|
||||
#else
|
||||
sdk_config_set_uart_flow_ctrl_enable(false);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
if ((err = esp_timer_create(&create_args, &g_btdm_slp_tmr) != OK))
|
||||
{
|
||||
@ -3154,7 +3175,7 @@ int esp32_bt_controller_enable(esp_bt_mode_t mode)
|
||||
esp32_pm_lockacquire();
|
||||
#endif
|
||||
|
||||
esp_phy_enable();
|
||||
esp_phy_enable(PHY_MODEM_BT);
|
||||
|
||||
#ifdef CONFIG_ESP32_WIFI_BT_COEXIST
|
||||
coex_enable();
|
||||
@ -3165,6 +3186,8 @@ int esp32_bt_controller_enable(esp_bt_mode_t mode)
|
||||
btdm_controller_enable_sleep(true);
|
||||
}
|
||||
|
||||
sdk_config_set_bt_pll_track_enable(true);
|
||||
|
||||
/* inititalize bluetooth baseband */
|
||||
|
||||
btdm_check_and_init_bb();
|
||||
@ -3175,7 +3198,7 @@ int esp32_bt_controller_enable(esp_bt_mode_t mode)
|
||||
#ifdef CONFIG_ESP32_WIFI_BT_COEXIST
|
||||
coex_disable();
|
||||
#endif
|
||||
esp_phy_disable();
|
||||
esp_phy_disable(PHY_MODEM_BT);
|
||||
#ifdef CONFIG_PM
|
||||
if (g_btdm_allow_light_sleep == false)
|
||||
{
|
||||
@ -3189,7 +3212,7 @@ int esp32_bt_controller_enable(esp_bt_mode_t mode)
|
||||
|
||||
g_btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
|
||||
|
||||
return OK;
|
||||
return esp_wifi_to_errno(ret);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -3232,7 +3255,7 @@ int esp32_bt_controller_disable(void)
|
||||
coex_disable();
|
||||
#endif
|
||||
|
||||
esp_phy_disable();
|
||||
esp_phy_disable(PHY_MODEM_BT);
|
||||
g_btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
@ -71,7 +71,7 @@
|
||||
#ifdef CONFIG_ESP32_BLE
|
||||
# include "esp32_ble_adapter.h"
|
||||
# ifdef CONFIG_ESP32_WIFI_BT_COEXIST
|
||||
# include "esp_coexist_internal.h"
|
||||
# include "private/esp_coexist_internal.h"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
@ -266,6 +266,8 @@ static void esp_dport_access_stall_other_cpu_start(void);
|
||||
static void esp_dport_access_stall_other_cpu_end(void);
|
||||
static void wifi_apb80m_request(void);
|
||||
static void wifi_apb80m_release(void);
|
||||
static void esp_phy_enable_wrapper(void);
|
||||
static void esp_phy_disable_wrapper(void);
|
||||
static int32_t esp_wifi_read_mac(uint8_t *mac, uint32_t type);
|
||||
static void esp_timer_arm(void *timer, uint32_t tmout, bool repeat);
|
||||
static void esp_timer_disarm(void *timer);
|
||||
@ -340,6 +342,8 @@ static void *coex_schm_curr_phase_get_wrapper(void);
|
||||
static int coex_register_start_cb_wrapper(int (* cb)(void));
|
||||
static int coex_schm_process_restart_wrapper(void);
|
||||
static int coex_schm_register_cb_wrapper(int type, int(*cb)(int));
|
||||
static int coex_schm_flexible_period_set_wrapper(uint8_t period);
|
||||
static uint8_t coex_schm_flexible_period_get_wrapper(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
@ -491,8 +495,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
|
||||
esp_dport_access_stall_other_cpu_end,
|
||||
._wifi_apb80m_request = wifi_apb80m_request,
|
||||
._wifi_apb80m_release = wifi_apb80m_release,
|
||||
._phy_disable = esp_phy_disable,
|
||||
._phy_enable = esp_phy_enable,
|
||||
._phy_disable = esp_phy_disable_wrapper,
|
||||
._phy_enable = esp_phy_enable_wrapper,
|
||||
._phy_common_clock_enable = esp_phy_common_clock_enable,
|
||||
._phy_common_clock_disable = esp_phy_common_clock_disable,
|
||||
._phy_update_country_info = esp32_phy_update_country_info,
|
||||
@ -555,6 +559,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
|
||||
._coex_register_start_cb = coex_register_start_cb_wrapper,
|
||||
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
|
||||
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
|
||||
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
|
||||
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
|
||||
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
|
||||
};
|
||||
|
||||
@ -2531,6 +2537,50 @@ static void wifi_apb80m_release(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_phy_enable_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This is a wrapper for enabling the ESP PHY. It calls the esp_phy_enable
|
||||
* function with PHY_MODEM_WIFI as the argument, and then calls the
|
||||
* phy_wifi_enable_set function with 1 as the argument.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void esp_phy_enable_wrapper(void)
|
||||
{
|
||||
esp_phy_enable(PHY_MODEM_WIFI);
|
||||
phy_wifi_enable_set(1);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_phy_disable_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This is a wrapper for disabling the ESP PHY. It first calls the
|
||||
* phy_wifi_enable_set function with 0 as the argument, and then calls the
|
||||
* esp_phy_disable function with PHY_MODEM_WIFI as the argument.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void esp_phy_disable_wrapper(void)
|
||||
{
|
||||
phy_wifi_enable_set(0);
|
||||
esp_phy_disable(PHY_MODEM_WIFI);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_read_mac
|
||||
*
|
||||
@ -3997,6 +4047,61 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: coex_schm_flexible_period_set_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This is a wrapper for coex_schm_flexible_period_set. It sets the
|
||||
* flexible period for the coexistence mechanism. If power management
|
||||
* feature is enabled (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the
|
||||
* function with the given period. If the feature is not enabled, it
|
||||
* returns 0.
|
||||
*
|
||||
* Input Parameters:
|
||||
* period - The period to set for the coexistence mechanism.
|
||||
*
|
||||
* Returned Value:
|
||||
* If power management is enabled, it returns the result of the
|
||||
* coex_schm_flexible_period_set function. Otherwise, it returns 0.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
|
||||
{
|
||||
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
|
||||
return coex_schm_flexible_period_set(period);
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: coex_schm_flexible_period_get_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This is a wrapper for coex_schm_flexible_period_get. If power management
|
||||
* feature is enabled (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the
|
||||
* function and returns its result. If the feature is not enabled, it
|
||||
* returns 1.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* If power management is enabled, it returns the result of the
|
||||
* coex_schm_flexible_period_get function. Otherwise, it returns 1.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static uint8_t coex_schm_flexible_period_get_wrapper(void)
|
||||
{
|
||||
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
|
||||
return coex_schm_flexible_period_get();
|
||||
#else
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_random_ulong
|
||||
*
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
# include "esp_private/wifi.h"
|
||||
# include "esp_wpa.h"
|
||||
#endif
|
||||
#include "esp_coexist_internal.h"
|
||||
#include "private/esp_coexist_internal.h"
|
||||
#include "periph_ctrl.h"
|
||||
#include "esp_phy_init.h"
|
||||
#include "phy_init_data.h"
|
||||
@ -351,6 +351,85 @@ static void esp_wifi_set_log_level(void)
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_to_errno
|
||||
*
|
||||
* Description:
|
||||
* Transform from ESP Wi-Fi error code to NuttX error code
|
||||
*
|
||||
* Input Parameters:
|
||||
* err - ESP Wi-Fi error code
|
||||
*
|
||||
* Returned Value:
|
||||
* NuttX error code defined in errno.h
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int32_t esp_wifi_to_errno(int err)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (err < ESP_ERR_WIFI_BASE)
|
||||
{
|
||||
/* Unmask component error bits */
|
||||
|
||||
ret = err & 0xfff;
|
||||
|
||||
switch (ret)
|
||||
{
|
||||
case ESP_OK:
|
||||
ret = OK;
|
||||
break;
|
||||
case ESP_ERR_NO_MEM:
|
||||
ret = -ENOMEM;
|
||||
break;
|
||||
|
||||
case ESP_ERR_INVALID_ARG:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
|
||||
case ESP_ERR_INVALID_STATE:
|
||||
ret = -EIO;
|
||||
break;
|
||||
|
||||
case ESP_ERR_INVALID_SIZE:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
|
||||
case ESP_ERR_NOT_FOUND:
|
||||
ret = -ENOSYS;
|
||||
break;
|
||||
|
||||
case ESP_ERR_NOT_SUPPORTED:
|
||||
ret = -ENOSYS;
|
||||
break;
|
||||
|
||||
case ESP_ERR_TIMEOUT:
|
||||
ret = -ETIMEDOUT;
|
||||
break;
|
||||
|
||||
case ESP_ERR_INVALID_MAC:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = ERROR;
|
||||
}
|
||||
|
||||
if (ret != OK)
|
||||
{
|
||||
wlerr("ERROR: %s\n", esp_err_to_name(err));
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Functions needed by libphy.a
|
||||
****************************************************************************/
|
||||
|
||||
@ -85,10 +85,49 @@ struct esp_queuecache_s
|
||||
uint8_t *buffer;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nuttx_err_to_freertos
|
||||
*
|
||||
* Description:
|
||||
* Transform from Nuttx OS error code to FreeRTOS's pdTRUE or pdFALSE.
|
||||
*
|
||||
* Input Parameters:
|
||||
* ret - NuttX error code
|
||||
*
|
||||
* Returned Value:
|
||||
* Wi-Fi adapter error code
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline int32_t nuttx_err_to_freertos(int ret)
|
||||
{
|
||||
return ret >= 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_to_errno
|
||||
*
|
||||
* Description:
|
||||
* Transform from ESP Wi-Fi error code to NuttX error code
|
||||
*
|
||||
* Input Parameters:
|
||||
* err - ESP Wi-Fi error code
|
||||
*
|
||||
* Returned Value:
|
||||
* NuttX error code defined in errno.h
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int32_t esp_wifi_to_errno(int err);
|
||||
|
||||
/****************************************************************************
|
||||
* Functions needed by libphy.a
|
||||
****************************************************************************/
|
||||
|
||||
@ -65,6 +65,10 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib-data.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib-funcs.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.syscalls.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
|
||||
|
||||
# Source files
|
||||
@ -90,6 +94,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
|
||||
@ -103,7 +108,6 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mcpwm_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal.c
|
||||
|
||||
@ -151,7 +151,7 @@ endif
|
||||
|
||||
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
|
||||
ifndef ESP_HAL_3RDPARTY_VERSION
|
||||
ESP_HAL_3RDPARTY_VERSION = 8e8e62cf6a7ae8a9659b91706024cab38af29118
|
||||
ESP_HAL_3RDPARTY_VERSION = 51afbfd1a17e806fa6fd8227a18395c1bbecbad3
|
||||
endif
|
||||
|
||||
ifndef ESP_HAL_3RDPARTY_URL
|
||||
|
||||
@ -1193,8 +1193,12 @@ static void esp32s2_spi_poll_exchange(struct esp32s2_spi_priv_s *priv,
|
||||
void *rxbuffer,
|
||||
size_t nwords)
|
||||
{
|
||||
const uintptr_t spi_user_reg = SPI_USER_REG(priv->config->id);
|
||||
const uintptr_t spi_w0_reg = SPI_W0_REG(priv->config->id);
|
||||
const uintptr_t spi_cmd_reg = SPI_CMD_REG(priv->config->id);
|
||||
const uintptr_t spi_miso_dlen_reg = SPI_MISO_DLEN_REG(priv->config->id);
|
||||
const uintptr_t spi_mosi_dlen_reg = SPI_MOSI_DLEN_REG(priv->config->id);
|
||||
const uint32_t total_bytes = nwords * (priv->nbits / 8);
|
||||
const uint32_t id = priv->config->id;
|
||||
uintptr_t bytes_remaining = total_bytes;
|
||||
const uint8_t *tp = (const uint8_t *)txbuffer;
|
||||
uint8_t *rp = (uint8_t *)rxbuffer;
|
||||
@ -1205,7 +1209,7 @@ static void esp32s2_spi_poll_exchange(struct esp32s2_spi_priv_s *priv,
|
||||
* register (W0).
|
||||
*/
|
||||
|
||||
uintptr_t data_buf_reg = SPI_W0_REG(id);
|
||||
uintptr_t data_buf_reg = spi_w0_reg;
|
||||
uint32_t transfer_size = MIN(SPI_MAX_BUF_SIZE, bytes_remaining);
|
||||
|
||||
/* Write data words to data buffer registers.
|
||||
@ -1233,28 +1237,27 @@ static void esp32s2_spi_poll_exchange(struct esp32s2_spi_priv_s *priv,
|
||||
data_buf_reg += sizeof(uintptr_t);
|
||||
}
|
||||
|
||||
esp32s2_spi_set_regbits(SPI_USER_REG(id), SPI_USR_MOSI_M);
|
||||
esp32s2_spi_set_regbits(spi_user_reg, SPI_USR_MOSI_M);
|
||||
|
||||
if (rp == NULL)
|
||||
{
|
||||
esp32s2_spi_clr_regbits(SPI_USER_REG(id), SPI_USR_MISO_M);
|
||||
esp32s2_spi_clr_regbits(spi_user_reg, SPI_USR_MISO_M);
|
||||
}
|
||||
else
|
||||
{
|
||||
esp32s2_spi_set_regbits(SPI_USER_REG(id), SPI_USR_MISO_M);
|
||||
esp32s2_spi_set_regbits(spi_user_reg, SPI_USR_MISO_M);
|
||||
}
|
||||
|
||||
putreg32((transfer_size * 8) - 1, SPI_MOSI_DLEN_REG(id));
|
||||
|
||||
putreg32((transfer_size * 8) - 1, SPI_MISO_DLEN_REG(id));
|
||||
putreg32((transfer_size * 8) - 1, spi_mosi_dlen_reg);
|
||||
putreg32((transfer_size * 8) - 1, spi_miso_dlen_reg);
|
||||
|
||||
/* Trigger start of user-defined transaction for master. */
|
||||
|
||||
esp32s2_spi_set_regbits(SPI_CMD_REG(id), SPI_USR_M);
|
||||
esp32s2_spi_set_regbits(spi_cmd_reg, SPI_USR_M);
|
||||
|
||||
/* Wait for the user-defined transaction to finish. */
|
||||
|
||||
while ((getreg32(SPI_CMD_REG(id)) & SPI_USR_M) != 0)
|
||||
while ((getreg32(spi_cmd_reg) & SPI_USR_M) != 0)
|
||||
{
|
||||
;
|
||||
}
|
||||
@ -1265,7 +1268,7 @@ static void esp32s2_spi_poll_exchange(struct esp32s2_spi_priv_s *priv,
|
||||
* register (W0).
|
||||
*/
|
||||
|
||||
data_buf_reg = SPI_W0_REG(id);
|
||||
data_buf_reg = spi_w0_reg;
|
||||
|
||||
/* Read received data words from SPI data buffer registers. */
|
||||
|
||||
@ -1478,6 +1481,10 @@ void esp32s2_spi_dma_init(struct spi_dev_s *dev)
|
||||
static void esp32s2_spi_init(struct spi_dev_s *dev)
|
||||
{
|
||||
struct esp32s2_spi_priv_s *priv = (struct esp32s2_spi_priv_s *)dev;
|
||||
const uintptr_t spi_user_reg = SPI_USER_REG(priv->config->id);
|
||||
const uintptr_t spi_user1_reg = SPI_USER1_REG(priv->config->id);
|
||||
const uintptr_t spi_slave_reg = SPI_SLAVE_REG(priv->config->id);
|
||||
const uintptr_t spi_misc_reg = SPI_MISC_REG(priv->config->id);
|
||||
const struct esp32s2_spi_config_s *config = priv->config;
|
||||
const uint32_t id = config->id;
|
||||
uint32_t regval;
|
||||
@ -1529,19 +1536,19 @@ static void esp32s2_spi_init(struct spi_dev_s *dev)
|
||||
modifyreg32(SYSTEM_PERIP_RST_EN0_REG, config->rst_bit, 0);
|
||||
|
||||
regval = SPI_DOUTDIN_M | SPI_USR_MISO_M | SPI_USR_MOSI_M | SPI_CS_HOLD_M;
|
||||
putreg32(regval, SPI_USER_REG(id));
|
||||
putreg32(0, SPI_USER1_REG(id));
|
||||
putreg32(0, SPI_SLAVE_REG(id));
|
||||
putreg32(regval, spi_user_reg);
|
||||
putreg32(0, spi_user1_reg);
|
||||
putreg32(0, spi_slave_reg);
|
||||
putreg32(SPI_CS1_DIS_M | SPI_CS2_DIS_M,
|
||||
SPI_MISC_REG(id));
|
||||
spi_misc_reg);
|
||||
|
||||
#if SPI_HAVE_SWCS
|
||||
esp32s2_spi_set_regbits(SPI_MISC_REG(id), SPI_CS0_DIS_M);
|
||||
esp32s2_spi_set_regbits(spi_misc_reg, SPI_CS0_DIS_M);
|
||||
#endif
|
||||
|
||||
putreg32(0, SPI_CTRL_REG(id));
|
||||
putreg32(VALUE_TO_FIELD(0, SPI_CS_HOLD_TIME),
|
||||
SPI_USER1_REG(id));
|
||||
spi_user1_reg);
|
||||
|
||||
#if defined(CONFIG_ESP32S2_SPI2_DMA) || defined(CONFIG_ESP32S2_SPI3_DMA)
|
||||
esp32s2_spi_dma_init(dev);
|
||||
|
||||
@ -183,7 +183,7 @@ static int esp32s2_erase(struct mtd_dev_s *dev, off_t startblock,
|
||||
#ifdef CONFIG_ESP32S2_STORAGE_MTD_DEBUG
|
||||
finfo("%s(%p, 0x%x, %d)\n", __func__, dev, startblock, nblocks);
|
||||
|
||||
finfo("spi_flash_erase_range(0x%x, %d)\n", offset, nbytes);
|
||||
finfo("esp32s2_erase(0x%x, %d)\n", offset, nbytes);
|
||||
#endif
|
||||
|
||||
ret = nxmutex_lock(&g_lock);
|
||||
@ -239,7 +239,7 @@ static ssize_t esp32s2_read(struct mtd_dev_s *dev, off_t offset,
|
||||
#ifdef CONFIG_ESP32S2_STORAGE_MTD_DEBUG
|
||||
finfo("%s(%p, 0x%x, %d, %p)\n", __func__, dev, offset, nbytes, buffer);
|
||||
|
||||
finfo("spi_flash_read(0x%x, %p, %d)\n", offset, buffer, nbytes);
|
||||
finfo("esp32s2_read(0x%x, %p, %d)\n", offset, buffer, nbytes);
|
||||
#endif
|
||||
|
||||
/* Acquire the mutex. */
|
||||
@ -293,7 +293,7 @@ static ssize_t esp32s2_bread(struct mtd_dev_s *dev, off_t startblock,
|
||||
finfo("%s(%p, 0x%x, %d, %p)\n", __func__, dev, startblock, nblocks,
|
||||
buffer);
|
||||
|
||||
finfo("spi_flash_read(0x%x, %p, %d)\n", addr, buffer, size);
|
||||
finfo("esp32s2_bread(0x%x, %p, %d)\n", addr, buffer, size);
|
||||
#endif
|
||||
|
||||
ret = nxmutex_lock(&g_lock);
|
||||
@ -345,7 +345,7 @@ static ssize_t esp32s2_read_decrypt(struct mtd_dev_s *dev,
|
||||
#ifdef CONFIG_ESP32S2_STORAGE_MTD_DEBUG
|
||||
finfo("%s(%p, 0x%x, %d, %p)\n", __func__, dev, offset, nbytes, buffer);
|
||||
|
||||
finfo("spi_flash_read_encrypted(0x%x, %p, %d)\n", offset, buffer,
|
||||
finfo("esp32s2_read_decrypt(0x%x, %p, %d)\n", offset, buffer,
|
||||
nbytes);
|
||||
#endif
|
||||
|
||||
@ -402,7 +402,7 @@ static ssize_t esp32s2_bread_decrypt(struct mtd_dev_s *dev,
|
||||
finfo("%s(%p, 0x%x, %d, %p)\n", __func__, dev, startblock, nblocks,
|
||||
buffer);
|
||||
|
||||
finfo("spi_flash_read_encrypted(0x%x, %p, %d)\n", addr, buffer, size);
|
||||
finfo("esp32s2_bread_decrypt(0x%x, %p, %d)\n", addr, buffer, size);
|
||||
#endif
|
||||
|
||||
ret = nxmutex_lock(&g_lock);
|
||||
@ -458,7 +458,7 @@ static ssize_t esp32s2_write(struct mtd_dev_s *dev, off_t offset,
|
||||
#ifdef CONFIG_ESP32S2_STORAGE_MTD_DEBUG
|
||||
finfo("%s(%p, 0x%x, %d, %p)\n", __func__, dev, offset, nbytes, buffer);
|
||||
|
||||
finfo("spi_flash_write(0x%x, %p, %d)\n", offset, buffer, nbytes);
|
||||
finfo("esp32s2_write(0x%x, %p, %d)\n", offset, buffer, nbytes);
|
||||
#endif
|
||||
|
||||
/* Acquire the mutex. */
|
||||
@ -514,7 +514,7 @@ static ssize_t esp32s2_bwrite_encrypt(struct mtd_dev_s *dev,
|
||||
finfo("%s(%p, 0x%x, %d, %p)\n", __func__, dev, startblock,
|
||||
nblocks, buffer);
|
||||
|
||||
finfo("spi_flash_write_encrypted(0x%x, %p, %d)\n", addr, buffer, size);
|
||||
finfo("esp32s2_bwrite_encrypt(0x%x, %p, %d)\n", addr, buffer, size);
|
||||
#endif
|
||||
|
||||
ret = nxmutex_lock(&g_lock);
|
||||
@ -523,7 +523,7 @@ static ssize_t esp32s2_bwrite_encrypt(struct mtd_dev_s *dev,
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = spi_flash_write_encrypted(addr, buffer, size);
|
||||
ret = esp_rom_spiflash_write_encrypted(addr, (uint32_t *)buffer, size);
|
||||
nxmutex_unlock(&g_lock);
|
||||
|
||||
if (ret == OK)
|
||||
@ -566,7 +566,7 @@ static ssize_t esp32s2_bwrite(struct mtd_dev_s *dev, off_t startblock,
|
||||
finfo("%s(%p, 0x%x, %d, %p)\n", __func__, dev, startblock,
|
||||
nblocks, buffer);
|
||||
|
||||
finfo("spi_flash_write(0x%x, %p, %d)\n", addr, buffer, size);
|
||||
finfo("esp32s2_bwrite(0x%x, %p, %d)\n", addr, buffer, size);
|
||||
#endif
|
||||
|
||||
ret = nxmutex_lock(&g_lock);
|
||||
|
||||
@ -61,6 +61,9 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib-data.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib-funcs.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.spiflash.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
|
||||
|
||||
@ -96,7 +99,6 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal.c
|
||||
|
||||
@ -209,7 +209,7 @@ endif
|
||||
|
||||
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
|
||||
ifndef ESP_HAL_3RDPARTY_VERSION
|
||||
ESP_HAL_3RDPARTY_VERSION = 8e8e62cf6a7ae8a9659b91706024cab38af29118
|
||||
ESP_HAL_3RDPARTY_VERSION = 51afbfd1a17e806fa6fd8227a18395c1bbecbad3
|
||||
endif
|
||||
|
||||
ifndef ESP_HAL_3RDPARTY_URL
|
||||
|
||||
@ -80,6 +80,7 @@ CHIP_CSRCS += pkcs5.c
|
||||
CHIP_CSRCS += platform_util.c
|
||||
CHIP_CSRCS += platform.c
|
||||
CHIP_CSRCS += sha1.c
|
||||
CHIP_CSRCS += sha3.c
|
||||
CHIP_CSRCS += sha256.c
|
||||
CHIP_CSRCS += sha512.c
|
||||
CHIP_CSRCS += pk.c
|
||||
@ -93,9 +94,9 @@ CHIP_CSRCS += md5.c
|
||||
CHIP_CSRCS += oid.c
|
||||
CHIP_CSRCS += pem.c
|
||||
CHIP_CSRCS += hmac_drbg.c
|
||||
CHIP_CSRCS += hash_info.c
|
||||
CHIP_CSRCS += rsa_alt_helpers.c
|
||||
CHIP_CSRCS += ecdh.c
|
||||
CHIP_CSRCS += pk_ecc.c
|
||||
|
||||
VPATH += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port
|
||||
|
||||
@ -124,6 +125,7 @@ CFLAGS += $(DEFINE_PREFIX)IEEE8021X_EAPOL
|
||||
CFLAGS += $(DEFINE_PREFIX)USE_WPA2_TASK
|
||||
CFLAGS += $(DEFINE_PREFIX)CONFIG_SHA256
|
||||
CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE
|
||||
CFLAGS += $(DEFINE_PREFIX)USE_WPS_TASK
|
||||
|
||||
ifeq ($(CONFIG_ESP_WIFI_ENABLE_SAE_PK),y)
|
||||
CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE_PK
|
||||
@ -234,11 +236,11 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)
|
||||
CHIP_CSRCS += esp_common.c
|
||||
CHIP_CSRCS += esp_hostap.c
|
||||
CHIP_CSRCS += esp_wpa_main.c
|
||||
CHIP_CSRCS += esp_wpa2.c
|
||||
CHIP_CSRCS += esp_wpa3.c
|
||||
CHIP_CSRCS += esp_wpas_glue.c
|
||||
CHIP_CSRCS += esp_owe.c
|
||||
CHIP_CSRCS += esp_scan.c
|
||||
CHIP_CSRCS += esp_wps.c
|
||||
|
||||
VPATH += $(WIFI_WPA_SUPPLICANT)$(DELIM)esp_supplicant$(DELIM)src$(DELIM)crypto
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -115,13 +115,6 @@
|
||||
# define ESP32S3_WIFI_RESERVE_INT 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S3_BLE
|
||||
# define ESP32S3_BLE_RESERVE_INT ((1 << ESP32S3_CPUINT_BT_BB) | \
|
||||
(1 << ESP32S3_CPUINT_RWBLE))
|
||||
#else
|
||||
# define ESP32S3_BLE_RESERVE_INT 0
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
@ -186,8 +179,7 @@ static bool g_non_iram_int_disabled_flag[CONFIG_SMP_NCPUS];
|
||||
*/
|
||||
|
||||
static uint32_t g_cpu0_freeints = ESP32S3_CPUINT_PERIPHSET &
|
||||
~(ESP32S3_WIFI_RESERVE_INT |
|
||||
ESP32S3_BLE_RESERVE_INT);
|
||||
~ESP32S3_WIFI_RESERVE_INT;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static uint32_t g_cpu1_freeints = ESP32S3_CPUINT_PERIPHSET;
|
||||
@ -498,11 +490,6 @@ void up_irqinitialize(void)
|
||||
g_irqmap[ESP32S3_IRQ_PWR] = IRQ_MKMAP(0, ESP32S3_CPUINT_PWR);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S3_BLE
|
||||
g_irqmap[ESP32S3_IRQ_BT_BB] = IRQ_MKMAP(0, ESP32S3_CPUINT_BT_BB);
|
||||
g_irqmap[ESP32S3_IRQ_RWBLE] = IRQ_MKMAP(0, ESP32S3_CPUINT_RWBLE);
|
||||
#endif
|
||||
|
||||
/* Initialize CPU interrupts */
|
||||
|
||||
esp32s3_cpuint_initialize();
|
||||
@ -515,13 +502,6 @@ void up_irqinitialize(void)
|
||||
xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32S3_CPUINT_MAC);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP32S3_BLE
|
||||
g_cpu0_intmap[ESP32S3_CPUINT_BT_BB] = CPUINT_ASSIGN(ESP32S3_IRQ_BT_BB);
|
||||
g_cpu0_intmap[ESP32S3_CPUINT_RWBLE] = CPUINT_ASSIGN(ESP32S3_IRQ_RWBLE);
|
||||
xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32S3_CPUINT_BT_BB);
|
||||
xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32S3_CPUINT_RWBLE);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/* Attach and enable the inter-CPU interrupt */
|
||||
|
||||
@ -828,6 +808,12 @@ int esp32s3_setup_irq(int cpu, int periphid, int priority, int flags)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (priority > XCHAL_SYSCALL_LEVEL)
|
||||
{
|
||||
irqerr("Invalid priority %d\n", priority);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
irqstate = enter_critical_section();
|
||||
|
||||
/* Setting up an IRQ includes the following steps:
|
||||
|
||||
@ -378,7 +378,6 @@ static void IRAM_ATTR esp32s3_rtc_clk_fast_freq_set(
|
||||
static uint32_t IRAM_ATTR esp32s3_rtc_clk_cal_internal(
|
||||
enum esp32s3_rtc_cal_sel_e cal_clk,
|
||||
uint32_t slowclk_cycles);
|
||||
static int IRAM_ATTR esp32s3_rtc_clk_slow_freq_get(void);
|
||||
static void IRAM_ATTR esp32s3_rtc_clk_slow_freq_set(
|
||||
enum esp32s3_rtc_slow_freq_e slow_freq);
|
||||
static void esp32s3_select_rtc_slow_clk(enum esp32s3_slow_clk_sel_e
|
||||
@ -1167,7 +1166,21 @@ static void esp32s3_rtc_calibrate_ocode(void)
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
static int IRAM_ATTR esp32s3_rtc_clk_slow_freq_get(void)
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_rtc_clk_slow_freq_get
|
||||
*
|
||||
* Description:
|
||||
* This function gets the frequency of the slow clock from the RTC.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* The frequency of the slow clock from the RTC.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int IRAM_ATTR esp32s3_rtc_clk_slow_freq_get(void)
|
||||
{
|
||||
return REG_GET_FIELD(RTC_CNTL_RTC_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL);
|
||||
}
|
||||
|
||||
@ -198,6 +198,22 @@ struct alm_setalarm_s
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_rtc_clk_slow_freq_get
|
||||
*
|
||||
* Description:
|
||||
* This function gets the frequency of the slow clock from the RTC.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* The frequency of the slow clock from the RTC.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp32s3_rtc_clk_slow_freq_get(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp32s3_rtc_clk_slow_freq_get_hz
|
||||
*
|
||||
|
||||
@ -48,6 +48,7 @@
|
||||
#include "esp32s3_irq.h"
|
||||
#include "esp32s3_spiflash.h"
|
||||
|
||||
#include "hal/cache_hal.h"
|
||||
#include "soc/extmem_reg.h"
|
||||
#include "soc/spi_mem_reg.h"
|
||||
#include "rom/opi_flash.h"
|
||||
@ -187,8 +188,8 @@
|
||||
|
||||
static void spiflash_start(void);
|
||||
static void spiflash_end(void);
|
||||
static void spi_flash_disable_cache(uint32_t cpuid);
|
||||
static void spi_flash_restore_cache(uint32_t cpuid);
|
||||
static void spi_flash_disable_cache(void);
|
||||
static void spi_flash_restore_cache(void);
|
||||
#ifdef CONFIG_SMP
|
||||
static int spi_flash_op_block_task(int argc, char *argv[]);
|
||||
static int spiflash_init_spi_flash_op_block_task(int cpu);
|
||||
@ -220,6 +221,7 @@ static uint32_t s_flash_op_cache_state[CONFIG_SMP_NCPUS];
|
||||
static rmutex_t g_flash_op_mutex;
|
||||
static volatile bool g_flash_op_can_start = false;
|
||||
static volatile bool g_flash_op_complete = false;
|
||||
static volatile bool g_spi_flash_cache_suspended = false;
|
||||
static volatile bool g_sched_suspended[CONFIG_SMP_NCPUS];
|
||||
#ifdef CONFIG_SMP
|
||||
static sem_t g_disable_non_iram_isr_on_core[CONFIG_SMP_NCPUS];
|
||||
@ -244,10 +246,9 @@ static void spiflash_suspend_cache(void)
|
||||
int other_cpu = cpu ? 0 : 1;
|
||||
#endif
|
||||
|
||||
spi_flash_disable_cache(cpu);
|
||||
#ifdef CONFIG_SMP
|
||||
spi_flash_disable_cache(other_cpu);
|
||||
#endif
|
||||
spi_flash_disable_cache();
|
||||
|
||||
g_spi_flash_cache_suspended = true;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -265,10 +266,9 @@ static void spiflash_resume_cache(void)
|
||||
int other_cpu = cpu ? 0 : 1;
|
||||
#endif
|
||||
|
||||
spi_flash_restore_cache(cpu);
|
||||
#ifdef CONFIG_SMP
|
||||
spi_flash_restore_cache(other_cpu);
|
||||
#endif
|
||||
spi_flash_restore_cache();
|
||||
|
||||
g_spi_flash_cache_suspended = false;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -765,17 +765,16 @@ static inline void IRAM_ATTR spiflash_os_yield(void)
|
||||
* s_flash_op_cache_state.
|
||||
*
|
||||
* Input Parameters:
|
||||
* cpuid - The CPU core whose cache will be disabled.
|
||||
* None.
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void spi_flash_disable_cache(uint32_t cpuid)
|
||||
static void spi_flash_disable_cache(void)
|
||||
{
|
||||
s_flash_op_cache_state[cpuid] = cache_suspend_icache() << 16;
|
||||
s_flash_op_cache_state[cpuid] |= cache_suspend_dcache();
|
||||
cache_hal_suspend(CACHE_TYPE_ALL);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -786,17 +785,16 @@ static void spi_flash_disable_cache(uint32_t cpuid)
|
||||
* s_flash_op_cache_state.
|
||||
*
|
||||
* Input Parameters:
|
||||
* cpuid - The CPU core whose cache will be restored.
|
||||
* None.
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void spi_flash_restore_cache(uint32_t cpuid)
|
||||
static void spi_flash_restore_cache(void)
|
||||
{
|
||||
cache_resume_dcache(s_flash_op_cache_state[cpuid] & 0xffff);
|
||||
cache_resume_icache(s_flash_op_cache_state[cpuid] >> 16);
|
||||
cache_hal_resume(CACHE_TYPE_ALL);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
@ -855,7 +853,7 @@ static int spi_flash_op_block_task(int argc, char *argv[])
|
||||
|
||||
/* Flash operation is complete, re-enable cache */
|
||||
|
||||
spi_flash_restore_cache(cpu);
|
||||
spi_flash_restore_cache();
|
||||
|
||||
/* Restore interrupts that aren't located in IRAM */
|
||||
|
||||
|
||||
@ -73,7 +73,7 @@
|
||||
#ifdef CONFIG_ESP32S3_BLE
|
||||
# include "esp32s3_ble_adapter.h"
|
||||
# ifdef CONFIG_ESP32S3_WIFI_BT_COEXIST
|
||||
# include "esp_coexist_internal.h"
|
||||
# include "private/esp_coexist_internal.h"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
@ -270,6 +270,8 @@ static void esp_dport_access_stall_other_cpu_start(void);
|
||||
static void esp_dport_access_stall_other_cpu_end(void);
|
||||
static void wifi_apb80m_request(void);
|
||||
static void wifi_apb80m_release(void);
|
||||
static void esp_phy_enable_wrapper(void);
|
||||
static void esp_phy_disable_wrapper(void);
|
||||
static int32_t esp_wifi_read_mac(uint8_t *mac, uint32_t type);
|
||||
static void esp_timer_arm(void *timer, uint32_t tmout, bool repeat);
|
||||
static void esp_timer_disarm(void *timer);
|
||||
@ -345,6 +347,8 @@ static void *coex_schm_curr_phase_get_wrapper(void);
|
||||
static int coex_register_start_cb_wrapper(int (* cb)(void));
|
||||
static int coex_schm_process_restart_wrapper(void);
|
||||
static int coex_schm_register_cb_wrapper(int type, int(*cb)(int));
|
||||
static int coex_schm_flexible_period_set_wrapper(uint8_t period);
|
||||
static uint8_t coex_schm_flexible_period_get_wrapper(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
@ -492,8 +496,8 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
|
||||
esp_dport_access_stall_other_cpu_end,
|
||||
._wifi_apb80m_request = wifi_apb80m_request,
|
||||
._wifi_apb80m_release = wifi_apb80m_release,
|
||||
._phy_disable = esp_phy_disable,
|
||||
._phy_enable = esp_phy_enable,
|
||||
._phy_disable = esp_phy_disable_wrapper,
|
||||
._phy_enable = esp_phy_enable_wrapper,
|
||||
._phy_update_country_info = esp32s3_phy_update_country_info,
|
||||
._read_mac = esp_wifi_read_mac,
|
||||
._timer_arm = esp_timer_arm,
|
||||
@ -555,13 +559,11 @@ wifi_osi_funcs_t g_wifi_osi_funcs =
|
||||
._coex_register_start_cb = coex_register_start_cb_wrapper,
|
||||
._coex_schm_process_restart = coex_schm_process_restart_wrapper,
|
||||
._coex_schm_register_cb = coex_schm_register_cb_wrapper,
|
||||
._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper,
|
||||
._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper,
|
||||
._magic = ESP_WIFI_OS_ADAPTER_MAGIC,
|
||||
};
|
||||
|
||||
/* Wi-Fi feature capacity data */
|
||||
|
||||
uint64_t g_wifi_feature_caps = CONFIG_FEATURE_WPA3_SAE_BIT;
|
||||
|
||||
/* Wi-Fi TAG string data */
|
||||
|
||||
ESP_EVENT_DEFINE_BASE(WIFI_EVENT);
|
||||
@ -2538,6 +2540,50 @@ static void wifi_apb80m_release(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_phy_enable_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This is a wrapper for enabling the ESP PHY. It calls the esp_phy_enable
|
||||
* function with PHY_MODEM_WIFI as the argument, and then calls the
|
||||
* phy_wifi_enable_set function with 1 as the argument.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void esp_phy_enable_wrapper(void)
|
||||
{
|
||||
esp_phy_enable(PHY_MODEM_WIFI);
|
||||
phy_wifi_enable_set(1);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_phy_disable_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This is a wrapper for disabling the ESP PHY. It first calls the
|
||||
* phy_wifi_enable_set function with 0 as the argument, and then calls the
|
||||
* esp_phy_disable function with PHY_MODEM_WIFI as the argument.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void esp_phy_disable_wrapper(void)
|
||||
{
|
||||
phy_wifi_enable_set(0);
|
||||
esp_phy_disable(PHY_MODEM_WIFI);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_read_mac
|
||||
*
|
||||
@ -4041,6 +4087,61 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int))
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: coex_schm_flexible_period_set_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This is a wrapper for coex_schm_flexible_period_set. It sets the
|
||||
* flexible period for the coexistence mechanism. If power management
|
||||
* feature is enabled (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the
|
||||
* function with the given period. If the feature is not enabled, it
|
||||
* returns 0.
|
||||
*
|
||||
* Input Parameters:
|
||||
* period - The period to set for the coexistence mechanism.
|
||||
*
|
||||
* Returned Value:
|
||||
* If power management is enabled, it returns the result of the
|
||||
* coex_schm_flexible_period_set function. Otherwise, it returns 0.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int coex_schm_flexible_period_set_wrapper(uint8_t period)
|
||||
{
|
||||
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
|
||||
return coex_schm_flexible_period_set(period);
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: coex_schm_flexible_period_get_wrapper
|
||||
*
|
||||
* Description:
|
||||
* This is a wrapper for coex_schm_flexible_period_get. If power management
|
||||
* feature is enabled (CONFIG_ESP_COEX_POWER_MANAGEMENT), it calls the
|
||||
* function and returns its result. If the feature is not enabled, it
|
||||
* returns 1.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* If power management is enabled, it returns the result of the
|
||||
* coex_schm_flexible_period_get function. Otherwise, it returns 1.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static uint8_t coex_schm_flexible_period_get_wrapper(void)
|
||||
{
|
||||
#if CONFIG_ESP_COEX_POWER_MANAGEMENT
|
||||
return coex_schm_flexible_period_get();
|
||||
#else
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_random_ulong
|
||||
*
|
||||
|
||||
@ -45,7 +45,7 @@
|
||||
# include "esp_private/wifi.h"
|
||||
# include "esp_wpa.h"
|
||||
#endif
|
||||
#include "esp_coexist_internal.h"
|
||||
#include "private/esp_coexist_internal.h"
|
||||
#include "periph_ctrl.h"
|
||||
#include "esp_phy_init.h"
|
||||
#include "phy_init_data.h"
|
||||
@ -339,6 +339,85 @@ static void esp_wifi_set_log_level(void)
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_to_errno
|
||||
*
|
||||
* Description:
|
||||
* Transform from ESP Wi-Fi error code to NuttX error code
|
||||
*
|
||||
* Input Parameters:
|
||||
* err - ESP Wi-Fi error code
|
||||
*
|
||||
* Returned Value:
|
||||
* NuttX error code defined in errno.h
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int32_t esp_wifi_to_errno(int err)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (err < ESP_ERR_WIFI_BASE)
|
||||
{
|
||||
/* Unmask component error bits */
|
||||
|
||||
ret = err & 0xfff;
|
||||
|
||||
switch (ret)
|
||||
{
|
||||
case ESP_OK:
|
||||
ret = OK;
|
||||
break;
|
||||
case ESP_ERR_NO_MEM:
|
||||
ret = -ENOMEM;
|
||||
break;
|
||||
|
||||
case ESP_ERR_INVALID_ARG:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
|
||||
case ESP_ERR_INVALID_STATE:
|
||||
ret = -EIO;
|
||||
break;
|
||||
|
||||
case ESP_ERR_INVALID_SIZE:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
|
||||
case ESP_ERR_NOT_FOUND:
|
||||
ret = -ENOSYS;
|
||||
break;
|
||||
|
||||
case ESP_ERR_NOT_SUPPORTED:
|
||||
ret = -ENOSYS;
|
||||
break;
|
||||
|
||||
case ESP_ERR_TIMEOUT:
|
||||
ret = -ETIMEDOUT;
|
||||
break;
|
||||
|
||||
case ESP_ERR_INVALID_MAC:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = ERROR;
|
||||
}
|
||||
|
||||
if (ret != OK)
|
||||
{
|
||||
wlerr("ERROR: %s\n", esp_err_to_name(err));
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Functions needed by libphy.a
|
||||
****************************************************************************/
|
||||
@ -1281,8 +1360,16 @@ int esp_wireless_deinit(void)
|
||||
int32_t esp_wifi_init(const wifi_init_config_t *config)
|
||||
{
|
||||
int32_t ret;
|
||||
uint32_t min_active_time_us =
|
||||
CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME * 1000;
|
||||
uint32_t keep_alive_time_us =
|
||||
CONFIG_ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME * 1000 * 1000;
|
||||
uint32_t wait_broadcast_data_time_us =
|
||||
CONFIG_ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME * 1000;
|
||||
|
||||
esp_wifi_power_domain_on();
|
||||
esp_wifi_set_sleep_min_active_time(min_active_time_us);
|
||||
esp_wifi_set_keep_alive_time(keep_alive_time_us);
|
||||
esp_wifi_set_sleep_wait_broadcast_data_time(wait_broadcast_data_time_us);
|
||||
|
||||
#ifdef CONFIG_ESP32S3_WIFI_BT_COEXIST
|
||||
ret = coex_init();
|
||||
@ -1294,6 +1381,7 @@ int32_t esp_wifi_init(const wifi_init_config_t *config)
|
||||
#endif /* CONFIG_ESP32S3_WIFI_BT_COEXIST */
|
||||
|
||||
esp_wifi_set_log_level();
|
||||
esp_wifi_power_domain_on();
|
||||
|
||||
ret = esp_wifi_init_internal(config);
|
||||
if (ret)
|
||||
|
||||
@ -79,10 +79,49 @@ struct esp_queuecache_s
|
||||
uint8_t *buffer;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nuttx_err_to_freertos
|
||||
*
|
||||
* Description:
|
||||
* Transform from Nuttx OS error code to FreeRTOS's pdTRUE or pdFALSE.
|
||||
*
|
||||
* Input Parameters:
|
||||
* ret - NuttX error code
|
||||
*
|
||||
* Returned Value:
|
||||
* Wi-Fi adapter error code
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline int32_t nuttx_err_to_freertos(int ret)
|
||||
{
|
||||
return ret >= 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_wifi_to_errno
|
||||
*
|
||||
* Description:
|
||||
* Transform from ESP Wi-Fi error code to NuttX error code
|
||||
*
|
||||
* Input Parameters:
|
||||
* err - ESP Wi-Fi error code
|
||||
*
|
||||
* Returned Value:
|
||||
* NuttX error code defined in errno.h
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int32_t esp_wifi_to_errno(int err);
|
||||
|
||||
/****************************************************************************
|
||||
* Functions needed by libphy.a
|
||||
****************************************************************************/
|
||||
|
||||
@ -65,6 +65,9 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
|
||||
|
||||
# Source files
|
||||
@ -75,6 +78,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efus
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_calib.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
|
||||
@ -91,9 +95,11 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)mspi_timing_config.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_cache_esp32s2_esp32s3.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
|
||||
@ -105,7 +111,6 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mcpwm_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mpu_hal.c
|
||||
@ -145,7 +150,6 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_sys.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_spiflash.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_cache_esp32s2_esp32s3.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)with_key_purposes$(DELIM)esp_efuse_api_key.c
|
||||
|
||||
|
||||
@ -39,8 +39,6 @@
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define REG_SPI_BASE(i) (DR_REG_SPI2_BASE + (((i) > 3) ? ((((i) - 2) * 0x1000) + 0x10000) : (((i) - 2) * 0x1000)))
|
||||
|
||||
#define DR_REG_USB_BASE 0x60080000
|
||||
|
||||
#define DR_REG_ASSIST_DEBUG_BASE 0x600CE000
|
||||
|
||||
@ -137,6 +137,12 @@ SECTIONS
|
||||
esp_head.*(.literal .text .literal.* .text.*)
|
||||
esp_start.*(.literal .text .literal.* .text.*)
|
||||
|
||||
*libesp_wifi.a:esp_adapter.*(.literal.coex_pti_get_wrapper .text.coex_pti_get_wrapper)
|
||||
*libesp_wifi.a:wifi_netif.*(.literal.wifi_sta_receive .text.wifi_sta_receive)
|
||||
*libesp_wifi.a:wifi_netif.*(.literal.wifi_transmit_wrap .text.wifi_transmit_wrap)
|
||||
|
||||
*libhal.a:timer_hal.*(.literal.timer_hal_capture_and_get_counter_value .text.timer_hal_capture_and_get_counter_value)
|
||||
|
||||
*(.wifi0iram.*)
|
||||
*(.wifirxiram.*)
|
||||
*(.wifislpiram.*)
|
||||
@ -291,6 +297,15 @@ SECTIONS
|
||||
_instruction_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.text start, this can be used for mmu driver to maintain virtual address */
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(EXCLUDE_FILE(*libpp.a) .wifiorslpiram EXCLUDE_FILE(*libpp.a) .wifiorslpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram.*)
|
||||
|
||||
*libesp_wifi.a:esp_adapter.*(.text .text.clear_intr_wrapper .text.coex_deinit_wrapper .text.coex_disable_wrapper .text.coex_enable_wrapper .text.coex_init_wrapper .text.coex_register_start_cb_wrapper .text.coex_schm_curr_period_get_wrapper .text.coex_schm_curr_phase_get_wrapper .text.coex_schm_flexible_period_get_wrapper .text.coex_schm_flexible_period_set_wrapper .text.coex_schm_interval_get_wrapper .text.coex_schm_process_restart_wrapper .text.coex_schm_register_cb_wrapper .text.coex_schm_status_bit_clear_wrapper .text.coex_schm_status_bit_set_wrapper .text.coex_wifi_channel_set_wrapper .text.coex_wifi_request_wrapper .text.disable_intr_wrapper .text.enable_intr_wrapper .text.esp_event_post_wrapper .text.esp_log_write_wrapper .text.esp_log_writev_wrapper .text.esp_phy_disable_wrapper .text.esp_phy_enable_wrapper .text.esp_read_mac_wrapper .text.event_group_wait_bits_wrapper .text.get_time_wrapper .text.mutex_create_wrapper .text.mutex_delete_wrapper .text.nvs_open_wrapper .text.queue_create_wrapper .text.queue_recv_wrapper .text.queue_send_to_back_wrapper .text.queue_send_to_front_wrapper .text.queue_send_wrapper .text.recursive_mutex_create_wrapper .text.set_intr_wrapper .text.set_isr_wrapper .text.task_create_pinned_to_core_wrapper .text.task_create_wrapper .text.task_get_max_priority_wrapper .text.wifi_clock_disable_wrapper .text.wifi_clock_enable_wrapper .text.wifi_create_queue .text.wifi_create_queue_wrapper .text.wifi_delete_queue .text.wifi_delete_queue_wrapper .text.wifi_reset_mac_wrapper .text.wifi_thread_semphr_free .text.wifi_thread_semphr_get_wrapper)
|
||||
|
||||
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.fini.literal)
|
||||
|
||||
@ -77,7 +77,7 @@
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST
|
||||
# include "esp_coexist_internal.h"
|
||||
# include "private/esp_coexist_internal.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESPRESSIF_WIFI
|
||||
|
||||
@ -334,6 +334,13 @@ SECTIONS
|
||||
_instruction_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.text start, this can be used for mmu driver to maintain virtual address */
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(.wifiorslpiram .wifiorslpiram.*)
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(.wifislprxiram .wifislprxiram.*)
|
||||
|
||||
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.fini.literal)
|
||||
|
||||
@ -77,7 +77,7 @@
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST
|
||||
# include "esp_coexist_internal.h"
|
||||
# include "private/esp_coexist_internal.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESPRESSIF_WIFI
|
||||
|
||||
@ -77,7 +77,7 @@
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST
|
||||
# include "esp_coexist_internal.h"
|
||||
# include "private/esp_coexist_internal.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESPRESSIF_WIFI
|
||||
|
||||
@ -19,6 +19,10 @@
|
||||
****************************************************************************/
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* From esp-hal-3rdparty */
|
||||
#include "sdkconfig.h"
|
||||
#include "ld.common"
|
||||
|
||||
#if CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED
|
||||
# define ESP_BOOTLOADER_RESERVE_RTC 0
|
||||
|
||||
|
||||
@ -18,6 +18,7 @@
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
cache_set_idrom_mmu_size = Cache_Set_IDROM_MMU_Size;
|
||||
cache_resume_icache = Cache_Resume_ICache;
|
||||
cache_suspend_icache = Cache_Suspend_ICache;
|
||||
cache_invalidate_icache_all = Cache_Invalidate_ICache_All;
|
||||
|
||||
@ -88,6 +88,7 @@ SECTIONS
|
||||
*libarch.a:*gpio_periph.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*modem_clock_hal.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*esp_rom_systimer.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*esp_rom_tlsf.*(.literal .literal.* .text .text.*)
|
||||
*libarch.a:*esp_rom_wdt.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*ocode_init.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*esp_rom_regi2c_esp32h2.*(.text .text.* .literal .literal.*)
|
||||
@ -124,6 +125,7 @@ SECTIONS
|
||||
*libarch.a:*uart_hal.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*mpu_hal.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*mmu_hal.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*pmu_hal.*(.literal .literal.* .text .text.*)
|
||||
*libarch.a:*uart_periph.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*esp_rom_uart.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*esp_rom_sys.*(.text .text.* .literal .literal.*)
|
||||
@ -226,6 +228,7 @@ SECTIONS
|
||||
*libarch.a:*gpio_periph.*(.rodata .rodata.*)
|
||||
*libarch.a:*modem_clock_hal.*(.rodata .rodata.*)
|
||||
*libarch.a:*esp_rom_systimer.*(.rodata .rodata.*)
|
||||
*libarch.a:*esp_rom_tlsf.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libarch.a:*esp_rom_wdt.*(.rodata .rodata.*)
|
||||
*libarch.a:*ocode_init.*(.rodata .rodata.*)
|
||||
*libarch.a:*esp_rom_regi2c_esp32h2.*(.rodata .rodata.*)
|
||||
@ -262,6 +265,7 @@ SECTIONS
|
||||
*libarch.a:*uart_hal.*(.rodata .rodata.*)
|
||||
*libarch.a:*mpu_hal.*(.rodata .rodata.*)
|
||||
*libarch.a:*mmu_hal.*(.rodata .rodata.*)
|
||||
*libarch.a:*pmu_hal.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
|
||||
*libarch.a:*uart_periph.*(.rodata .rodata.*)
|
||||
*libarch.a:*esp_rom_uart.*(.rodata .rodata.*)
|
||||
*libarch.a:*esp_rom_sys.*(.rodata .rodata.*)
|
||||
@ -326,12 +330,24 @@ SECTIONS
|
||||
.flash.text : ALIGN(0xFFFF)
|
||||
{
|
||||
_stext = .;
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
|
||||
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.fini.literal)
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
/** CPU will try to prefetch up to 16 bytes of
|
||||
* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
* dummy bytes to ensure this
|
||||
*/
|
||||
. += _esp_flash_mmap_prefetch_pad_size;
|
||||
|
||||
_text_end = ABSOLUTE(.);
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
/* Similar to _iram_start, this symbol goes here so it is
|
||||
@ -435,6 +451,10 @@ SECTIONS
|
||||
.rtc.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_rtc_fast_start = ABSOLUTE(.);
|
||||
_rtc_text_start = ABSOLUTE(.);
|
||||
*(.rtc.entry.text)
|
||||
|
||||
*(.rtc.literal .rtc.text)
|
||||
} >rtc_iram_seg
|
||||
|
||||
|
||||
@ -22,6 +22,13 @@
|
||||
|
||||
/* Lower-case aliases for symbols not compliant to nxstyle */
|
||||
|
||||
PROVIDE( rom_i2c_writereg = rom_i2c_writeReg );
|
||||
|
||||
PROVIDE( cache_flash_mmu_set = cache_flash_mmu_set_rom);
|
||||
PROVIDE( cache_flush = Cache_Flush_rom );
|
||||
PROVIDE( cache_read_disable = Cache_Read_Disable_rom );
|
||||
PROVIDE( cache_read_enable = Cache_Read_Enable_rom );
|
||||
|
||||
/* Bluetooth needs symbol alias, to be removed after IDF rename it */
|
||||
|
||||
#ifdef CONFIG_ESP32_BLE
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -291,6 +291,14 @@ SECTIONS
|
||||
*(.fini.literal)
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(EXCLUDE_FILE(*libpp.a) .wifiorslpiram EXCLUDE_FILE(*libpp.a) .wifiorslpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_text_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
|
||||
@ -502,6 +502,14 @@ SECTIONS
|
||||
*(.fini.literal)
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(EXCLUDE_FILE(*libpp.a) .wifiorslpiram EXCLUDE_FILE(*libpp.a) .wifiorslpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
. += 16;
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
@ -23,8 +23,6 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
# pick the common linker scripts.
|
||||
|
||||
|
||||
36
boards/xtensa/esp32s2/common/scripts/esp32s2_aliases.ld
Normal file
36
boards/xtensa/esp32s2/common/scripts/esp32s2_aliases.ld
Normal file
@ -0,0 +1,36 @@
|
||||
/****************************************************************************
|
||||
* boards/xtensa/esp32s2/common/scripts/esp32s2_aliases.ld
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Lower-case aliases for symbols not compliant to nxstyle */
|
||||
|
||||
PROVIDE( cache_allocate_sram = Cache_Allocate_SRAM );
|
||||
PROVIDE( cache_invalidate_icache_all = Cache_Invalidate_ICache_All );
|
||||
PROVIDE( cache_resume_dcache = Cache_Resume_DCache );
|
||||
PROVIDE( cache_resume_icache = Cache_Resume_ICache );
|
||||
PROVIDE( cache_resume_icache = Cache_Resume_ICache );
|
||||
PROVIDE( cache_set_icache_mode = Cache_Set_ICache_Mode );
|
||||
PROVIDE( cache_suspend_dcache = Cache_Suspend_DCache );
|
||||
PROVIDE( cache_suspend_icache = Cache_Suspend_ICache );
|
||||
PROVIDE( rom_i2c_readreg = rom_i2c_readReg );
|
||||
PROVIDE( rom_i2c_readreg_mask = rom_i2c_readReg_Mask );
|
||||
PROVIDE( rom_i2c_writereg = rom_i2c_writeReg );
|
||||
PROVIDE( rom_i2c_writereg_mask = rom_i2c_writeReg_Mask );
|
||||
@ -1,963 +0,0 @@
|
||||
/****************************************************************************
|
||||
* boards/xtensa/esp32s2/common/scripts/esp32s2_rom.ld
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* ESP32-S2 ROM address table (except symbols from libgcc and libc)
|
||||
* Generated for ROM with MD5sum: 0a2c7ec5109c17884606d23b47045796
|
||||
*
|
||||
* These are all weak symbols that could be overwritten in ESP-IDF.
|
||||
*/
|
||||
|
||||
PROVIDE ( abort = 0x40019fb4 );
|
||||
PROVIDE ( acm_config_descr = 0x3ffaef0f );
|
||||
PROVIDE ( acm_usb_descriptors = 0x3ffaee68 );
|
||||
PROVIDE ( boot_prepare = 0x4000f348 );
|
||||
PROVIDE ( Cache_Address_Through_DCache = 0x400180f0 );
|
||||
PROVIDE ( Cache_Address_Through_ICache = 0x400180bc );
|
||||
PROVIDE ( cache_allocate_sram = 0x40018d6c );
|
||||
PROVIDE ( Cache_Clean_Addr = 0x40018370 );
|
||||
PROVIDE ( Cache_Clean_All = 0x40018438 );
|
||||
PROVIDE ( Cache_Clean_Items = 0x40018250 );
|
||||
PROVIDE ( Cache_Config_DCache_Autoload = 0x40018794 );
|
||||
PROVIDE ( Cache_Config_ICache_Autoload = 0x40018664 );
|
||||
PROVIDE ( Cache_Count_Flash_Pages = 0x40018f70 );
|
||||
PROVIDE ( cache_dbus_mmu_set = 0x40018eb0 );
|
||||
PROVIDE ( Cache_DCache_Preload_Done = 0x40018630 );
|
||||
PROVIDE ( Cache_Disable_DCache = 0x40018c68 );
|
||||
PROVIDE ( Cache_Disable_DCache_Autoload = 0x4001888c );
|
||||
PROVIDE ( Cache_Disable_DCache_PreLock = 0x40018a5c );
|
||||
PROVIDE ( Cache_Disable_ICache = 0x40018c2c );
|
||||
PROVIDE ( Cache_Disable_ICache_Autoload = 0x4001875c );
|
||||
PROVIDE ( Cache_Disable_ICache_PreLock = 0x4001892c );
|
||||
PROVIDE ( cache_enable_dcache = 0x40018d58 );
|
||||
PROVIDE ( Cache_Enable_DCache_Autoload = 0x40018874 );
|
||||
PROVIDE ( Cache_Enable_DCache_PreLock = 0x400189f0 );
|
||||
PROVIDE ( Cache_Enable_Defalut_DCache_Mode = 0x40018170 );
|
||||
PROVIDE ( Cache_Enable_ICache = 0x40018cf8 );
|
||||
PROVIDE ( Cache_Enable_ICache_Autoload = 0x40018744 );
|
||||
PROVIDE ( Cache_Enable_ICache_PreLock = 0x400188c0 );
|
||||
PROVIDE ( Cache_End_DCache_Preload = 0x40018644 );
|
||||
PROVIDE ( Cache_End_ICache_Preload = 0x400185b0 );
|
||||
PROVIDE ( Cache_Flash_To_SPIRAM_Copy = 0x40018fc4 );
|
||||
PROVIDE ( Cache_Get_DCache_Line_Size = 0x40017fd8 );
|
||||
PROVIDE ( Cache_Get_ICache_Line_Size = 0x40017fbc );
|
||||
PROVIDE ( Cache_Get_Memory_Addr = 0x4001929c );
|
||||
PROVIDE ( Cache_Get_Memory_BaseAddr = 0x40019244 );
|
||||
PROVIDE ( Cache_Get_Memory_value = 0x400192d8 );
|
||||
PROVIDE ( Cache_Get_Mode = 0x40017ff0 );
|
||||
PROVIDE ( Cache_Get_Virtual_Addr = 0x40019210 );
|
||||
PROVIDE ( cache_ibus_mmu_set = 0x40018df4 );
|
||||
PROVIDE ( Cache_ICache_Preload_Done = 0x4001859c );
|
||||
PROVIDE ( cache_invalidate_addr = 0x400182e4 );
|
||||
PROVIDE ( cache_invalidate_dcache_all = 0x4001842c );
|
||||
PROVIDE ( Cache_Invalidate_DCache_Items = 0x40018208 );
|
||||
PROVIDE ( cache_invalidate_icache_all = 0x40018420 );
|
||||
PROVIDE ( Cache_Invalidate_ICache_Items = 0x400181b8 );
|
||||
PROVIDE ( Cache_Lock_Addr = 0x40018b10 );
|
||||
PROVIDE ( Cache_Lock_DCache_Items = 0x40018a80 );
|
||||
PROVIDE ( Cache_Lock_ICache_Items = 0x40018950 );
|
||||
PROVIDE ( Cache_Mask_All = 0x40018458 );
|
||||
PROVIDE ( cache_memory_baseaddrs = 0x3ffaf020 );
|
||||
PROVIDE ( Cache_MMU_Init = 0x40018dd8 );
|
||||
PROVIDE ( cache_resume_dcache = 0x40018d3c );
|
||||
PROVIDE ( Cache_Resume_DCache_Autoload = 0x4001850c );
|
||||
PROVIDE ( cache_resume_icache = 0x40018cdc );
|
||||
PROVIDE ( Cache_Resume_ICache_Autoload = 0x400184c4 );
|
||||
PROVIDE ( cache_set_dcache_mode = 0x40018074 );
|
||||
PROVIDE ( Cache_Set_Default_Mode = 0x4001810c );
|
||||
PROVIDE ( cache_set_icache_mode = 0x4001803c );
|
||||
PROVIDE ( Cache_Start_DCache_Preload = 0x400185c4 );
|
||||
PROVIDE ( Cache_Start_ICache_Preload = 0x40018530 );
|
||||
PROVIDE ( cache_suspend_dcache = 0x40018d04 );
|
||||
PROVIDE ( Cache_Suspend_DCache_Autoload = 0x400184e0 );
|
||||
PROVIDE ( cache_suspend_icache = 0x40018ca4 );
|
||||
PROVIDE ( Cache_Suspend_ICache_Autoload = 0x40018498 );
|
||||
PROVIDE ( Cache_Travel_Tag_Memory = 0x4001908c );
|
||||
PROVIDE ( Cache_Unlock_Addr = 0x40018b9c );
|
||||
PROVIDE ( Cache_Unlock_DCache_Items = 0x40018ac8 );
|
||||
PROVIDE ( Cache_Unlock_ICache_Items = 0x40018998 );
|
||||
PROVIDE ( Cache_UnMask_Drom0 = 0x40018480 );
|
||||
PROVIDE ( cache_writeback_addr = 0x400183c8 );
|
||||
PROVIDE ( cache_writeback_all = 0x40018444 );
|
||||
PROVIDE ( Cache_WriteBack_Items = 0x40018298 );
|
||||
PROVIDE ( cacl_rtc_memory_crc = 0x4000ffa0 );
|
||||
PROVIDE ( cdc_acm_class_handle_req = 0x40013050 );
|
||||
PROVIDE ( cdc_acm_config = 0x3ffffa10 );
|
||||
PROVIDE ( cdc_acm_dev = 0x3ffffce8 );
|
||||
PROVIDE ( cdc_acm_fifo_fill = 0x4001318c );
|
||||
PROVIDE ( cdc_acm_fifo_read = 0x40013200 );
|
||||
PROVIDE ( cdc_acm_init = 0x40013144 );
|
||||
PROVIDE ( cdc_acm_irq_callback_set = 0x400132d4 );
|
||||
PROVIDE ( cdc_acm_irq_is_pending = 0x400132b0 );
|
||||
PROVIDE ( cdc_acm_irq_rx_disable = 0x40013290 );
|
||||
PROVIDE ( cdc_acm_irq_rx_enable = 0x40013284 );
|
||||
PROVIDE ( cdc_acm_irq_rx_ready = 0x4001329c );
|
||||
PROVIDE ( cdc_acm_irq_state_disable = 0x40013264 );
|
||||
PROVIDE ( cdc_acm_irq_state_enable = 0x40013258 );
|
||||
PROVIDE ( cdc_acm_irq_tx_disable = 0x4001324c );
|
||||
PROVIDE ( cdc_acm_irq_tx_enable = 0x40013240 );
|
||||
PROVIDE ( cdc_acm_irq_tx_ready = 0x40013270 );
|
||||
PROVIDE ( cdc_acm_line_ctrl_get = 0x40013330 );
|
||||
PROVIDE ( cdc_acm_line_ctrl_set = 0x400132dc );
|
||||
PROVIDE ( cdc_acm_poll_out = 0x40013360 );
|
||||
PROVIDE ( cdc_acm_rx_fifo_cnt = 0x400131ec );
|
||||
PROVIDE ( chip723_phyrom_version = 0x4000a8a8 );
|
||||
PROVIDE ( chip_usb_detach = 0x40013508 );
|
||||
PROVIDE ( chip_usb_dw_did_persist = 0x4001337c );
|
||||
PROVIDE ( chip_usb_dw_init = 0x400133bc );
|
||||
PROVIDE ( chip_usb_dw_prepare_persist = 0x40013588 );
|
||||
PROVIDE ( chip_usb_get_persist_flags = 0x400135d8 );
|
||||
PROVIDE ( chip_usb_set_persist_flags = 0x400135e8 );
|
||||
PROVIDE ( context = 0x3fffeb34 );
|
||||
PROVIDE ( cpio_destroy = 0x4001599c );
|
||||
PROVIDE ( cpio_done = 0x40015968 );
|
||||
PROVIDE ( cpio_feed = 0x40015668 );
|
||||
PROVIDE ( cpio_start = 0x4001561c );
|
||||
PROVIDE ( crc16_le = 0x40011a10 );
|
||||
PROVIDE ( crc32_le = 0x400119dc );
|
||||
PROVIDE ( crc8_le = 0x40011a4c );
|
||||
PROVIDE ( _cvt = 0x4000f9b8 );
|
||||
PROVIDE ( _data_end_all_pro = 0x3fffff98 );
|
||||
PROVIDE ( _data_end_c = 0x3ffffd80 );
|
||||
PROVIDE ( _data_end_ets = 0x3fffe710 );
|
||||
PROVIDE ( _data_end_ets_delay = 0x3ffffd74 );
|
||||
PROVIDE ( _data_end_ets_printf = 0x3ffffd5c );
|
||||
PROVIDE ( _data_end_newlib = 0x3ffffd74 );
|
||||
PROVIDE ( _data_end_phyrom = 0x3fffff98 );
|
||||
PROVIDE ( _data_end_sip = 0x3fffeb70 );
|
||||
PROVIDE ( _data_end_slc = 0x3fffeb70 );
|
||||
PROVIDE ( _data_end_spi_flash = 0x3ffffd54 );
|
||||
PROVIDE ( _data_end_spi_slave = 0x3fffeb30 );
|
||||
PROVIDE ( _data_end_uart = 0x3ffffcf4 );
|
||||
PROVIDE ( _data_end_usbdev = 0x3ffffa6c );
|
||||
PROVIDE ( _data_end_xtos = 0x3fffef88 );
|
||||
PROVIDE ( _data_start_all_pro = 0x3fffff98 );
|
||||
PROVIDE ( _data_start_c = 0x3ffffd7c );
|
||||
PROVIDE ( _data_start_ets = 0x3fffe710 );
|
||||
PROVIDE ( _data_start_ets_delay = 0x3ffffd70 );
|
||||
PROVIDE ( _data_start_ets_printf = 0x3ffffd5c );
|
||||
PROVIDE ( _data_start_newlib = 0x3ffffd74 );
|
||||
PROVIDE ( _data_start_phyrom = 0x3ffffd90 );
|
||||
PROVIDE ( _data_start_sip = 0x3fffeb70 );
|
||||
PROVIDE ( _data_start_slc = 0x3fffeb70 );
|
||||
PROVIDE ( _data_start_spi_flash = 0x3ffffd38 );
|
||||
PROVIDE ( _data_start_spi_slave = 0x3fffeb30 );
|
||||
PROVIDE ( _data_start_uart = 0x3ffffcf4 );
|
||||
PROVIDE ( _data_start_usbdev = 0x3ffffa10 );
|
||||
PROVIDE ( _data_start_xtos = 0x3fffeb70 );
|
||||
PROVIDE ( dbus_baseaddrs = 0x3ffaf030 );
|
||||
PROVIDE ( _DebugExceptionVector = 0x40000280 );
|
||||
PROVIDE ( _DebugExceptionVector_text_end = 0x4000028b );
|
||||
PROVIDE ( _DebugExceptionVector_text_start = 0x40000280 );
|
||||
PROVIDE ( __default_global_locale = 0x3ffac600 );
|
||||
PROVIDE ( dfu_class_handle_req = 0x400152f0 );
|
||||
PROVIDE ( dfu_config_descr = 0x3ffaeeb2 );
|
||||
PROVIDE ( dfu_cpio_callback = 0x4001360c );
|
||||
PROVIDE ( dfu_custom_handle_req = 0x40015568 );
|
||||
PROVIDE ( dfu_flash_attach = 0x40015a34 );
|
||||
PROVIDE ( dfu_flash_deinit = 0x400159b4 );
|
||||
PROVIDE ( dfu_flash_erase = 0x400159bc );
|
||||
PROVIDE ( dfu_flash_init = 0x400159a4 );
|
||||
PROVIDE ( dfu_flash_program = 0x400159d0 );
|
||||
PROVIDE ( dfu_flash_read = 0x40015a24 );
|
||||
PROVIDE ( dfu_status_cb = 0x40015514 );
|
||||
PROVIDE ( dfu_updater_begin = 0x40013858 );
|
||||
PROVIDE ( dfu_updater_clear_err = 0x40013810 );
|
||||
PROVIDE ( dfu_updater_enable = 0x40013828 );
|
||||
PROVIDE ( dfu_updater_end = 0x40013900 );
|
||||
PROVIDE ( dfu_updater_feed = 0x400138b4 );
|
||||
PROVIDE ( dfu_updater_flash_read = 0x400139e8 );
|
||||
PROVIDE ( dfu_updater_get_err = 0x400137fc );
|
||||
PROVIDE ( dfu_updater_set_raw_addr = 0x400139d4 );
|
||||
PROVIDE ( dfu_usb_descriptors = 0x3ffaee4c );
|
||||
PROVIDE ( dh_group14_generator = 0x3ffadfec );
|
||||
PROVIDE ( dh_group14_prime = 0x3ffadeec );
|
||||
PROVIDE ( dh_group15_generator = 0x3ffadeeb );
|
||||
PROVIDE ( dh_group15_prime = 0x3ffadd6b );
|
||||
PROVIDE ( dh_group16_generator = 0x3ffadd6a );
|
||||
PROVIDE ( dh_group16_prime = 0x3ffadb6a );
|
||||
PROVIDE ( dh_group17_generator = 0x3ffadb69 );
|
||||
PROVIDE ( dh_group17_prime = 0x3ffad869 );
|
||||
PROVIDE ( dh_group18_generator = 0x3ffad868 );
|
||||
PROVIDE ( dh_group18_prime = 0x3ffad468 );
|
||||
PROVIDE ( dh_group1_generator = 0x3ffae18f );
|
||||
PROVIDE ( dh_group1_prime = 0x3ffae12f );
|
||||
PROVIDE ( dh_group2_generator = 0x3ffae12e );
|
||||
PROVIDE ( dh_group2_prime = 0x3ffae0ae );
|
||||
PROVIDE ( dh_group5_generator = 0x3ffae0ad );
|
||||
PROVIDE ( dh_group5_prime = 0x3ffadfed );
|
||||
PROVIDE ( disable_default_watchdog = 0x4000f270 );
|
||||
PROVIDE ( Disable_QMode = 0x400166e0 );
|
||||
PROVIDE ( dmadesc_rx = 0x3fffeb4c );
|
||||
PROVIDE ( dmadesc_tx = 0x3fffeb40 );
|
||||
PROVIDE ( _DoubleExceptionVector = 0x400003c0 );
|
||||
PROVIDE ( _DoubleExceptionVector_text_end = 0x400003c6 );
|
||||
PROVIDE ( _DoubleExceptionVector_text_start = 0x400003c0 );
|
||||
PROVIDE ( _dram0_0_start = 0x3ffeab00 );
|
||||
PROVIDE ( _dram0_rtos_reserved_start = 0x3ffffa10 );
|
||||
PROVIDE ( dummy_len_plus = 0x3ffffd54 );
|
||||
PROVIDE ( Enable_QMode = 0x40016690 );
|
||||
PROVIDE ( esp_crc8 = 0x40011a78 );
|
||||
PROVIDE ( esp_rom_config_pad_power_select = 0x40016e58 );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_opiflash_cache_mode_config = 0x40016754 );
|
||||
PROVIDE ( esp_rom_opiflash_exec_cmd = 0x40017e30 );
|
||||
PROVIDE ( esp_rom_opiflash_exit_continuous_read_mode = 0x40017ee8 );
|
||||
PROVIDE ( esp_rom_opiflash_mode_reset = 0x40017f90 );
|
||||
PROVIDE ( esp_rom_opiflash_pin_config = 0x400177f8 );
|
||||
PROVIDE ( esp_rom_opiflash_soft_reset = 0x40017f24 );
|
||||
PROVIDE ( esp_rom_spi_cmd_config = 0x40017c58 );
|
||||
PROVIDE ( esp_rom_spi_cmd_start = 0x40017ba8 );
|
||||
PROVIDE ( esp_rom_spi_flash_auto_sus_res = 0x400175e0 );
|
||||
PROVIDE ( esp_rom_spi_flash_auto_wait_idle = 0x4001751c );
|
||||
PROVIDE ( esp_rom_spi_flash_send_resume = 0x40017570 );
|
||||
PROVIDE ( esp_rom_spi_flash_update_id = 0x40016e44 );
|
||||
PROVIDE ( esp_rom_spi_reset_rw_mode = 0x40017984 );
|
||||
PROVIDE ( esp_rom_spi_set_dtr_swap_mode = 0x40017b60 );
|
||||
PROVIDE ( esp_rom_spi_set_op_mode = 0x400179e8 );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
|
||||
PROVIDE ( esp_rom_spiflash_select_qio_pins = SelectSpiQIO );
|
||||
PROVIDE ( _etext = 0x4001bed0 );
|
||||
PROVIDE ( ets_aes_block = 0x4000d610 );
|
||||
PROVIDE ( ets_aes_disable = 0x4000d4f8 );
|
||||
PROVIDE ( ets_aes_enable = 0x4000d4cc );
|
||||
PROVIDE ( ets_aes_set_endian = 0x4000d528 );
|
||||
PROVIDE ( ets_aes_setkey = 0x4000d594 );
|
||||
PROVIDE ( ets_aes_setkey_dec = 0x4000d5f0 );
|
||||
PROVIDE ( ets_aes_setkey_enc = 0x4000d5e0 );
|
||||
PROVIDE ( ets_bigint_disable = 0x4000d750 );
|
||||
PROVIDE ( ets_bigint_enable = 0x4000d708 );
|
||||
PROVIDE ( ets_bigint_getz = 0x4000d858 );
|
||||
PROVIDE ( ets_bigint_modexp = 0x4000d818 );
|
||||
PROVIDE ( ets_bigint_modmult = 0x4000d7f4 );
|
||||
PROVIDE ( ets_bigint_multiply = 0x4000d790 );
|
||||
PROVIDE ( ets_bigint_wait_finish = 0x4000d840 );
|
||||
PROVIDE ( ets_config_flash_by_image_hdr = 0x40010e40 );
|
||||
PROVIDE ( ets_delay_us = 0x4000d888 );
|
||||
PROVIDE ( ets_ds_disable = 0x4000d910 );
|
||||
PROVIDE ( ets_ds_enable = 0x4000d8e4 );
|
||||
PROVIDE ( ets_ds_encrypt_params = 0x4000da90 );
|
||||
PROVIDE ( ets_ds_finish_sign = 0x4000d9f8 );
|
||||
PROVIDE ( ets_ds_is_busy = 0x4000d93c );
|
||||
PROVIDE ( ets_ds_start_sign = 0x4000d96c );
|
||||
PROVIDE ( ets_efuse_cache_encryption_enabled = 0x4000e690 );
|
||||
PROVIDE ( ets_efuse_clear_program_registers = 0x4000e100 );
|
||||
PROVIDE ( ets_efuse_count_unused_key_blocks = 0x4000e2c4 );
|
||||
PROVIDE ( ets_efuse_download_modes_disabled = 0x4000e594 );
|
||||
PROVIDE ( ets_efuse_find_purpose = 0x4000e224 );
|
||||
PROVIDE ( ets_efuse_find_unused_key_block = 0x4000e2ac );
|
||||
PROVIDE ( ets_efuse_flash_opi_5pads_power_sel_vddspi = 0x4000e640 );
|
||||
PROVIDE ( ets_efuse_flash_opi_mode = 0x4000e650 );
|
||||
PROVIDE ( ets_efuse_force_send_resume = 0x4000e660 );
|
||||
PROVIDE ( ets_efuse_get_flash_delay_us = 0x4000e6d4 );
|
||||
PROVIDE ( ets_efuse_get_key_purpose = 0x4000e1b0 );
|
||||
PROVIDE ( ets_efuse_get_opiconfig = 0x4000e4fc );
|
||||
PROVIDE ( ets_efuse_get_read_register_address = 0x4000e18c );
|
||||
PROVIDE ( ets_efuse_get_spiconfig = 0x4000e4a0 );
|
||||
PROVIDE ( ets_efuse_get_uart_print_channel = 0x4000e5b4 );
|
||||
PROVIDE ( ets_efuse_get_uart_print_control = 0x4000e5a4 );
|
||||
PROVIDE ( ets_efuse_get_wp_pad = 0x4000e444 );
|
||||
PROVIDE ( ets_efuse_key_block_unused = 0x4000e250 );
|
||||
PROVIDE ( ets_efuse_legacy_spi_boot_mode_disabled = 0x4000e6b0 );
|
||||
PROVIDE ( ets_efuse_program = 0x4000e134 );
|
||||
PROVIDE ( ets_efuse_read = 0x4000e0c0 );
|
||||
PROVIDE ( ets_efuse_rs_calculate = 0x4000e6f8 );
|
||||
PROVIDE ( ets_efuse_secure_boot_aggressive_revoke_enabled = 0x4000e680 );
|
||||
PROVIDE ( ets_efuse_secure_boot_enabled = 0x4000e670 );
|
||||
PROVIDE ( ets_efuse_security_download_modes_enabled = 0x4000e5d4 );
|
||||
PROVIDE ( ets_efuse_set_timing = 0x4000df3c );
|
||||
PROVIDE ( ets_efuse_start = 0x4000e084 );
|
||||
PROVIDE ( ets_efuse_usb_download_mode_disabled = 0x4000e5f4 );
|
||||
PROVIDE ( ets_efuse_usb_force_nopersist = 0x4000e630 );
|
||||
PROVIDE ( ets_efuse_usb_module_disabled = 0x4000e5c4 );
|
||||
PROVIDE ( ets_efuse_usb_use_ext_phy = 0x4000e620 );
|
||||
PROVIDE ( ets_efuse_write_key = 0x4000e2f4 );
|
||||
PROVIDE ( ets_emsa_pss_verify = 0x40011818 );
|
||||
PROVIDE ( ets_get_apb_freq = 0x40010c58 );
|
||||
PROVIDE ( ets_get_cpu_frequency = 0x4000d8b0 );
|
||||
PROVIDE ( ets_get_printf_channel = 0x4000ff48 );
|
||||
PROVIDE ( ets_get_xtal_div = 0x40010bfc );
|
||||
PROVIDE ( ets_get_xtal_freq = 0x40010c38 );
|
||||
PROVIDE ( ets_hmac_calculate_downstream = 0x4000f120 );
|
||||
PROVIDE ( ets_hmac_calculate_message = 0x4000f020 );
|
||||
PROVIDE ( ets_hmac_disable = 0x4000eff4 );
|
||||
PROVIDE ( ets_hmac_enable = 0x4000efd8 );
|
||||
PROVIDE ( ets_hmac_invalidate_downstream = 0x4000f140 );
|
||||
PROVIDE ( ets_install_lock = 0x4000fea0 );
|
||||
PROVIDE ( ets_install_putc1 = 0x4000feb0 );
|
||||
PROVIDE ( ets_install_putc2 = 0x4000fed0 );
|
||||
PROVIDE ( ets_install_uart_printf = 0x4000fec0 );
|
||||
PROVIDE ( ets_intr_count = 0x3fffe710 );
|
||||
PROVIDE ( ets_intr_lock = 0x4000f168 );
|
||||
PROVIDE ( ets_intr_unlock = 0x4000f17c );
|
||||
PROVIDE ( ets_is_print_boot = 0x4000f2a0 );
|
||||
PROVIDE ( ets_isr_attach = 0x4000f1a4 );
|
||||
PROVIDE ( ets_isr_mask = 0x4000f1b4 );
|
||||
PROVIDE ( ets_isr_unmask = 0x4000f1c0 );
|
||||
PROVIDE ( ets_jtag_enable_temporarily = 0x4000e548 );
|
||||
PROVIDE ( ets_loader_map_range = 0x40010d4c );
|
||||
PROVIDE ( ets_mgf1_sha256 = 0x400117b0 );
|
||||
PROVIDE ( ets_printf = 0x4000fee0 );
|
||||
PROVIDE ( ets_printf_lock = 0x3ffffd64 );
|
||||
PROVIDE ( ets_printf_uart = 0x3ffffd5c );
|
||||
PROVIDE ( ets_printf_unlock = 0x3ffffd60 );
|
||||
PROVIDE ( ets_rsa_pss_verify = 0x4001191c );
|
||||
PROVIDE ( ets_run_flash_bootloader = 0x40010f58 );
|
||||
PROVIDE ( ets_secure_boot_read_key_digests = 0x400101ac );
|
||||
PROVIDE ( ets_secure_boot_revoke_public_key_digest = 0x4001025c );
|
||||
PROVIDE ( ets_secure_boot_verify_bootloader_with_keys = 0x40010444 );
|
||||
PROVIDE ( ets_secure_boot_verify_signature = 0x400102cc );
|
||||
PROVIDE ( ets_secure_boot_verify_stage_bootloader = 0x40010720 );
|
||||
PROVIDE ( ets_set_printf_channel = 0x4000ff3c );
|
||||
PROVIDE ( ets_set_user_start = 0x4000f25c );
|
||||
PROVIDE ( ets_set_xtal_div = 0x40010c18 );
|
||||
PROVIDE ( ets_sha_clone = 0x4001095c );
|
||||
PROVIDE ( ets_sha_disable = 0x400107b4 );
|
||||
PROVIDE ( ets_sha_enable = 0x40010788 );
|
||||
PROVIDE ( ets_sha_finish = 0x40010ab8 );
|
||||
PROVIDE ( ets_sha_get_state = 0x40010934 );
|
||||
PROVIDE ( ets_sha_init = 0x400107e0 );
|
||||
PROVIDE ( ets_sha_process = 0x40010988 );
|
||||
PROVIDE ( ets_sha_starts = 0x40010828 );
|
||||
PROVIDE ( ets_sha_update = 0x400109f8 );
|
||||
PROVIDE ( ets_startup_callback = 0x3fffe718 );
|
||||
PROVIDE ( ets_unpack_flash_code_legacy = 0x40011430 );
|
||||
PROVIDE ( ets_update_cpu_frequency = 0x4000d8a4 );
|
||||
PROVIDE ( ets_vprintf = 0x4000fa3c );
|
||||
PROVIDE ( ets_waiti0 = 0x4000f190 );
|
||||
PROVIDE ( ets_wdt_reset_cpu = 0x4001a82c );
|
||||
PROVIDE ( ets_write_char = 0x4000f974 );
|
||||
PROVIDE ( ets_write_char_uart = 0x4000f998 );
|
||||
PROVIDE ( exc_cause_table = 0x3ffacbe8 );
|
||||
PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40011ed8 );
|
||||
PROVIDE ( FilePacketSendReqMsgProc = 0x40011bd8 );
|
||||
PROVIDE ( g_rom_flashchip = 0x3ffffd38 );
|
||||
PROVIDE ( FlashDwnLdDeflatedStartMsgProc = 0x40011e80 );
|
||||
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x40011cc0 );
|
||||
PROVIDE ( FlashDwnLdStartMsgProc = 0x40011b74 );
|
||||
PROVIDE ( FlashDwnLdStopDeflatedReqMsgProc = 0x40011fd8 );
|
||||
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40011c90 );
|
||||
PROVIDE ( general_device_descr = 0x3ffffa58 );
|
||||
PROVIDE ( _GeneralException = 0x400073cf );
|
||||
PROVIDE ( get_id = 0x4001610c );
|
||||
PROVIDE ( GetSecurityInfoProc = 0x40012098 );
|
||||
PROVIDE ( GetUartDevice = 0x40012f60 );
|
||||
PROVIDE ( __global_locale_ptr = 0x3ffffd7c );
|
||||
PROVIDE ( g_phyFuns = 0x3ffffd90 );
|
||||
PROVIDE ( g_phyFuns_instance = 0x3ffffd94 );
|
||||
PROVIDE ( gpio_input_get = 0x400193a0 );
|
||||
PROVIDE ( gpio_input_get_high = 0x400193b4 );
|
||||
PROVIDE ( gpio_matrix_in = 0x40019430 );
|
||||
PROVIDE ( gpio_matrix_out = 0x40019460 );
|
||||
PROVIDE ( gpio_output_disable = 0x400194dc );
|
||||
PROVIDE ( gpio_output_enable = 0x400194b0 );
|
||||
PROVIDE ( gpio_output_set = 0x4001933c );
|
||||
PROVIDE ( gpio_output_set_high = 0x40019374 );
|
||||
PROVIDE ( gpio_pad_hold = 0x40019654 );
|
||||
PROVIDE ( gpio_pad_input_disable = 0x400195f0 );
|
||||
PROVIDE ( gpio_pad_input_enable = 0x400195cc );
|
||||
PROVIDE ( gpio_pad_pulldown = 0x40019598 );
|
||||
PROVIDE ( gpio_pad_pullup = 0x40019564 );
|
||||
PROVIDE ( gpio_pad_select_gpio = 0x40019510 );
|
||||
PROVIDE ( gpio_pad_set_drv = 0x40019538 );
|
||||
PROVIDE ( gpio_pad_unhold = 0x4001961c );
|
||||
PROVIDE ( gpio_pin_wakeup_disable = 0x40019404 );
|
||||
PROVIDE ( gpio_pin_wakeup_enable = 0x400193c8 );
|
||||
PROVIDE ( g_shared_buffers = 0x3ffeab04 );
|
||||
PROVIDE ( g_ticks_per_us = 0x3ffffd70 );
|
||||
PROVIDE ( hmac_md5 = 0x40005490 );
|
||||
PROVIDE ( hmac_md5_vector = 0x400053a0 );
|
||||
PROVIDE ( ibus_baseaddrs = 0x3ffaf03c );
|
||||
PROVIDE ( intr_matrix_set = 0x4000f1d0 );
|
||||
PROVIDE ( _iram0_text_end = 0x40000540 );
|
||||
PROVIDE ( _iram0_text_start = 0x40000540 );
|
||||
PROVIDE ( _iram1_text_end = 0x60021100 );
|
||||
PROVIDE ( _iram1_text_start = 0x60021100 );
|
||||
PROVIDE ( _KernelExceptionVector = 0x40000300 );
|
||||
PROVIDE ( _KernelExceptionVector_text_end = 0x40000306 );
|
||||
PROVIDE ( _KernelExceptionVector_text_start = 0x40000300 );
|
||||
PROVIDE ( _Level2FromVector = 0x400074f8 );
|
||||
PROVIDE ( _Level2HandlerLabel = 0x00000000 );
|
||||
PROVIDE ( _Level2InterruptVector_text_end = 0x40000186 );
|
||||
PROVIDE ( _Level2InterruptVector_text_start = 0x40000180 );
|
||||
PROVIDE ( _Level2Vector = 0x40000180 );
|
||||
PROVIDE ( _Level3FromVector = 0x40007594 );
|
||||
PROVIDE ( _Level3HandlerLabel = 0x00000000 );
|
||||
PROVIDE ( _Level3InterruptVector_text_end = 0x400001c6 );
|
||||
PROVIDE ( _Level3InterruptVector_text_start = 0x400001c0 );
|
||||
PROVIDE ( _Level3Vector = 0x400001c0 );
|
||||
PROVIDE ( _Level4FromVector = 0x4000762c );
|
||||
PROVIDE ( _Level4HandlerLabel = 0x00000000 );
|
||||
PROVIDE ( _Level4InterruptVector_text_end = 0x40000206 );
|
||||
PROVIDE ( _Level4InterruptVector_text_start = 0x40000200 );
|
||||
PROVIDE ( _Level4Vector = 0x40000200 );
|
||||
PROVIDE ( _Level5FromVector = 0x4000775c );
|
||||
PROVIDE ( _Level5HandlerLabel = 0x00000000 );
|
||||
PROVIDE ( _Level5InterruptVector_text_end = 0x40000246 );
|
||||
PROVIDE ( _Level5InterruptVector_text_start = 0x40000240 );
|
||||
PROVIDE ( _Level5Vector = 0x40000240 );
|
||||
PROVIDE ( _LevelOneInterrupt = 0x4000740a );
|
||||
PROVIDE ( _lit4_end = 0x40000540 );
|
||||
PROVIDE ( _lit4_start = 0x40000540 );
|
||||
PROVIDE ( lldesc_build_chain = 0x4000907c );
|
||||
PROVIDE ( lldesc_num2link = 0x4000916c );
|
||||
PROVIDE ( lldesc_set_owner = 0x40009198 );
|
||||
PROVIDE ( lldesc_setup = 0x40019ed8 );
|
||||
PROVIDE ( main = 0x4000f6c4 );
|
||||
PROVIDE ( MD5Final = 0x4000530c );
|
||||
PROVIDE ( MD5Init = 0x4000526c );
|
||||
PROVIDE ( MD5Update = 0x4000528c );
|
||||
PROVIDE ( md5_vector = 0x40005374 );
|
||||
PROVIDE ( MemDwnLdStartMsgProc = 0x40011cec );
|
||||
PROVIDE ( MemDwnLdStopReqMsgProc = 0x40011d80 );
|
||||
PROVIDE ( _memmap_cacheattr_bp_allvalid = 0x22222222 );
|
||||
PROVIDE ( _memmap_cacheattr_bp_base = 0x00000220 );
|
||||
PROVIDE ( _memmap_cacheattr_bp_strict = 0xfffff22f );
|
||||
PROVIDE ( _memmap_cacheattr_bp_trapnull = 0x2222222f );
|
||||
PROVIDE ( _memmap_cacheattr_reset = 0x2222211f );
|
||||
PROVIDE ( _memmap_cacheattr_unused_mask = 0xfffff00f );
|
||||
PROVIDE ( _memmap_cacheattr_wb_allvalid = 0x22222112 );
|
||||
PROVIDE ( _memmap_cacheattr_wba_trapnull = 0x2222211f );
|
||||
PROVIDE ( _memmap_cacheattr_wb_base = 0x00000110 );
|
||||
PROVIDE ( _memmap_cacheattr_wbna_trapnull = 0x2222211f );
|
||||
PROVIDE ( _memmap_cacheattr_wb_strict = 0xfffff11f );
|
||||
PROVIDE ( _memmap_cacheattr_wb_trapnull = 0x2222211f );
|
||||
PROVIDE ( _memmap_cacheattr_wt_allvalid = 0x22222112 );
|
||||
PROVIDE ( _memmap_cacheattr_wt_base = 0x00000110 );
|
||||
PROVIDE ( _memmap_cacheattr_wt_strict = 0xfffff11f );
|
||||
PROVIDE ( _memmap_cacheattr_wt_trapnull = 0x2222211f );
|
||||
PROVIDE ( _memmap_vecbase_reset = 0x40000000 );
|
||||
PROVIDE ( MemPacketSendReqMsgProc = 0x40011d1c );
|
||||
PROVIDE ( multofup = 0x4001bce0 );
|
||||
PROVIDE ( must_reset = 0x3ffffcf4 );
|
||||
PROVIDE ( mz_adler32 = 0x40002e90 );
|
||||
PROVIDE ( mz_crc32 = 0x40002f58 );
|
||||
PROVIDE ( mz_free = 0x40002fa4 );
|
||||
PROVIDE ( _NMIExceptionVector = 0x400002c0 );
|
||||
PROVIDE ( _NMIExceptionVector_text_end = 0x400002c3 );
|
||||
PROVIDE ( _NMIExceptionVector_text_start = 0x400002c0 );
|
||||
PROVIDE ( __packed = 0x3ffffcec );
|
||||
PROVIDE ( phy_get_romfuncs = 0x4000a88c );
|
||||
PROVIDE ( _Pri_4_HandlerAddress = 0x3fffed78 );
|
||||
PROVIDE ( _Pri_5_HandlerAddress = 0x3fffed7c );
|
||||
PROVIDE ( pthread_setcancelstate = 0x40019fa8 );
|
||||
PROVIDE ( _putc1 = 0x3ffffd6c );
|
||||
PROVIDE ( _putc2 = 0x3ffffd68 );
|
||||
PROVIDE ( RcvMsg = 0x40012f10 );
|
||||
PROVIDE ( recv_packet = 0x40012de8 );
|
||||
PROVIDE ( _ResetHandler = 0x4000044c );
|
||||
PROVIDE ( _ResetVector = 0x40000400 );
|
||||
PROVIDE ( _ResetVector_literal_end = 0x40000540 );
|
||||
PROVIDE ( _ResetVector_literal_start = 0x40000540 );
|
||||
PROVIDE ( _ResetVector_text_end = 0x4000053d );
|
||||
PROVIDE ( _ResetVector_text_start = 0x40000400 );
|
||||
PROVIDE ( _rodata_end = 0x3ffaff2c );
|
||||
PROVIDE ( _rodata_start = 0x3ffac600 );
|
||||
PROVIDE ( rom_abs_temp = 0x4000c330 );
|
||||
PROVIDE ( rom_ant_btrx_cfg = 0x4000a0fc );
|
||||
PROVIDE ( rom_ant_bttx_cfg = 0x4000a0c0 );
|
||||
PROVIDE ( rom_ant_dft_cfg = 0x40009fc8 );
|
||||
PROVIDE ( rom_ant_wifirx_cfg = 0x4000a03c );
|
||||
PROVIDE ( rom_ant_wifitx_cfg = 0x40009ff8 );
|
||||
PROVIDE ( rom_bb_bss_cbw40_dig = 0x40009a84 );
|
||||
PROVIDE ( rom_bb_wdg_cfg = 0x40009eb8 );
|
||||
PROVIDE ( rom_bb_wdg_test_en = 0x40009a48 );
|
||||
PROVIDE ( rom_bb_wdt_get_status = 0x40009d18 );
|
||||
PROVIDE ( rom_bb_wdt_int_enable = 0x40009cd4 );
|
||||
PROVIDE ( rom_bb_wdt_rst_enable = 0x40009cb4 );
|
||||
PROVIDE ( rom_bb_wdt_timeout_clear = 0x40009cfc );
|
||||
PROVIDE ( rom_cbw2040_cfg = 0x4000a550 );
|
||||
PROVIDE ( rom_check_noise_floor = 0x40009b4c );
|
||||
PROVIDE ( rom_chip_i2c_readReg = 0x4000a8e4 );
|
||||
PROVIDE ( rom_chip_i2c_writeReg = 0x4000a960 );
|
||||
PROVIDE ( rom_correct_rf_ana_gain = 0x4000d2b4 );
|
||||
PROVIDE ( rom_dc_iq_est = 0x4000c414 );
|
||||
PROVIDE ( rom_disable_agc = 0x400091cc );
|
||||
PROVIDE ( rom_enable_agc = 0x400091e4 );
|
||||
PROVIDE ( rom_freq_get_i2c_data = 0x4000bb84 );
|
||||
PROVIDE ( rom_freq_i2c_set_wifi_data = 0x4000b948 );
|
||||
PROVIDE ( rom_freq_i2c_write_set = 0x4000b3bc );
|
||||
PROVIDE ( rom_gen_rx_gain_table = 0x4000a300 );
|
||||
PROVIDE ( rom_get_bbgain_db = 0x400094ec );
|
||||
PROVIDE ( rom_get_data_sat = 0x40009338 );
|
||||
PROVIDE ( rom_get_fm_sar_dout = 0x4000c024 );
|
||||
PROVIDE ( rom_get_i2c_read_mask = 0x4000a8c0 );
|
||||
PROVIDE ( rom_get_power_db = 0x4000ce28 );
|
||||
PROVIDE ( rom_get_pwctrl_correct = 0x4000d470 );
|
||||
PROVIDE ( rom_get_rfcal_rxiq_data = 0x4000cab0 );
|
||||
PROVIDE ( rom_get_rf_gain_qdb = 0x4000d29c );
|
||||
PROVIDE ( rom_get_sar_dout = 0x4000d400 );
|
||||
PROVIDE ( rom_i2c_clk_sel = 0x4000a788 );
|
||||
PROVIDE ( rom_i2c_readreg = 0x4000a940 );
|
||||
PROVIDE ( rom_i2c_readreg_mask = 0x4000a9c4 );
|
||||
PROVIDE ( rom_i2c_writereg = 0x4000a9a8 );
|
||||
PROVIDE ( rom_i2c_writereg_mask = 0x4000aa00 );
|
||||
PROVIDE ( rom_index_to_txbbgain = 0x4000bd10 );
|
||||
PROVIDE ( rom_iq_est_disable = 0x4000c3d8 );
|
||||
PROVIDE ( rom_iq_est_enable = 0x4000c358 );
|
||||
PROVIDE ( rom_linear_to_db = 0x4000cdbc );
|
||||
PROVIDE ( rom_loopback_mode_en = 0x40009304 );
|
||||
PROVIDE ( rom_mac_enable_bb = 0x40009e48 );
|
||||
PROVIDE ( rom_meas_tone_pwr_db = 0x4000ce64 );
|
||||
PROVIDE ( rom_mhz2ieee = 0x4000a4e8 );
|
||||
PROVIDE ( rom_noise_floor_auto_set = 0x40009ab4 );
|
||||
PROVIDE ( rom_pbus_debugmode = 0x4000ac70 );
|
||||
PROVIDE ( rom_pbus_force_mode = 0x4000aa6c );
|
||||
PROVIDE ( rom_pbus_force_test = 0x4000abd0 );
|
||||
PROVIDE ( rom_pbus_rd = 0x4000ac2c );
|
||||
PROVIDE ( rom_pbus_rd_addr = 0x4000ab34 );
|
||||
PROVIDE ( rom_pbus_rd_shift = 0x4000ab80 );
|
||||
PROVIDE ( rom_pbus_rx_dco_cal = 0x4000c49c );
|
||||
PROVIDE ( rom_pbus_set_dco = 0x4000ae2c );
|
||||
PROVIDE ( rom_pbus_set_rxgain = 0x4000ac98 );
|
||||
PROVIDE ( rom_pbus_workmode = 0x4000ac84 );
|
||||
PROVIDE ( rom_pbus_xpd_rx_off = 0x4000acfc );
|
||||
PROVIDE ( rom_pbus_xpd_rx_on = 0x4000ad30 );
|
||||
PROVIDE ( rom_pbus_xpd_tx_off = 0x4000ad84 );
|
||||
PROVIDE ( rom_pbus_xpd_tx_on = 0x4000add4 );
|
||||
PROVIDE ( rom_phy_ant_init = 0x40009f48 );
|
||||
PROVIDE ( rom_phy_byte_to_word = 0x40009d60 );
|
||||
PROVIDE ( rom_phy_chan_dump_cfg = 0x4000a180 );
|
||||
PROVIDE ( rom_phy_chan_filt_set = 0x4000a614 );
|
||||
PROVIDE ( rom_phy_close_pa = 0x4000a810 );
|
||||
PROVIDE ( rom_phy_disable_cca = 0x40009208 );
|
||||
PROVIDE ( rom_phy_disable_low_rate = 0x4000a2b8 );
|
||||
PROVIDE ( rom_phy_enable_cca = 0x40009234 );
|
||||
PROVIDE ( rom_phy_enable_low_rate = 0x4000a280 );
|
||||
PROVIDE ( rom_phy_freq_correct = 0x4000b0b4 );
|
||||
PROVIDE ( rom_phy_get_noisefloor = 0x40009b04 );
|
||||
PROVIDE ( rom_phy_get_rx_freq = 0x4000a6ac );
|
||||
PROVIDE ( rom_phy_get_tx_rate = 0x40009d50 );
|
||||
PROVIDE ( rom_phy_rx11blr_cfg = 0x40009c5c );
|
||||
PROVIDE ( rom_phy_rx_sense_set = 0x4000a704 );
|
||||
PROVIDE ( rom_phy_set_bbfreq_init = 0x4000d3d0 );
|
||||
PROVIDE ( rom_pll_correct_dcap = 0x4000bad4 );
|
||||
PROVIDE ( rom_pow_usr = 0x4000924c );
|
||||
PROVIDE ( rom_read_hw_noisefloor = 0x40009c38 );
|
||||
PROVIDE ( rom_read_sar_dout = 0x4000bfd4 );
|
||||
PROVIDE ( rom_restart_cal = 0x4000ae74 );
|
||||
PROVIDE ( rom_rfcal_pwrctrl = 0x4000d098 );
|
||||
PROVIDE ( rom_rfcal_rxiq = 0x4000ca3c );
|
||||
PROVIDE ( rom_rfcal_txcap = 0x4000ccac );
|
||||
PROVIDE ( rom_rfpll_set_freq = 0x4000afa4 );
|
||||
PROVIDE ( rom_rftx_init = 0x4000b24c );
|
||||
PROVIDE ( rom_rx_gain_force = 0x40009558 );
|
||||
PROVIDE ( rom_rxiq_cover_mg_mp = 0x4000c954 );
|
||||
PROVIDE ( rom_rxiq_get_mis = 0x4000c7d8 );
|
||||
PROVIDE ( rom_rxiq_set_reg = 0x4000c8ec );
|
||||
PROVIDE ( rom_set_cal_rxdc = 0x400092c4 );
|
||||
PROVIDE ( rom_set_cca = 0x4000a59c );
|
||||
PROVIDE ( rom_set_chan_cal_interp = 0x4000cba4 );
|
||||
PROVIDE ( rom_set_channel_freq = 0x4000b00c );
|
||||
PROVIDE ( rom_set_loopback_gain = 0x40009268 );
|
||||
PROVIDE ( rom_set_noise_floor = 0x40009bf4 );
|
||||
PROVIDE ( rom_set_pbus_mem = 0x40009380 );
|
||||
PROVIDE ( rom_set_rf_freq_offset = 0x4000b214 );
|
||||
PROVIDE ( rom_set_rxclk_en = 0x400095cc );
|
||||
PROVIDE ( rom_set_txcap_reg = 0x4000cc34 );
|
||||
PROVIDE ( rom_set_txclk_en = 0x4000959c );
|
||||
PROVIDE ( rom_set_tx_dig_gain = 0x40009514 );
|
||||
PROVIDE ( rom_set_xpd_sar = 0x40009f08 );
|
||||
PROVIDE ( rom_spur_cal = 0x4000a47c );
|
||||
PROVIDE ( rom_spur_reg_write_one_tone = 0x400097c4 );
|
||||
PROVIDE ( rom_start_tx_tone = 0x400096f0 );
|
||||
PROVIDE ( rom_start_tx_tone_step = 0x40009608 );
|
||||
PROVIDE ( rom_stop_tx_tone = 0x4000a428 );
|
||||
PROVIDE ( _rom_store = 0x4001bed0 );
|
||||
PROVIDE ( _rom_store_table = 0x4001bd64 );
|
||||
PROVIDE ( rom_target_power_add_backoff = 0x4000d278 );
|
||||
PROVIDE ( rom_txbbgain_to_index = 0x4000bce0 );
|
||||
PROVIDE ( rom_txcal_work_mode = 0x4000bf30 );
|
||||
PROVIDE ( rom_txdc_cal_init = 0x4000bd2c );
|
||||
PROVIDE ( rom_txdc_cal_v70 = 0x4000bdc0 );
|
||||
PROVIDE ( rom_txiq_cover = 0x4000c1ac );
|
||||
PROVIDE ( rom_txiq_get_mis_pwr = 0x4000c0f8 );
|
||||
PROVIDE ( rom_txiq_set_reg = 0x4000bf64 );
|
||||
PROVIDE ( rom_tx_paon_set = 0x40009db8 );
|
||||
PROVIDE ( rom_tx_pwr_backoff = 0x4000ceb8 );
|
||||
PROVIDE ( rom_txtone_linear_pwr = 0x4000c0b0 );
|
||||
PROVIDE ( rom_usb_dev = 0x3ffffb9c ); /* static "usb_dev" */
|
||||
PROVIDE ( rom_usb_dev_end = 0x3ffffc78 ); /* end of "usb_dev" */
|
||||
PROVIDE ( rom_usb_dw_ctrl = 0x3ffffa74 ); /* static "usb_dw_ctrl" */
|
||||
PROVIDE ( rom_usb_dw_ctrl_end = 0x3ffffb9c ); /* end of "usb_dw_ctrl" */
|
||||
PROVIDE ( rom_usb_curr_desc = 0x3ffffa54 ); /* static "s_curr_descr" */
|
||||
PROVIDE ( rom_wait_rfpll_cal_end = 0x4000af3c );
|
||||
PROVIDE ( rom_wifi_11g_rate_chg = 0x4000d260 );
|
||||
PROVIDE ( rom_wifi_rifs_mode_en = 0x40009d2c );
|
||||
PROVIDE ( rom_write_dac_gain2 = 0x4000a210 );
|
||||
PROVIDE ( rom_write_gain_mem = 0x400094bc );
|
||||
PROVIDE ( rom_write_pll_cap_mem = 0x4000ba58 );
|
||||
PROVIDE ( rom_write_rfpll_sdm = 0x4000aed4 );
|
||||
PROVIDE ( rom_wr_rf_freq_mem = 0x4000b2f0 );
|
||||
PROVIDE ( roundup2 = 0x4001bcd0 );
|
||||
PROVIDE ( rtc_boot_control = 0x4001002c );
|
||||
PROVIDE ( rtc_get_reset_reason = 0x4000ff58 );
|
||||
PROVIDE ( rtc_get_wakeup_cause = 0x4000ff7c );
|
||||
PROVIDE ( rtc_select_apb_bridge = 0x400100a0 );
|
||||
PROVIDE ( s_cdcacm_old_rts = 0x3ffffd34 );
|
||||
PROVIDE ( SelectSpiFunction = 0x40015d08 );
|
||||
PROVIDE ( SelectSpiQIO = 0x40015b88 );
|
||||
PROVIDE ( SendMsg = 0x40012d0c );
|
||||
PROVIDE ( send_packet = 0x40012cc8 );
|
||||
PROVIDE ( set_rtc_memory_crc = 0x40010010 );
|
||||
PROVIDE ( SetSpiDrvs = 0x40015c18 );
|
||||
PROVIDE ( __sfp_recursive_mutex = 0x3ffffd88 );
|
||||
PROVIDE ( sig_matrix = 0x3ffffd57 );
|
||||
PROVIDE ( __sinit_recursive_mutex = 0x3ffffd84 );
|
||||
PROVIDE ( software_reset = 0x40010068 );
|
||||
PROVIDE ( software_reset_cpu = 0x40010080 );
|
||||
PROVIDE ( SPI_block_erase = 0x4001623c );
|
||||
PROVIDE ( spi_cache_mode_switch = 0x40016a00 );
|
||||
PROVIDE ( SPI_chip_erase = 0x400161b8 );
|
||||
PROVIDE ( SPIClkConfig = 0x400170a0 );
|
||||
PROVIDE ( SPI_Common_Command = 0x400162e8 );
|
||||
PROVIDE ( spi_common_set_flash_cs_timing = 0x40016c0c );
|
||||
PROVIDE ( spi_dummy_len_fix = 0x40015b50 );
|
||||
PROVIDE ( SPI_Encrypt_Write = 0x400177e0 );
|
||||
PROVIDE ( SPI_Encrypt_Write_Dest = 0x400176cc );
|
||||
PROVIDE ( SPIEraseArea = 0x40017470 );
|
||||
PROVIDE ( SPIEraseBlock = 0x4001710c );
|
||||
PROVIDE ( SPIEraseChip = 0x400170ec );
|
||||
PROVIDE ( SPIEraseSector = 0x4001716c );
|
||||
PROVIDE ( esp_rom_spiflash_attach = 0x40017004 );
|
||||
PROVIDE ( spi_flash_boot_attach = 0x40016fc0 );
|
||||
PROVIDE ( spi_flash_check_suspend_cb = 0x3ffffd58 );
|
||||
PROVIDE ( SPI_flashchip_data = 0x3ffffd3c );
|
||||
PROVIDE ( spi_flash_set_check_suspend_cb = 0x40015b3c );
|
||||
PROVIDE ( SPI_init = 0x40016ce8 );
|
||||
PROVIDE ( SPILock = 0x40016ed4 );
|
||||
PROVIDE ( SPIMasterReadModeCnfig = 0x40017014 );
|
||||
PROVIDE ( SPI_page_program = 0x400165a8 );
|
||||
PROVIDE ( SPIParamCfg = 0x40017500 );
|
||||
PROVIDE ( SPIRead = 0x4001728c );
|
||||
PROVIDE ( SPI_read_data = 0x40015ed8 );
|
||||
PROVIDE ( SPIReadModeCnfig = 0x40016f1c );
|
||||
PROVIDE ( SPI_read_status = 0x40016084 );
|
||||
PROVIDE ( SPI_read_status_high = 0x40016284 );
|
||||
PROVIDE ( SPI_sector_erase = 0x400161ec );
|
||||
PROVIDE ( spi_slave_download = 0x4001998c );
|
||||
PROVIDE ( spi_slave_rom_check_conn = 0x40019724 );
|
||||
PROVIDE ( spi_slave_rom_init = 0x40019774 );
|
||||
PROVIDE ( spi_slave_rom_init_hw = 0x40019b5c );
|
||||
PROVIDE ( spi_slave_rom_intr_enable = 0x40019b3c );
|
||||
PROVIDE ( spi_slave_rom_rxdma_load = 0x40019da8 );
|
||||
PROVIDE ( spi_slave_rom_txdma_load = 0x40019e3c );
|
||||
PROVIDE ( SPIUnlock = 0x40016e88 );
|
||||
PROVIDE ( SPI_user_command_read = 0x40015fc8 );
|
||||
PROVIDE ( SPI_Wait_Idle = 0x40016680 );
|
||||
PROVIDE ( SPI_WakeUp = 0x400160f4 );
|
||||
PROVIDE ( SPIWrite = 0x400171cc );
|
||||
PROVIDE ( SPI_write_enable = 0x4001655c );
|
||||
PROVIDE ( SPI_Write_Encrypt_Disable = 0x40017694 );
|
||||
PROVIDE ( SPI_Write_Encrypt_Enable = 0x40017678 );
|
||||
PROVIDE ( SPI_write_status = 0x400162a4 );
|
||||
PROVIDE ( __stack = 0x3fffe710 );
|
||||
PROVIDE ( _stack_sentry = 0x3fffc410 );
|
||||
PROVIDE ( _start = 0x4000726c );
|
||||
PROVIDE ( _stext = 0x40007118 );
|
||||
PROVIDE ( string0_descr = 0x3ffaeeae );
|
||||
PROVIDE ( str_manu_descr = 0x3ffaee9a );
|
||||
PROVIDE ( str_prod_descr = 0x3ffaee88 );
|
||||
PROVIDE ( str_serial_descr = 0x3ffaee84 );
|
||||
PROVIDE ( rom_usb_osglue = 0x3ffffcdc );
|
||||
PROVIDE ( _SyscallException = 0x4000732a );
|
||||
PROVIDE ( syscall_table_ptr_pro = 0x3ffffd78 );
|
||||
PROVIDE ( tdefl_compress = 0x400041dc );
|
||||
PROVIDE ( tdefl_compress_buffer = 0x40004938 );
|
||||
PROVIDE ( tdefl_compress_mem_to_mem = 0x40004a50 );
|
||||
PROVIDE ( tdefl_compress_mem_to_output = 0x40004a30 );
|
||||
PROVIDE ( tdefl_get_adler32 = 0x40004a28 );
|
||||
PROVIDE ( tdefl_get_prev_return_status = 0x40004a20 );
|
||||
PROVIDE ( tdefl_init = 0x40004954 );
|
||||
PROVIDE ( tdefl_write_image_to_png_file_in_memory = 0x40004a64 );
|
||||
PROVIDE ( tdefl_write_image_to_png_file_in_memory_ex = 0x40004a58 );
|
||||
PROVIDE ( _text_end = 0x4001bed0 );
|
||||
PROVIDE ( _text_start = 0x40007118 );
|
||||
PROVIDE ( tinfl_decompress = 0x40003000 );
|
||||
PROVIDE ( tinfl_decompress_mem_to_callback = 0x400041a8 );
|
||||
PROVIDE ( tinfl_decompress_mem_to_mem = 0x40004168 );
|
||||
PROVIDE ( uart_acm_dev = 0x3ffffcf8 );
|
||||
PROVIDE ( uartAttach = 0x40012890 );
|
||||
PROVIDE ( uart_baudrate_detect = 0x400128f0 );
|
||||
PROVIDE ( uart_buff_switch = 0x40012d64 );
|
||||
PROVIDE ( UartConnCheck = 0x40011ab4 );
|
||||
PROVIDE ( UartConnectProc = 0x40011da8 );
|
||||
PROVIDE ( UartDev = 0x3ffffcfc );
|
||||
PROVIDE ( uart_div_modify = 0x40012984 );
|
||||
PROVIDE ( uart_div_reinit = 0x400129d0 );
|
||||
PROVIDE ( UartDwnLdProc = 0x400121ac );
|
||||
PROVIDE ( UartGetCmdLn = 0x40012f28 );
|
||||
PROVIDE ( Uart_Init = 0x40012a04 );
|
||||
PROVIDE ( Uart_Init_USB = 0x40012818 );
|
||||
PROVIDE ( UartRegReadProc = 0x40011df8 );
|
||||
PROVIDE ( UartRegWriteProc = 0x40011db8 );
|
||||
PROVIDE ( uart_rx_intr_handler = 0x40012690 );
|
||||
PROVIDE ( uart_rx_one_char = 0x40012bf0 );
|
||||
PROVIDE ( uart_rx_one_char_block = 0x40012b9c );
|
||||
PROVIDE ( uart_rx_readbuff = 0x40012d1c );
|
||||
PROVIDE ( UartRxString = 0x40012c84 );
|
||||
PROVIDE ( UartSecureDwnLdProc = 0x40012464 );
|
||||
PROVIDE ( UartSetBaudProc = 0x40011e54 );
|
||||
PROVIDE ( UartSpiAttachProc = 0x40011e0c );
|
||||
PROVIDE ( UartSpiReadProc = 0x40011e28 );
|
||||
PROVIDE ( uart_tx_flush = 0x40012b40 );
|
||||
PROVIDE ( uart_tx_one_char = 0x40012b10 );
|
||||
PROVIDE ( uart_tx_one_char2 = 0x40012b28 );
|
||||
PROVIDE ( uart_tx_switch = 0x400128e4 );
|
||||
PROVIDE ( uart_tx_wait_idle = 0x40012b6c );
|
||||
PROVIDE ( uart_usb_enable_reset_on_rts = 0x40012858 );
|
||||
PROVIDE ( Uart_USB_Send_Testament = 0x400127d8 );
|
||||
PROVIDE ( usb_cancel_transfer = 0x40015200 );
|
||||
PROVIDE ( usb_data_stuff = 0x3ffacc88 );
|
||||
PROVIDE ( usb_dc_attach = 0x40013ecc );
|
||||
PROVIDE ( usb_dc_check_poll_for_interrupts = 0x40014980 );
|
||||
PROVIDE ( usb_dc_detach = 0x40014010 );
|
||||
PROVIDE ( usb_dc_ep_check_cap = 0x40014094 );
|
||||
PROVIDE ( usb_dc_ep_clear_stall = 0x400142f0 );
|
||||
PROVIDE ( usb_dc_ep_configure = 0x400140d8 );
|
||||
PROVIDE ( usb_dc_ep_disable = 0x400144ec );
|
||||
PROVIDE ( usb_dc_ep_enable = 0x4001442c );
|
||||
PROVIDE ( usb_dc_ep_flush = 0x400145b8 );
|
||||
PROVIDE ( usb_dc_ep_halt = 0x4001435c );
|
||||
PROVIDE ( usb_dc_ep_is_stalled = 0x400143bc );
|
||||
PROVIDE ( usb_dc_ep_mps = 0x40014958 );
|
||||
PROVIDE ( usb_dc_ep_read = 0x400148d8 );
|
||||
PROVIDE ( usb_dc_ep_read_continue = 0x40014898 );
|
||||
PROVIDE ( usb_dc_ep_read_wait = 0x400147bc );
|
||||
PROVIDE ( usb_dc_ep_set_callback = 0x40014910 );
|
||||
PROVIDE ( usb_dc_ep_set_stall = 0x40014290 );
|
||||
PROVIDE ( usb_dc_ep_write = 0x40014684 );
|
||||
PROVIDE ( usb_dc_ep_write_would_block = 0x40014624 );
|
||||
PROVIDE ( usb_dc_prepare_persist = 0x40013bec );
|
||||
PROVIDE ( usb_dc_reset = 0x40014044 );
|
||||
PROVIDE ( usb_dc_set_address = 0x4001405c );
|
||||
PROVIDE ( usb_dc_set_status_callback = 0x4001494c );
|
||||
PROVIDE ( usb_deconfig = 0x40014fa8 );
|
||||
PROVIDE ( usb_dev_get_configuration = 0x40014f4c );
|
||||
PROVIDE ( usb_dev_resume = 0x40014f38 );
|
||||
PROVIDE ( usb_dfu_force_detach = 0x400155b0 );
|
||||
PROVIDE ( usb_dfu_init = 0x40015598 );
|
||||
PROVIDE ( usb_dfu_set_detach_cb = 0x400152dc );
|
||||
PROVIDE ( usb_disable = 0x40015058 );
|
||||
PROVIDE ( usb_dw_isr_handler = 0x40013c48 );
|
||||
PROVIDE ( usb_enable = 0x40014fc8 );
|
||||
PROVIDE ( usb_ep_clear_stall = 0x400150c8 );
|
||||
PROVIDE ( usb_ep_read_continue = 0x400150f0 );
|
||||
PROVIDE ( usb_ep_read_wait = 0x400150d8 );
|
||||
PROVIDE ( usb_ep_set_stall = 0x400150b8 );
|
||||
PROVIDE ( usb_get_descriptor = 0x400149c0 );
|
||||
PROVIDE ( usb_read = 0x400150a0 );
|
||||
PROVIDE ( usb_set_config = 0x40014f64 );
|
||||
PROVIDE ( usb_set_current_descriptor = 0x400149a8 );
|
||||
PROVIDE ( usb_transfer = 0x40015150 );
|
||||
PROVIDE ( usb_transfer_ep_callback = 0x40015100 );
|
||||
PROVIDE ( usb_transfer_sync = 0x40015250 );
|
||||
PROVIDE ( usb_write = 0x40015088 );
|
||||
PROVIDE ( usb_write_would_block = 0x40015078 );
|
||||
PROVIDE ( user_code_start = 0x3fffe714 );
|
||||
PROVIDE ( _UserExceptionVector = 0x40000340 );
|
||||
PROVIDE ( _UserExceptionVector_text_end = 0x40000357 );
|
||||
PROVIDE ( _UserExceptionVector_text_start = 0x40000340 );
|
||||
PROVIDE ( VerifyFlashMd5Proc = 0x40012004 );
|
||||
PROVIDE ( Wait_SPI_Idle = 0x40016188 );
|
||||
PROVIDE ( _WindowOverflow12 = 0x40000100 );
|
||||
PROVIDE ( _WindowOverflow4 = 0x40000000 );
|
||||
PROVIDE ( _WindowOverflow8 = 0x40000080 );
|
||||
PROVIDE ( _WindowUnderflow12 = 0x40000140 );
|
||||
PROVIDE ( _WindowUnderflow4 = 0x40000040 );
|
||||
PROVIDE ( _WindowUnderflow8 = 0x400000c0 );
|
||||
PROVIDE ( _WindowVectors_text_end = 0x40000170 );
|
||||
PROVIDE ( _WindowVectors_text_start = 0x40000000 );
|
||||
PROVIDE ( __XT_EXCEPTION_DESCS__ = 0x3ffaff2c );
|
||||
PROVIDE ( __XT_EXCEPTION_DESCS_END__ = 0x3ffaff2c );
|
||||
PROVIDE ( __XT_EXCEPTION_TABLE__ = 0x3ffafe3a );
|
||||
PROVIDE ( xthal_bcopy = 0x4001a918 );
|
||||
PROVIDE ( xthal_copy123 = 0x4001a9ac );
|
||||
PROVIDE ( xthal_get_ccompare = 0x4001aabc );
|
||||
PROVIDE ( xthal_get_ccount = 0x4001aa90 );
|
||||
PROVIDE ( xthal_get_interrupt = 0x4001aadc );
|
||||
PROVIDE ( Xthal_intlevel = 0x3ffaf06c );
|
||||
PROVIDE ( xthal_memcpy = 0x4001a93c );
|
||||
PROVIDE ( xthal_set_ccompare = 0x4001aa98 );
|
||||
PROVIDE ( xthal_set_intclear = 0x4001aae4 );
|
||||
PROVIDE ( xthals_hw_configid0 = 0xc2ecfafe );
|
||||
PROVIDE ( xthals_hw_configid1 = 0x224787b1 );
|
||||
PROVIDE ( xthals_release_major = 0x00002ee0 );
|
||||
PROVIDE ( xthals_release_minor = 0x00000009 );
|
||||
PROVIDE ( _xtos_alloca_handler = 0x40000010 );
|
||||
PROVIDE ( xtos_cause3_handler = 0x40007370 );
|
||||
PROVIDE ( xtos_c_handler_table = 0x3fffec78 );
|
||||
PROVIDE ( xtos_c_wrapper_handler = 0x40007380 );
|
||||
PROVIDE ( _xtos_enabled = 0x3fffed80 );
|
||||
PROVIDE ( xtos_exc_handler_table = 0x3fffeb78 );
|
||||
PROVIDE ( xtos_interrupt_mask_table = 0x3fffee88 );
|
||||
PROVIDE ( xtos_interrupt_table = 0x3fffed88 );
|
||||
PROVIDE ( _xtos_ints_off = 0x4001a3e0 );
|
||||
PROVIDE ( _xtos_ints_on = 0x4001a3bc );
|
||||
PROVIDE ( _xtos_intstruct = 0x3fffed80 );
|
||||
PROVIDE ( _xtos_l1int_handler = 0x400073ec );
|
||||
PROVIDE ( xtos_p_none = 0x4001a8a0 );
|
||||
PROVIDE ( _xtos_restore_intlevel = 0x400074cc );
|
||||
PROVIDE ( _xtos_return_from_exc = 0x4001a8a8 );
|
||||
PROVIDE ( _xtos_set_exception_handler = 0x400072b4 );
|
||||
PROVIDE ( _xtos_set_interrupt_handler = 0x4001a380 );
|
||||
PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4001a344 );
|
||||
PROVIDE ( _xtos_set_intlevel = 0x4001a8c0 );
|
||||
PROVIDE ( _xtos_set_min_intlevel = 0x4001a8dc );
|
||||
PROVIDE ( _xtos_set_vpri = 0x400074d8 );
|
||||
PROVIDE ( _xtos_syscall_handler = 0x400072fc );
|
||||
PROVIDE ( xtos_unhandled_exception = 0x4001a900 );
|
||||
PROVIDE ( xtos_unhandled_interrupt = 0x4001a910 );
|
||||
PROVIDE ( _xtos_vectors_ref_ = 0x00000000 );
|
||||
PROVIDE ( _xtos_vpri_enabled = 0x3fffed84 );
|
||||
PROVIDE ( memchr = 0x4001ab24 );
|
||||
PROVIDE ( memcmp = 0x4001ab40 );
|
||||
PROVIDE ( memcpy = 0x4001aba8 );
|
||||
PROVIDE ( memmove = 0x4001acb0 );
|
||||
PROVIDE ( memrchr = 0x4001acec );
|
||||
PROVIDE ( memset = 0x4001ad3c );
|
||||
PROVIDE ( strchr = 0x4001adb0 );
|
||||
PROVIDE ( strcmp = 0x40007be4 );
|
||||
PROVIDE ( strcpy = 0x40007cfc );
|
||||
PROVIDE ( strlcpy = 0x4001adf8 );
|
||||
PROVIDE ( strncpy = 0x40007f20 );
|
||||
PROVIDE ( strlen = 0x40007e08 );
|
||||
PROVIDE ( strnlen = 0x4001ae9c );
|
||||
|
||||
/* Rename the SPI Flash data and functions. */
|
||||
|
||||
PROVIDE ( g_rom_spiflash_dummy_len_plus = dummy_len_plus);
|
||||
PROVIDE ( g_spiflash_chip = SPI_flashchip_data );
|
||||
PROVIDE ( spi_flash_config_param = SPIParamCfg );
|
||||
PROVIDE ( spi_flash_read = SPIRead );
|
||||
PROVIDE ( spi_flash_read_status = SPI_read_status );
|
||||
PROVIDE ( spi_flash_read_statushigh = SPI_read_status_high );
|
||||
PROVIDE ( spi_flash_read_user_cmd = SPI_user_command_read );
|
||||
PROVIDE ( spi_flash_write = SPIWrite );
|
||||
PROVIDE ( spi_flash_write_encrypted_disable = SPI_Write_Encrypt_Disable );
|
||||
PROVIDE ( spi_flash_write_encrypted_enable = SPI_Write_Encrypt_Enable );
|
||||
PROVIDE ( spi_flash_config_clk = SPIClkConfig );
|
||||
PROVIDE ( spi_flash_select_qio_pins = SelectSpiQIO );
|
||||
PROVIDE ( spi_flash_unlock = SPIUnlock );
|
||||
PROVIDE ( spi_flash_erase_sector = SPIEraseSector );
|
||||
PROVIDE ( spi_flash_erase_block = SPIEraseBlock );
|
||||
PROVIDE ( spi_flash_wait_idle = SPI_Wait_Idle );
|
||||
PROVIDE ( spi_flash_config_readmode = SPIReadModeCnfig );
|
||||
PROVIDE ( spi_flash_erase_block = SPIEraseBlock );
|
||||
PROVIDE ( spi_flash_write_encrypted = SPI_Encrypt_Write );
|
||||
|
||||
/* Unlike other ROM functions which are exported using PROVIDE, which declares weak symbols,
|
||||
* these libgcc functions are exported using assignment, which declare strong symbols.
|
||||
* This is done so that ROM functions are always used instead of the ones provided by libgcc.a.
|
||||
*/
|
||||
|
||||
__absvdi2 = 0x40005ad8;
|
||||
__absvsi2 = 0x40005ac4;
|
||||
__adddf3 = 0x40008660;
|
||||
__addsf3 = 0x400081b8;
|
||||
__addvdi3 = 0x40008d90;
|
||||
__addvsi3 = 0x40008d6c;
|
||||
__ashldi3 = 0x4001b000;
|
||||
__ashrdi3 = 0x4001b018;
|
||||
__bswapdi2 = 0x40006d34;
|
||||
__bswapsi2 = 0x40006d0c;
|
||||
__clear_cache = 0x40005abc;
|
||||
__clrsbdi2 = 0x40006da8;
|
||||
__clrsbsi2 = 0x40006d90;
|
||||
__clzdi2 = 0x4001b238;
|
||||
__clzsi2 = 0x4001afd0;
|
||||
__cmpdi2 = 0x40005a7c;
|
||||
__ctzdi2 = 0x4001b24c;
|
||||
__ctzsi2 = 0x4001afd8;
|
||||
__divdc3 = 0x40006854;
|
||||
__divdf3 = 0x40008a24;
|
||||
__divdi3 = 0x4001b26c;
|
||||
__divsc3 = 0x40006544;
|
||||
__divsf3 = 0x4000841c;
|
||||
__divsi3 = 0x4001afa0;
|
||||
__eqdf2 = 0x40005904;
|
||||
__eqsf2 = 0x400055d0;
|
||||
__extendsfdf2 = 0x40008d08;
|
||||
__ffsdi2 = 0x4001b214;
|
||||
__ffssi2 = 0x4001afec;
|
||||
__fixdfdi = 0x40008b98;
|
||||
__fixdfsi = 0x40008b4c;
|
||||
__fixsfdi = 0x4000851c;
|
||||
__fixsfsi = 0x400084dc;
|
||||
__fixunsdfsi = 0x40008c04;
|
||||
__fixunssfdi = 0x400085d4;
|
||||
__fixunssfsi = 0x4000857c;
|
||||
__floatdidf = 0x4001b170;
|
||||
__floatdisf = 0x4001b0a8;
|
||||
__floatsidf = 0x4001b12c;
|
||||
__floatsisf = 0x4001b058;
|
||||
__floatundidf = 0x4001b160;
|
||||
__floatundisf = 0x4001b098;
|
||||
__floatunsidf = 0x4001b120;
|
||||
__floatunsisf = 0x4001b04c;
|
||||
__gcc_bcmp = 0x40006de0;
|
||||
__gedf2 = 0x400059c4;
|
||||
__gesf2 = 0x40005668;
|
||||
__gtdf2 = 0x40005938;
|
||||
__gtsf2 = 0x400055fc;
|
||||
__ledf2 = 0x40005960;
|
||||
__lesf2 = 0x4000561c;
|
||||
__lshrdi3 = 0x4001b034;
|
||||
__ltdf2 = 0x400059ec;
|
||||
__ltsf2 = 0x40005688;
|
||||
__moddi3 = 0x4001b534;
|
||||
__modsi3 = 0x4001afa8;
|
||||
__muldc3 = 0x40005f0c;
|
||||
__muldf3 = 0x400057e8;
|
||||
__muldi3 = 0x4001b1e4;
|
||||
__mulsc3 = 0x40005ba4;
|
||||
__mulsf3 = 0x40005524;
|
||||
__mulsi3 = 0x4001af98;
|
||||
__mulvdi3 = 0x40008e50;
|
||||
__mulvsi3 = 0x40008e38;
|
||||
__nedf2 = 0x40005904;
|
||||
__negdf2 = 0x400056fc;
|
||||
__negdi2 = 0x4001b1fc;
|
||||
__negsf2 = 0x40008190;
|
||||
__negvdi2 = 0x40008f6c;
|
||||
__negvsi2 = 0x40008f4c;
|
||||
__nesf2 = 0x400055d0;
|
||||
__nsau_data = 0x3ffac870;
|
||||
__paritysi2 = 0x40009038;
|
||||
__popcountdi2 = 0x40008fe0;
|
||||
__popcountsi2 = 0x40008fa8;
|
||||
__popcount_tab = 0x3ffac870;
|
||||
__powidf2 = 0x40005b40;
|
||||
__powisf2 = 0x40005af8;
|
||||
__subdf3 = 0x400087b4;
|
||||
__subsf3 = 0x400082a0;
|
||||
__subvdi3 = 0x40008df4;
|
||||
__subvsi3 = 0x40008dd0;
|
||||
__truncdfsf2 = 0x40008c64;
|
||||
__ucmpdi2 = 0x40005a9c;
|
||||
__udivdi3 = 0x4001b7dc;
|
||||
__udivmoddi4 = 0x40006e20;
|
||||
__udivsi3 = 0x4001afb0;
|
||||
__udiv_w_sdiv = 0x40006e18;
|
||||
__umoddi3 = 0x4001ba60;
|
||||
__umodsi3 = 0x4001afb8;
|
||||
__umulsidi3 = 0x4001afc0;
|
||||
__unorddf2 = 0x40005a50;
|
||||
__unordsf2 = 0x400056d4;
|
||||
@ -23,7 +23,7 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32s2/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_aliases.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_peripherals.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
@ -23,7 +23,7 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32s2/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_aliases.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_peripherals.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
@ -23,7 +23,7 @@ include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/tools/esp32s2/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_aliases.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s2_peripherals.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,78 +0,0 @@
|
||||
/****************************************************************************
|
||||
* boards/xtensa/esp32s3/common/scripts/esp32s3_peripherals.ld
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* ROM APIs */
|
||||
|
||||
PROVIDE ( esp_rom_crc32_le = crc32_le );
|
||||
PROVIDE ( esp_rom_crc16_le = crc16_le );
|
||||
PROVIDE ( esp_rom_crc8_le = crc8_le );
|
||||
PROVIDE ( esp_rom_crc32_be = crc32_be );
|
||||
PROVIDE ( esp_rom_crc16_be = crc16_be );
|
||||
PROVIDE ( esp_rom_crc8_be = crc8_be );
|
||||
|
||||
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
|
||||
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
|
||||
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
|
||||
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
|
||||
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
|
||||
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
|
||||
|
||||
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
|
||||
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
|
||||
|
||||
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_uart_usb_acm_init = Uart_Init_USB );
|
||||
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_md5_init = MD5Init );
|
||||
PROVIDE ( esp_rom_md5_update = MD5Update );
|
||||
PROVIDE ( esp_rom_md5_final = MD5Final );
|
||||
|
||||
PROVIDE ( esp_rom_software_reset_system = software_reset );
|
||||
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
|
||||
|
||||
PROVIDE ( esp_rom_printf = ets_printf );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
|
||||
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
|
||||
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
|
||||
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
|
||||
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
|
||||
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
|
||||
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
|
||||
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
|
||||
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
|
||||
|
||||
PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
|
||||
PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
|
||||
PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
|
||||
PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );
|
||||
@ -106,6 +106,8 @@ SECTIONS
|
||||
esp32s3_userspace.*(.literal .text .literal.* .text.*)
|
||||
*librtc.a:(.literal .text .literal.* .text.*)
|
||||
*libkarch.a:esp32s3_spiflash.*(.literal .text .literal.* .text.*)
|
||||
*libkarch.a:cache_hal.*(.literal .text .literal.* .text.*)
|
||||
*libkarch.a:esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
|
||||
*libkarch.a:xtensa_cpupause.*(.literal .text .literal.* .text.*)
|
||||
*libkarch.a:xtensa_copystate.*(.literal .text .literal.* .text.*)
|
||||
*libkarch.a:xtensa_interruptcontext.*(.literal .text .literal.* .text.*)
|
||||
|
||||
@ -141,6 +141,8 @@ SECTIONS
|
||||
defined(CONFIG_ESP32S3_SPIRAM))
|
||||
*libc.a:lib_stackchk.*(.literal .text .literal.* .text.*)
|
||||
#endif
|
||||
*libarch.a:*cache_hal.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
|
||||
|
||||
*(.wifirxiram .wifirxiram.*)
|
||||
*(.wifi0iram .wifi0iram.*)
|
||||
@ -225,6 +227,7 @@ SECTIONS
|
||||
|
||||
*libphy.a:(.rodata .rodata.*)
|
||||
*libarch.a:xtensa_context.*(.rodata .rodata.*)
|
||||
*libarch.a:*cache_hal.*(.rodata .rodata.*)
|
||||
#if defined(CONFIG_STACK_CANARIES) && \
|
||||
(defined(CONFIG_ESP32S3_SPIFLASH) || \
|
||||
defined(CONFIG_ESP32S3_SPIRAM))
|
||||
@ -250,6 +253,13 @@ SECTIONS
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(EXCLUDE_FILE(*libpp.a) .wifiorslpiram EXCLUDE_FILE(*libpp.a) .wifiorslpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram.*)
|
||||
|
||||
/* CPU will try to prefetch up to 16 bytes of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
|
||||
@ -421,6 +421,13 @@ SECTIONS
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(EXCLUDE_FILE(*libpp.a) .wifiorslpiram EXCLUDE_FILE(*libpp.a) .wifiorslpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram.*)
|
||||
|
||||
/* CPU will try to prefetch up to 16 bytes of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
|
||||
@ -80,7 +80,7 @@ MEMORY
|
||||
/* Instruction RAM */
|
||||
|
||||
UIRAM (RWX) : org = SRAM_IRAM_ORG, len = 16K
|
||||
KIRAM (RWX) : org = ORIGIN(UIRAM) + LENGTH(UIRAM), len = 32K
|
||||
KIRAM (RWX) : org = ORIGIN(UIRAM) + LENGTH(UIRAM), len = 48K
|
||||
|
||||
/* Flash mapped instruction data. */
|
||||
|
||||
|
||||
@ -199,6 +199,7 @@ SECTIONS
|
||||
*libarch.a:*log_noos.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*cpu_region_protect.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*mspi_timing_tuning.*(.text .text.* .literal .literal.*)
|
||||
*libarch.a:*esp_rom_cache_esp32s2_esp32s3.*(.literal .text .literal.* .text.*)
|
||||
|
||||
*libc.a:*lib_instrument.*(.text .text.* .literal .literal.*)
|
||||
|
||||
@ -485,6 +486,13 @@ SECTIONS
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifi0iram.*)
|
||||
*(.wifiextrairam .wifiextrairam.*)
|
||||
*(EXCLUDE_FILE(*libpp.a) .wifiorslpiram EXCLUDE_FILE(*libpp.a) .wifiorslpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifirxiram.*)
|
||||
*(.wifislpiram .wifislpiram.*)
|
||||
*(EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram EXCLUDE_FILE(*libnet80211.a *libpp.a) .wifislprxiram.*)
|
||||
|
||||
/* CPU will try to prefetch up to 16 bytes of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
|
||||
@ -24,8 +24,6 @@ include $(TOPDIR)/tools/esp32s3/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
@ -26,12 +26,14 @@ CONFIG_BUILTIN=y
|
||||
CONFIG_DEFAULT_TASK_STACKSIZE=4096
|
||||
CONFIG_DRIVERS_IEEE80211=y
|
||||
CONFIG_DRIVERS_WIRELESS=y
|
||||
CONFIG_ESP32S3_MERGE_BINS=y
|
||||
CONFIG_ESP32S3_RT_TIMER_TASK_STACK_SIZE=4096
|
||||
CONFIG_ESP32S3_SPIFLASH=y
|
||||
CONFIG_ESP32S3_SPIFLASH_SPIFFS=y
|
||||
CONFIG_ESP32S3_UART0=y
|
||||
CONFIG_ESP32S3_WIFI=y
|
||||
CONFIG_ESP32S3_WIFI_STATION_SOFTAP=y
|
||||
CONFIG_ESP_WPA_DEBUG_PRINT=y
|
||||
CONFIG_EXAMPLES_DHCPD=y
|
||||
CONFIG_EXAMPLES_RANDOM=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
|
||||
@ -24,8 +24,6 @@ include $(TOPDIR)/tools/esp32s3/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
@ -24,8 +24,6 @@ include $(TOPDIR)/tools/esp32s3/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
@ -24,8 +24,6 @@ include $(TOPDIR)/tools/esp32s3/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
@ -24,8 +24,6 @@ include $(TOPDIR)/tools/esp32s3/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
@ -24,8 +24,6 @@ include $(TOPDIR)/tools/esp32s3/Config.mk
|
||||
include $(TOPDIR)/arch/xtensa/src/lx7/Toolchain.defs
|
||||
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_peripherals.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_api.ld
|
||||
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32s3_rom_aliases.ld
|
||||
|
||||
# Pick the linker scripts from the board level if they exist, if not
|
||||
|
||||
Loading…
Reference in New Issue
Block a user