i.MX6: Add some basic, incomplete GPIO controls
This commit is contained in:
Gregory Nutt
parent
d938c1cd8c
commit
56eebbbfe1
@ -132,4 +132,5 @@ CHIP_ASRCS =
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# i.MX6-specific C source files
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CHIP_CSRCS = imx_boot.c imx_memorymap.c imx_irq.c # imx_serial.c
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CHIP_CSRCS = imx_boot.c imx_memorymap.c imx_irq.c
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CHIP_CSRCS = imx_gpio.c # imx_serial.c
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@ -57,79 +57,88 @@
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/* GPIO Register Offsets ************************************************************/
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#define GPIO_DR_OFFSET 0x0000 /* Data Register */
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#define GPIO_GDIR_OFFSET 0x0004 /* Data Direction Register */
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#define GPIO_PSR_OFFSET 0x0008 /* Pad Status Register */
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#define GPIO_ICR1_OFFSET 0x000c /* Interrupt Configuration Register 1 */
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#define GPIO_ICR2_OFFSET 0x0010 /* Interrupt Configuration Register 2 */
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#define GPIO_IMR_OFFSET 0x0014 /* Interrupt Mask Register */
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#define GPIO_ISR_OFFSET 0x0018 /* Interrupt Status Register */
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#define GPIO_EDGE_OFFSET 0x001c /* Interrupt Status Register */
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#define IMX_GPIO_DR_OFFSET 0x0000 /* Data Register */
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#define IMX_GPIO_GDIR_OFFSET 0x0004 /* Data Direction Register */
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#define IMX_GPIO_PSR_OFFSET 0x0008 /* Pad Status Register */
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#define IMX_GPIO_ICR1_OFFSET 0x000c /* Interrupt Configuration Register 1 */
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#define IMX_GPIO_ICR2_OFFSET 0x0010 /* Interrupt Configuration Register 2 */
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#define IMX_GPIO_IMR_OFFSET 0x0014 /* Interrupt Mask Register */
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#define IMX_GPIO_ISR_OFFSET 0x0018 /* Interrupt Status Register */
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#define IMX_GPIO_EDGE_OFFSET 0x001c /* Interrupt Status Register */
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/* GPIO Register Addresses **********************************************************/
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#define GPIO1_DR (IMX_GPIO1_VBASE+GPIO_DR_OFFSET)
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#define GPIO1_GDIR (IMX_GPIO1_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO1_PSR (IMX_GPIO1_VBASE+GPIO_PSR_OFFSET)
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#define GPIO1_ICR1 (IMX_GPIO1_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO1_ICR2 (IMX_GPIO1_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO1_IMR (IMX_GPIO1_VBASE+GPIO_IMR_OFFSET)
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#define GPIO1_ISR (IMX_GPIO1_VBASE+GPIO_ISR_OFFSET)
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#define GPIO1_EDGE (IMX_GPIO1_VBASE+GPIO_EDGE_OFFSET)
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#define IMX_GPIO_DR(n) (IMX_GPIO_VBASE(n)+IMX_GPIO_DR_OFFSET)
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#define IMX_GPIO_GDIR(n) (IMX_GPIO_VBASE(n)+IMX_GPIO_GDIR_OFFSET)
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#define IMX_GPIO_PSR(n) (IMX_GPIO_VBASE(n)+IMX_GPIO_PSR_OFFSET)
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#define IMX_GPIO_ICR1(n) (IMX_GPIO_VBASE(n)+IMX_GPIO_ICR1_OFFSET)
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#define IMX_GPIO_ICR2(n) (IMX_GPIO_VBASE(n)+IMX_GPIO_ICR2_OFFSET)
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#define IMX_GPIO_IMR(n) (IMX_GPIO_VBASE(n)+IMX_GPIO_IMR_OFFSET)
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#define IMX_GPIO_ISR(n) (IMX_GPIO_VBASE(n)+IMX_GPIO_ISR_OFFSET)
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#define IMX_GPIO_EDGE(n) (IMX_GPIO_VBASE(n)+IMX_GPIO_EDGE_OFFSET)
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#define GPIO2_DR (IMX_GPIO2_VBASE+GPIO_DR_OFFSET)
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#define GPIO2_GDIR (IMX_GPIO2_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO2_PSR (IMX_GPIO2_VBASE+GPIO_PSR_OFFSET)
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#define GPIO2_ICR1 (IMX_GPIO2_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO2_ICR2 (IMX_GPIO2_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO2_IMR (IMX_GPIO2_VBASE+GPIO_IMR_OFFSET)
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#define GPIO2_ISR (IMX_GPIO2_VBASE+GPIO_ISR_OFFSET)
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#define GPIO2_EDGE (IMX_GPIO2_VBASE+GPIO_EDGE_OFFSET)
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#define IMX_GPIO1_DR (IMX_GPIO1_VBASE+IMX_GPIO_DR_OFFSET)
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#define IMX_GPIO1_GDIR (IMX_GPIO1_VBASE+IMX_GPIO_GDIR_OFFSET)
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#define IMX_GPIO1_PSR (IMX_GPIO1_VBASE+IMX_GPIO_PSR_OFFSET)
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#define IMX_GPIO1_ICR1 (IMX_GPIO1_VBASE+IMX_GPIO_ICR1_OFFSET)
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#define IMX_GPIO1_ICR2 (IMX_GPIO1_VBASE+IMX_GPIO_ICR2_OFFSET)
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#define IMX_GPIO1_IMR (IMX_GPIO1_VBASE+IMX_GPIO_IMR_OFFSET)
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#define IMX_GPIO1_ISR (IMX_GPIO1_VBASE+IMX_GPIO_ISR_OFFSET)
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#define IMX_GPIO1_EDGE (IMX_GPIO1_VBASE+IMX_GPIO_EDGE_OFFSET)
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#define GPIO3_DR (IMX_GPIO3_VBASE+GPIO_DR_OFFSET)
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#define GPIO3_GDIR (IMX_GPIO3_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO3_PSR (IMX_GPIO3_VBASE+GPIO_PSR_OFFSET)
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#define GPIO3_ICR1 (IMX_GPIO3_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO3_ICR2 (IMX_GPIO3_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO3_IMR (IMX_GPIO3_VBASE+GPIO_IMR_OFFSET)
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#define GPIO3_ISR (IMX_GPIO3_VBASE+GPIO_ISR_OFFSET)
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#define GPIO3_EDGE (IMX_GPIO3_VBASE+GPIO_EDGE_OFFSET)
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#define IMX_GPIO2_DR (IMX_GPIO2_VBASE+IMX_GPIO_DR_OFFSET)
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#define IMX_GPIO2_GDIR (IMX_GPIO2_VBASE+IMX_GPIO_GDIR_OFFSET)
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#define IMX_GPIO2_PSR (IMX_GPIO2_VBASE+IMX_GPIO_PSR_OFFSET)
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#define IMX_GPIO2_ICR1 (IMX_GPIO2_VBASE+IMX_GPIO_ICR1_OFFSET)
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#define IMX_GPIO2_ICR2 (IMX_GPIO2_VBASE+IMX_GPIO_ICR2_OFFSET)
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#define IMX_GPIO2_IMR (IMX_GPIO2_VBASE+IMX_GPIO_IMR_OFFSET)
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#define IMX_GPIO2_ISR (IMX_GPIO2_VBASE+IMX_GPIO_ISR_OFFSET)
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#define IMX_GPIO2_EDGE (IMX_GPIO2_VBASE+IMX_GPIO_EDGE_OFFSET)
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#define GPIO4_DR (IMX_GPIO4_VBASE+GPIO_DR_OFFSET)
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#define GPIO4_GDIR (IMX_GPIO4_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO4_PSR (IMX_GPIO4_VBASE+GPIO_PSR_OFFSET)
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#define GPIO4_ICR1 (IMX_GPIO4_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO4_ICR2 (IMX_GPIO4_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO4_IMR (IMX_GPIO4_VBASE+GPIO_IMR_OFFSET)
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#define GPIO4_ISR (IMX_GPIO4_VBASE+GPIO_ISR_OFFSET)
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#define GPIO4_EDGE (IMX_GPIO4_VBASE+GPIO_EDGE_OFFSET)
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#define IMX_GPIO3_DR (IMX_GPIO3_VBASE+IMX_GPIO_DR_OFFSET)
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#define IMX_GPIO3_GDIR (IMX_GPIO3_VBASE+IMX_GPIO_GDIR_OFFSET)
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#define IMX_GPIO3_PSR (IMX_GPIO3_VBASE+IMX_GPIO_PSR_OFFSET)
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#define IMX_GPIO3_ICR1 (IMX_GPIO3_VBASE+IMX_GPIO_ICR1_OFFSET)
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#define IMX_GPIO3_ICR2 (IMX_GPIO3_VBASE+IMX_GPIO_ICR2_OFFSET)
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#define IMX_GPIO3_IMR (IMX_GPIO3_VBASE+IMX_GPIO_IMR_OFFSET)
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#define IMX_GPIO3_ISR (IMX_GPIO3_VBASE+IMX_GPIO_ISR_OFFSET)
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#define IMX_GPIO3_EDGE (IMX_GPIO3_VBASE+IMX_GPIO_EDGE_OFFSET)
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#define GPIO5_DR (IMX_GPIO5_VBASE+GPIO_DR_OFFSET)
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#define GPIO5_GDIR (IMX_GPIO5_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO5_PSR (IMX_GPIO5_VBASE+GPIO_PSR_OFFSET)
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#define GPIO5_ICR1 (IMX_GPIO5_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO5_ICR2 (IMX_GPIO5_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO5_IMR (IMX_GPIO5_VBASE+GPIO_IMR_OFFSET)
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#define GPIO5_ISR (IMX_GPIO5_VBASE+GPIO_ISR_OFFSET)
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#define GPIO5_EDGE (IMX_GPIO5_VBASE+GPIO_EDGE_OFFSET)
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#define IMX_GPIO4_DR (IMX_GPIO4_VBASE+IMX_GPIO_DR_OFFSET)
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#define IMX_GPIO4_GDIR (IMX_GPIO4_VBASE+IMX_GPIO_GDIR_OFFSET)
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#define IMX_GPIO4_PSR (IMX_GPIO4_VBASE+IMX_GPIO_PSR_OFFSET)
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#define IMX_GPIO4_ICR1 (IMX_GPIO4_VBASE+IMX_GPIO_ICR1_OFFSET)
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#define IMX_GPIO4_ICR2 (IMX_GPIO4_VBASE+IMX_GPIO_ICR2_OFFSET)
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#define IMX_GPIO4_IMR (IMX_GPIO4_VBASE+IMX_GPIO_IMR_OFFSET)
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#define IMX_GPIO4_ISR (IMX_GPIO4_VBASE+IMX_GPIO_ISR_OFFSET)
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#define IMX_GPIO4_EDGE (IMX_GPIO4_VBASE+IMX_GPIO_EDGE_OFFSET)
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#define GPIO6_DR (IMX_GPIO6_VBASE+GPIO_DR_OFFSET)
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#define GPIO6_GDIR (IMX_GPIO6_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO6_PSR (IMX_GPIO6_VBASE+GPIO_PSR_OFFSET)
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#define GPIO6_ICR1 (IMX_GPIO6_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO6_ICR2 (IMX_GPIO6_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO6_IMR (IMX_GPIO6_VBASE+GPIO_IMR_OFFSET)
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#define GPIO6_ISR (IMX_GPIO6_VBASE+GPIO_ISR_OFFSET)
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#define GPIO6_EDGE (IMX_GPIO6_VBASE+GPIO_EDGE_OFFSET)
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#define IMX_GPIO5_DR (IMX_GPIO5_VBASE+IMX_GPIO_DR_OFFSET)
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#define IMX_GPIO5_GDIR (IMX_GPIO5_VBASE+IMX_GPIO_GDIR_OFFSET)
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#define IMX_GPIO5_PSR (IMX_GPIO5_VBASE+IMX_GPIO_PSR_OFFSET)
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#define IMX_GPIO5_ICR1 (IMX_GPIO5_VBASE+IMX_GPIO_ICR1_OFFSET)
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#define IMX_GPIO5_ICR2 (IMX_GPIO5_VBASE+IMX_GPIO_ICR2_OFFSET)
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#define IMX_GPIO5_IMR (IMX_GPIO5_VBASE+IMX_GPIO_IMR_OFFSET)
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#define IMX_GPIO5_ISR (IMX_GPIO5_VBASE+IMX_GPIO_ISR_OFFSET)
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#define IMX_GPIO5_EDGE (IMX_GPIO5_VBASE+IMX_GPIO_EDGE_OFFSET)
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#define GPIO7_DR (IMX_GPIO7_VBASE+GPIO_DR_OFFSET)
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#define GPIO7_GDIR (IMX_GPIO7_VBASE+GPIO_GDIR_OFFSET)
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#define GPIO7_PSR (IMX_GPIO7_VBASE+GPIO_PSR_OFFSET)
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#define GPIO7_ICR1 (IMX_GPIO7_VBASE+GPIO_ICR1_OFFSET)
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#define GPIO7_ICR2 (IMX_GPIO7_VBASE+GPIO_ICR2_OFFSET)
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#define GPIO7_IMR (IMX_GPIO7_VBASE+GPIO_IMR_OFFSET)
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#define GPIO7_ISR (IMX_GPIO7_VBASE+GPIO_ISR_OFFSET)
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#define GPIO7_EDGE (IMX_GPIO7_VBASE+GPIO_EDGE_OFFSET)
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#define IMX_GPIO6_DR (IMX_GPIO6_VBASE+IMX_GPIO_DR_OFFSET)
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#define IMX_GPIO6_GDIR (IMX_GPIO6_VBASE+IMX_GPIO_GDIR_OFFSET)
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#define IMX_GPIO6_PSR (IMX_GPIO6_VBASE+IMX_GPIO_PSR_OFFSET)
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#define IMX_GPIO6_ICR1 (IMX_GPIO6_VBASE+IMX_GPIO_ICR1_OFFSET)
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#define IMX_GPIO6_ICR2 (IMX_GPIO6_VBASE+IMX_GPIO_ICR2_OFFSET)
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#define IMX_GPIO6_IMR (IMX_GPIO6_VBASE+IMX_GPIO_IMR_OFFSET)
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#define IMX_GPIO6_ISR (IMX_GPIO6_VBASE+IMX_GPIO_ISR_OFFSET)
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#define IMX_GPIO6_EDGE (IMX_GPIO6_VBASE+IMX_GPIO_EDGE_OFFSET)
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#define IMX_GPIO7_DR (IMX_GPIO7_VBASE+IMX_GPIO_DR_OFFSET)
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#define IMX_GPIO7_GDIR (IMX_GPIO7_VBASE+IMX_GPIO_GDIR_OFFSET)
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#define IMX_GPIO7_PSR (IMX_GPIO7_VBASE+IMX_GPIO_PSR_OFFSET)
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#define IMX_GPIO7_ICR1 (IMX_GPIO7_VBASE+IMX_GPIO_ICR1_OFFSET)
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#define IMX_GPIO7_ICR2 (IMX_GPIO7_VBASE+IMX_GPIO_ICR2_OFFSET)
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#define IMX_GPIO7_IMR (IMX_GPIO7_VBASE+IMX_GPIO_IMR_OFFSET)
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#define IMX_GPIO7_ISR (IMX_GPIO7_VBASE+IMX_GPIO_ISR_OFFSET)
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#define IMX_GPIO7_EDGE (IMX_GPIO7_VBASE+IMX_GPIO_EDGE_OFFSET)
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/* GPIO Register Bit Definitions ****************************************************/
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@ -344,6 +344,7 @@
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#define IMX_CAN1_PBASE (IMX_AIPS1_PSECTION+IMX_CAN1_OFFSET)
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#define IMX_CAN2_PBASE (IMX_AIPS1_PSECTION+IMX_CAN2_OFFSET)
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#define IMX_GPT_PBASE (IMX_AIPS1_PSECTION+IMX_GPT_OFFSET)
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#define IMX_GPIO_PBASE(n) (IMX_AIPS1_PSECTION+IMX_GPIO_OFFSET(n))
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#define IMX_GPIO1_PBASE (IMX_AIPS1_PSECTION+IMX_GPIO1_OFFSET)
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#define IMX_GPIO2_PBASE (IMX_AIPS1_PSECTION+IMX_GPIO2_OFFSET)
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#define IMX_GPIO3_PBASE (IMX_AIPS1_PSECTION+IMX_GPIO3_OFFSET)
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@ -613,6 +614,7 @@
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#define IMX_CAN1_VBASE (IMX_AIPS1_VSECTION+IMX_CAN1_OFFSET)
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#define IMX_CAN2_VBASE (IMX_AIPS1_VSECTION+IMX_CAN2_OFFSET)
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#define IMX_GPT_VBASE (IMX_AIPS1_VSECTION+IMX_GPT_OFFSET)
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#define IMX_GPIO_VBASE(n) (IMX_AIPS1_VSECTION+IMX_GPIO_OFFSET(n))
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#define IMX_GPIO1_VBASE (IMX_AIPS1_VSECTION+IMX_GPIO1_OFFSET)
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#define IMX_GPIO2_VBASE (IMX_AIPS1_VSECTION+IMX_GPIO2_OFFSET)
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#define IMX_GPIO3_VBASE (IMX_AIPS1_VSECTION+IMX_GPIO3_OFFSET)
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226
arch/arm/src/imx6/imx_gpio.c
Normal file
226
arch/arm/src/imx6/imx_gpio.c
Normal file
@ -0,0 +1,226 @@
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/****************************************************************************
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* arch/arm/src/imx6/imx_gpio.c
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <nuttx/irq.h>
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#include "chip.h"
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#include "up_arch.h"
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#include "imx_gpio.h"
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: imx_gpio_dirout
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****************************************************************************/
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static inline void imx_gpio_dirout(int port, int pin)
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{
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uint32_t regval = getreg32(IMX_GPIO_GDIR(port));
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regval |= GPIO_PIN(pin);
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putreg32(regval, IMX_GPIO_GDIR(port));
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}
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/****************************************************************************
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* Name: imx_gpio_dirin
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****************************************************************************/
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static inline void imx_gpio_dirin(int port, int pin)
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{
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uint32_t regval = getreg32(IMX_GPIO_GDIR(port));
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regval &= ~GPIO_PIN(pin);
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putreg32(regval, IMX_GPIO_GDIR(port));
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}
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/****************************************************************************
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* Name: imx_gpio_setoutput
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****************************************************************************/
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static inline void imx_gpio_setoutput(int port, int pin, bool value)
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{
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uintptr_t regaddr = IMX_GPIO_DR(port);
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uint32_t regval;
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regval = getreg32(regaddr);
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if (value)
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{
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regval |= GPIO_PIN(pin);
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}
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else
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{
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regval &= ~GPIO_PIN(pin);
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}
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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* Name: imx_gpio_getinput
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****************************************************************************/
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static inline bool imx_gpio_getinput(int port, int pin)
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{
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uintptr_t regaddr = IMX_GPIO_DR(port);
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uint32_t regval;
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regval = getreg32(regaddr);
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return ((regval & GPIO_PIN(pin)) != 0);
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}
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/****************************************************************************
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* Name: imx_gpio_configinput
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****************************************************************************/
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static inline int imx_gpio_configinput(gpio_pinset_t pinset, int port, int pin)
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{
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/* Configure pin as in input */
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imx_gpio_dirin(port, pin);
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/* Configure pin as a GPIO */
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#warning Missing logic
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/* Configure pin pad settings */
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#warning Missing logic
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return OK;
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}
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/****************************************************************************
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* Name: imx_gpio_configoutput
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****************************************************************************/
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static inline int imx_gpio_configoutput(gpio_pinset_t pinset, int port, int pin)
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{
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bool value = ((pinset & GPIO_OUTPUT_ONE) != 0);
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/* Set the output value */
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imx_gpio_setoutput(port, pin, value);
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/* Convert the configured input GPIO to an output */
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imx_gpio_dirout(port, pin);
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return OK;
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}
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/****************************************************************************
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* Public Funtions
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****************************************************************************/
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/****************************************************************************
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* Name: imx_config_gpio
|
||||
*
|
||||
* Description:
|
||||
* Configure a GPIO pin based on pin-encoded description of the pin.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int imx_config_gpio(gpio_pinset_t pinset)
|
||||
{
|
||||
irqstate_t flags;
|
||||
int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
|
||||
int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
|
||||
int ret;
|
||||
|
||||
/* Configure the pin as an input initially to avoid any spurios outputs */
|
||||
|
||||
flags = enter_critical_section();
|
||||
ret = imx_gpio_configinput(pinset, port, pin);
|
||||
if (ret >= 0)
|
||||
{
|
||||
/* Was it really an output pin? */
|
||||
|
||||
if ((pinset & GPIO_OUTPUT) != 0)
|
||||
{
|
||||
/* YES.. convert the input to an output */
|
||||
|
||||
ret = imx_gpio_configoutput(pinset, port, pin);
|
||||
}
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: imx_gpio_write
|
||||
*
|
||||
* Description:
|
||||
* Write one or zero to the selected GPIO pin
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void imx_gpio_write(gpio_pinset_t pinset, bool value)
|
||||
{
|
||||
irqstate_t flags;
|
||||
int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
|
||||
int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
|
||||
|
||||
flags = enter_critical_section();
|
||||
imx_gpio_setoutput(port, pin, value);
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: imx_gpio_read
|
||||
*
|
||||
* Description:
|
||||
* Read one or zero from the selected GPIO pin
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
bool imx_gpio_read(gpio_pinset_t pinset)
|
||||
{
|
||||
irqstate_t flags;
|
||||
int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
|
||||
int pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
|
||||
bool value;
|
||||
|
||||
flags = enter_critical_section();
|
||||
value = imx_gpio_getinput(port, pin);
|
||||
leave_critical_section(flags);
|
||||
return value;
|
||||
}
|
||||
@ -42,32 +42,35 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <chip/imx_gpio.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "chip/imx_gpio.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
/* Encoding:
|
||||
*
|
||||
* ENCODING IRRR ODDD SSLT GGGP PPPP
|
||||
* GPIO INPUT 0... .... ...T GGGP PPPP
|
||||
* GPIO OUTPUT 1RRR ODDD SSL. GGGP PPPP
|
||||
* ENCODING ...I RRRO DDDL SSVT GGGP PPPP
|
||||
* GPIO INPUT ...0 .... .... ...T GGGP PPPP
|
||||
* GPIO OUTPUT ...1 RRRO DDDL SSV. GGGP PPPP
|
||||
*/
|
||||
|
||||
/* Input/Output Selection:
|
||||
*
|
||||
* ENCODING I... .... .... .... ....
|
||||
* ENCODING ...I .... .... .... .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_INPUT (0) /* Bit 19: 0=input */
|
||||
#define GPIO_INPUT (1 << 19) /* Bit 19: 1=input */
|
||||
#define GPIO_INPUT (0) /* Bit 20: 0=input */
|
||||
#define GPIO_OUTPUT (1 << 19) /* Bit 20: 1=output */
|
||||
|
||||
/* Output Pull Up/Down:
|
||||
*
|
||||
* GPIO OUTPUT .RRR .... .... .... ....
|
||||
* GPIO OUTPUT ...1 RRR. .... .... .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_PULL_SHIFT (16) /* Bits 16-18: Pull up/down selection */
|
||||
#define GPIO_PULL_SHIFT (17) /* Bits 17-19: Pull up/down selection */
|
||||
#define GPIO_PULL_MASK (7 << GPIO_PULL_SHIFT)
|
||||
# define GPIO_PULL_NONE (0 << GPIO_PULL_SHIFT) /* Pull/keeper disabled */
|
||||
# define GPIO_PULL_KEEP (1 << GPIO_PULL_SHIFT) /* Output determined by keeper */
|
||||
@ -78,31 +81,39 @@
|
||||
|
||||
/* Open Drain Output:
|
||||
*
|
||||
* GPIO OUTPUT .... O... .... .... ....
|
||||
* GPIO OUTPUT ...1 ...O .... .... .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_CMOS_OUTPUT (1 << 15) /* Bit 15: 0=CMOS output */
|
||||
#define GPIO_OPENDRAIN (1 << 15) /* Bit 15: 1=Enable open-drain output */
|
||||
#define GPIO_CMOS_OUTPUT (1 << 16) /* Bit 16: 0=CMOS output */
|
||||
#define GPIO_OPENDRAIN (1 << 16) /* Bit 16: 1=Enable open-drain output */
|
||||
|
||||
/* Output Drive Strength:
|
||||
*
|
||||
* GPIO OUTPUT .... .DDD .... .... ....
|
||||
* GPIO OUTPUT ...1 .... DDD. .... .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_DRIVE_SHIFT (12) /* Bits 12-14: Output Drive Strength */
|
||||
#define GPIO_DRIVE_SHIFT (13) /* Bits 13-15: Output Drive Strength */
|
||||
#define GPIO_DRIVE_MASK (7 << GPIO_DRIVE_SHIFT)
|
||||
# define GPIO_DRIVE_HIZ (0 << GPIO_DRIVE_SHIFT) /* HI-Z */
|
||||
# define GPIO_DRIVE_260OHM (1 << GPIO_DRIVE_SHIFT) /* 150 Ohm @3.3V, 260 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_130OHM (2 << GPIO_DRIVE_SHIFT) /* 75 Ohm @3.3V, 130 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_90OHM (3 << GPIO_DRIVE_SHIFT) /* 50 Ohm @3.3V, 90 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_60OHM (4 << GPIO_DRIVE_SHIFT) /* 37 Ohm @3.3V, 60 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_50OHM (5 << GPIO_DRIVE_SHIFT) /* 30 Ohm @3.3V, 50 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_40OHM (6 << GPIO_DRIVE_SHIFT) /* 25 Ohm @3.3V, 40 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_33OHM (7 << GPIO_DRIVE_SHIFT) /* 20 Ohm @3.3V, 33 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_HIZ (0 << GPIO_DRIVE_SHIFT) /* HI-Z */
|
||||
# define GPIO_DRIVE_260OHM (1 << GPIO_DRIVE_SHIFT) /* 150 Ohm @3.3V, 260 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_130OHM (2 << GPIO_DRIVE_SHIFT) /* 75 Ohm @3.3V, 130 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_90OHM (3 << GPIO_DRIVE_SHIFT) /* 50 Ohm @3.3V, 90 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_60OHM (4 << GPIO_DRIVE_SHIFT) /* 37 Ohm @3.3V, 60 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_50OHM (5 << GPIO_DRIVE_SHIFT) /* 30 Ohm @3.3V, 50 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_40OHM (6 << GPIO_DRIVE_SHIFT) /* 25 Ohm @3.3V, 40 Ohm @1.8V */
|
||||
# define GPIO_DRIVE_33OHM (7 << GPIO_DRIVE_SHIFT) /* 20 Ohm @3.3V, 33 Ohm @1.8V */
|
||||
|
||||
/* Output Slew Rate:
|
||||
*
|
||||
* GPIO OUTPUT ...1 .... ...L .... .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_SLEW_SLOW (0) /* Bit 12: 0=Slow Slew Rate */
|
||||
#define GPIO_SLEW_FAST (1 << 12) /* Bit 12: 1=Fast Slew Rate */
|
||||
|
||||
/* Output Speed:
|
||||
*
|
||||
* GPIO OUTPUT .... .... SS.. .... ....
|
||||
* GPIO OUTPUT ...1 .... .... SS.. .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_SPEED_SHIFT (10) /* Bits 10-11: Speed */
|
||||
@ -111,17 +122,17 @@
|
||||
# define GPIO_SPEED_MEDIUM (1 << GPIO_SPEED_SHIFT) /* Medium frequency (100, 150 MHz) */
|
||||
# define GPIO_SPEED_MAX (3 << GPIO_SPEED_SHIFT) /* Maximum frequency (100, 150, 200 MHz) */
|
||||
|
||||
/* Output Slew Rate:
|
||||
/* Initial Ouptut Value:
|
||||
*
|
||||
* GPIO OUTPUT .... .... ..L. .... ....
|
||||
* GPIO OUTPUT ...1 .... .... ..V. .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_SLEW_SLOW (0) /* Bit 9: 0=Slow Slew Rate */
|
||||
#define GPIO_SLEW_FAST (1 << 9) /* Bit 9: 1=Fast Slew Rate */
|
||||
#define GPIO_OUTPUT_ZERO (0) /* Bit 9: 0=Initial output is low */
|
||||
#define GPIO_OUTPUT_ONE (1 << 9) /* Bit 9: 1=Initial output is high */
|
||||
|
||||
/* Input Schmitt Trigger:
|
||||
*
|
||||
* GPIO INPUT 0... .... ...T .... ....
|
||||
* GPIO INPUT ...0 .... .... ...T .... ....
|
||||
*/
|
||||
|
||||
#define GPIO_CMOS_INPUT (0) /* Bit 8: 0=CMOS input */
|
||||
@ -129,7 +140,7 @@
|
||||
|
||||
/* GPIO Port Number
|
||||
*
|
||||
* ENCODING .... .... .... GGG. ....
|
||||
* ENCODING .... .... .... .... GGG. ....
|
||||
*/
|
||||
|
||||
#define GPIO_PORT_SHIFT (5) /* Bits 5-7: Speed */
|
||||
@ -144,7 +155,7 @@
|
||||
|
||||
/* GPIO Pin Number:
|
||||
*
|
||||
* ENCODING .... .... .... ...P PPPP
|
||||
* ENCODING .... .... .... .... ...P PPPP
|
||||
*/
|
||||
|
||||
#define GPIO_PIN_SHIFT (5) /* Bits 0-4: Speed */
|
||||
@ -190,12 +201,6 @@
|
||||
|
||||
typedef uint32_t gpio_pinset_t;
|
||||
|
||||
/************************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
@ -214,15 +219,15 @@ extern "C"
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: imx_gpioirqinitialize
|
||||
* Name: imx_gpioirq_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize logic to support a second level of interrupt decoding for PIO pins.
|
||||
* Initialize logic to support a second level of interrupt decoding for GPIO pins.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_IMX6_GPIO_IRQ
|
||||
void imx_gpioirqinitialize(void);
|
||||
void imx_gpioirq_initialize(void);
|
||||
#else
|
||||
# define imx_gpioirqinitialize()
|
||||
#endif
|
||||
@ -231,17 +236,17 @@ void imx_gpioirqinitialize(void);
|
||||
* Name: imx_config_gpio
|
||||
*
|
||||
* Description:
|
||||
* Configure a PIO pin based on bit-encoded description of the pin.
|
||||
* Configure a GPIO pin based on bit-encoded description of the pin.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int imx_config_gpio(gpio_pinset_t cfgset);
|
||||
int imx_config_gpio(gpio_pinset_t pinset);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: imx_gpio_write
|
||||
*
|
||||
* Description:
|
||||
* Write one or zero to the selected PIO pin
|
||||
* Write one or zero to the selected GPIO pin
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
@ -251,7 +256,7 @@ void imx_gpio_write(gpio_pinset_t pinset, bool value);
|
||||
* Name: imx_gpio_read
|
||||
*
|
||||
* Description:
|
||||
* Read one or zero from the selected PIO pin
|
||||
* Read one or zero from the selected GPIO pin
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
@ -261,7 +266,7 @@ bool imx_gpio_read(gpio_pinset_t pinset);
|
||||
* Name: imx_gpioirq
|
||||
*
|
||||
* Description:
|
||||
* Configure an interrupt for the specified PIO pin.
|
||||
* Configure an interrupt for the specified GPIO pin.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
@ -275,7 +280,7 @@ void imx_gpioirq(gpio_pinset_t pinset);
|
||||
* Name: imx_gpioirq_enable
|
||||
*
|
||||
* Description:
|
||||
* Enable the interrupt for specified PIO IRQ
|
||||
* Enable the interrupt for specified GPIO IRQ
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
@ -289,7 +294,7 @@ void imx_gpioirq_enable(int irq);
|
||||
* Name: imx_gpioirq_disable
|
||||
*
|
||||
* Description:
|
||||
* Disable the interrupt for specified PIO IRQ
|
||||
* Disable the interrupt for specified GPIO IRQ
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
@ -303,7 +308,7 @@ void imx_gpioirq_disable(int irq);
|
||||
* Function: imx_dump_gpio
|
||||
*
|
||||
* Description:
|
||||
* Dump all PIO registers associated with the base address of the provided pinset.
|
||||
* Dump all GPIO registers associated with the base address of the provided pinset.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user