More PIC32 debug updates
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4083 42af7a65-404d-4744-a932-0658087f49c3
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@ -871,7 +871,7 @@ CONFIG_BOOT_RUNFROMFLASH=n
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CONFIG_BOOT_COPYTORAM=n
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CONFIG_CUSTOM_STACK=n
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CONFIG_STACK_POINTER=
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CONFIG_IDLETHREAD_STACKSIZE=1024
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_USERMAIN_STACKSIZE=2048
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CONFIG_PTHREAD_STACK_MIN=256
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CONFIG_PTHREAD_STACK_DEFAULT=2048
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@ -60,7 +60,7 @@ MEMORY
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* Debug code 0x1fc02000 KSEG1 4096-16 12272
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* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
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*
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* Exceptions assme:
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* Exceptions assume:
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*
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* STATUS: BEV=1 and EXL=0
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* CAUSE: IV=1
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@ -79,9 +79,12 @@ MEMORY
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/* The PIC32MX460F512L has 32Kb of data memory at physical address
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* 0x00000000. Since the PIC32MX has no data cache, this memory is
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* always accessed through KSEG1.
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*
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* When used with MPLAB, we need to set aside 512 bytes of memory
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* for use by MPLAB.
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*/
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kseg1_datamem (w!x) : ORIGIN = 0xa0000000, LENGTH = 32K
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kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
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}
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OUTPUT_FORMAT("elf32-tradlittlemips")
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@ -902,7 +902,7 @@ CONFIG_BOOT_RUNFROMFLASH=n
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CONFIG_BOOT_COPYTORAM=n
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CONFIG_CUSTOM_STACK=n
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CONFIG_STACK_POINTER=
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CONFIG_IDLETHREAD_STACKSIZE=1024
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_USERMAIN_STACKSIZE=2048
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CONFIG_PTHREAD_STACK_MIN=256
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CONFIG_PTHREAD_STACK_DEFAULT=2048
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@ -60,7 +60,7 @@ MEMORY
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* Debug code 0x1fc02000 KSEG1 4096-16 12272
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* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
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*
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* Exceptions assme:
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* Exceptions assume:
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*
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* STATUS: BEV=1 and EXL=0
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* CAUSE: IV=1
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@ -79,9 +79,12 @@ MEMORY
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/* The PIC32MX795F512L has 128Kb of data memory at physical address
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* 0x00000000. Since the PIC32MX has no data cache, this memory is
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* always accessed through KSEG1.
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*
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* When used with MPLAB, we need to set aside 512 bytes of memory
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* for use by MPLAB.
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*/
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kseg1_datamem (w!x) : ORIGIN = 0xa0000000, LENGTH = 128K
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kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 128K - 512
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}
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OUTPUT_FORMAT("elf32-tradlittlemips")
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@ -12,6 +12,7 @@ Contents
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- IDEs
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- NuttX buildroot Toolchain
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- DFU and JTAG
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- OpenOCD
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- LEDs
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- Temperature Sensor
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- RTC
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@ -238,6 +239,32 @@ DFU and JTAG
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The default setting (none of the above defined) is SWJ_CFG[2:0] set to 100
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which disable JTAG-DP and SW-DP.
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OpenOCD
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=======
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I have also used OpenOCD with the STM3210E-EVAL. In this case, I used
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the Olimex USB ARM OCD. See the script in configs/stm3210e-eval/tools/oocd.sh
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for more information. Using the script:
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1) Start the OpenOCD GDB server
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cd <nuttx-build-directory>
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configs/stm3210e-eval/tools/oocd.sh $PWD
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2) Load Nuttx
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cd <nuttx-built-directory>
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arm-none-eabi-gdb nuttx
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gdb> target remote localhost:3333
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gdb> mon reset
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gdb> mon halt
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gdb> load nuttx
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3) Running NuttX
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gdb> mon reset
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gdb> c
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LEDs
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====
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11
configs/stm3210e-eval/tools/olimex-arm-usb-ocd.cfg
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11
configs/stm3210e-eval/tools/olimex-arm-usb-ocd.cfg
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@ -0,0 +1,11 @@
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#
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# Olimex ARM-USB-OCD
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#
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# http://www.olimex.com/dev/arm-usb-ocd.html
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#
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interface ft2232
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ft2232_device_desc "Olimex OpenOCD JTAG"
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ft2232_layout olimex-jtag
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ft2232_vid_pid 0x15ba 0x0003
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90
configs/stm3210e-eval/tools/oocd.sh
Executable file
90
configs/stm3210e-eval/tools/oocd.sh
Executable file
@ -0,0 +1,90 @@
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#!/bin/sh
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# Get command line parameters
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USAGE="USAGE: $0 [-dh] <TOPDIR>"
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ADVICE="Try '$0 -h' for more information"
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while [ ! -z "$1" ]; do
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case $1 in
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-d )
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set -x
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;;
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-h )
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echo "$0 is a tool for generation of proper version files for the NuttX build"
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echo ""
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echo $USAGE
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echo ""
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echo "Where:"
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echo " -d"
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echo " Enable script debug"
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echo " -h"
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echo " show this help message and exit"
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echo " Use the OpenOCD 0.4.0"
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echo " <TOPDIR>"
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echo " The full path to the top-level NuttX directory"
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exit 0
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;;
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* )
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break;
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;;
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esac
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shift
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done
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TOPDIR=$1
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if [ -z "${TOPDIR}" ]; then
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echo "Missing argument"
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echo $USAGE
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echo $ADVICE
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exit 1
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fi
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# This script *probably* only works with the following versions of OpenOCD:
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# Local search directory and configurations
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OPENOCD_SEARCHDIR="${TOPDIR}/configs/stm3210e-eval/tools"
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OPENOCD_WSEARCHDIR="`cygpath -w ${OPENOCD_SEARCHDIR}`"
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OPENOCD_PATH="/cygdrive/c/Program Files (x86)/OpenOCD/0.4.0/bin"
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OPENOCD_EXE=openocd.exe
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OPENOCD_INTERFACE="olimex-arm-usb-ocd.cfg"
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OPENOCD_TARGET="stm32.cfg"
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OPENOCD_ARGS="-s ${OPENOCD_WSEARCHDIR} -f ${OPENOCD_INTERFACE} -f ${OPENOCD_TARGET}"
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echo "Trying OpenOCD 0.4.0 path: ${OPENOCD_PATH}/${OPENOCD_EXE}"
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# Verify that everything is what it claims it is and is located where it claims it is.
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if [ ! -x "${OPENOCD_PATH}/${OPENOCD_EXE}" ]; then
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echo "OpenOCD executable does not exist: ${OPENOCD_PATH}/${OPENOCD_EXE}"
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exit 1
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fi
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if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}" ]; then
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echo "OpenOCD target config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_TARGET}"
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exit 1
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fi
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if [ ! -f "${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}" ]; then
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echo "OpenOCD interface config file does not exist: ${OPENOCD_SEARCHDIR}/${OPENOCD_INTERFACE}"
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exit 1
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fi
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# Enable debug if so requested
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if [ "X$2" = "X-d" ]; then
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OPENOCD_ARGS=$OPENOCD_ARGS" -d3"
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set -x
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fi
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# Okay... do it!
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echo "Starting OpenOCD"
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"${OPENOCD_PATH}/${OPENOCD_EXE}" ${OPENOCD_ARGS} &
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echo "OpenOCD daemon started"
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ps -ef | grep openocd
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echo "In GDB: target remote localhost:3333"
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69
configs/stm3210e-eval/tools/stm32.cfg
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69
configs/stm3210e-eval/tools/stm32.cfg
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@ -0,0 +1,69 @@
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# script for stm32
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 16kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x4000
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}
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
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jtag_khz 1000
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# See STM Document RM0008
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# Section 26.6.3
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set _CPUTAPID 0x3ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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if { [info exists BSTAPID ] } {
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# FIXME this never gets used to override defaults...
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set _BSTAPID $BSTAPID
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} else {
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# See STM Document RM0008
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# Section 29.6.2
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# Low density devices, Rev A
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set _BSTAPID1 0x06412041
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# Medium density devices, Rev A
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set _BSTAPID2 0x06410041
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# Medium density devices, Rev B and Rev Z
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set _BSTAPID3 0x16410041
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# High density devices, Rev A
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set _BSTAPID4 0x06414041
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# Connectivity line devices, Rev A and Rev Z
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set _BSTAPID5 0x06418041
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}
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jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
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-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
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-expected-id $_BSTAPID4 -expected-id $_BSTAPID5
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
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# For more information about the configuration files, take a look at:
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# openocd.texi
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@ -870,7 +870,7 @@ CONFIG_BOOT_RUNFROMFLASH=n
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CONFIG_BOOT_COPYTORAM=n
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CONFIG_CUSTOM_STACK=n
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CONFIG_STACK_POINTER=
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CONFIG_IDLETHREAD_STACKSIZE=1024
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_USERMAIN_STACKSIZE=2048
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CONFIG_PTHREAD_STACK_MIN=256
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CONFIG_PTHREAD_STACK_DEFAULT=2048
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@ -60,7 +60,7 @@ MEMORY
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* Debug code 0x1fc02000 KSEG1 4096-16 12272
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* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
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*
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* Exceptions assme:
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* Exceptions assume:
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*
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* STATUS: BEV=1 and EXL=0
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* CAUSE: IV=1
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@ -79,9 +79,12 @@ MEMORY
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/* The PIC32MX440F512H has 32Kb of data memory at physical address
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* 0x00000000. Since the PIC32MX has no data cache, this memory is
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* always accessed through KSEG1.
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*
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* When used with MPLAB, we need to set aside 512 bytes of memory
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* for use by MPLAB.
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*/
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kseg1_datamem (w!x) : ORIGIN = 0xa0000000, LENGTH = 32K
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kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
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}
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OUTPUT_FORMAT("elf32-tradlittlemips")
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