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Merge branch 'master' of https://bitbucket.org/mrechte/nuttx-twrk64

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This commit is contained in:
Marc Rechte 2017-02-24 08:02:08 +01:00
commit 579360e77d
96 changed files with 3761 additions and 839 deletions
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2
TODO
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@ -438,7 +438,7 @@ o pthreads (sched/pthreads)
serve as cancellation points. They are, however, simple wrappers around nanosleep
which is a true cancellation point.
NOTE 02: system() is actually implemented in apps/ as part of NSH. It cannot be
a cancellation point either.
a cancellation point.
NOTE 03: sigpause() is a user-space function in the C library and cannot serve as
cancellation points. It is, however, a simple wrapper around sigsuspend()
which is a true cancellation point.

2
arch/arm/include/kinetis/chip.h
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@ -43,6 +43,8 @@
#include <nuttx/config.h>
#include <arch/kinetis/kinetis_mcg.h>
#include <arch/kinetis/kinetis_sim.h>
#include <arch/kinetis/kinetis_pmc.h>
/************************************************************************************
* Pre-processor Definitions

12
arch/arm/include/kinetis/kinetis_mcg.h
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@ -76,7 +76,7 @@
* KINETIS_MCG_HAS_PLL_INTERNAL_MODE - Has PEI mode or PBI mode
* KINETIS_MCG_HAS_RESET_IS_BLPI - Has Reset clock mode is BLPI
*
* MCD Register Configuration
* MCG Register Configuration
*
* KINETIS_MCG_HAS_C1 - SoC has C1 Register
* KINETIS_MCG_HAS_C1_IREFS - SoC has C1[IREFS]
@ -289,7 +289,7 @@
# undef KINETIS_MCG_HAS_PLL_INTERNAL_MODE /* Has PEI mode or PBI mode */
# undef KINETIS_MCG_HAS_RESET_IS_BLPI /* Has Reset clock mode is BLPI */
/* MCD Register Configuration */
/* MCG Register Configuration */
# define KINETIS_MCG_HAS_C1 1 /* SoC has C1 Register */
# define KINETIS_MCG_HAS_C1_IREFS 1 /* SoC has C1[IREFS] */
@ -371,7 +371,7 @@
# undef KINETIS_MCG_HAS_PLL_INTERNAL_MODE /* Has PEI mode or PBI mode */
# undef KINETIS_MCG_HAS_RESET_IS_BLPI /* Has Reset clock mode is BLPI */
/* MCD Register Configuration */
/* MCG Register Configuration */
# define KINETIS_MCG_HAS_C1 1 /* SoC has C1 Register */
# define KINETIS_MCG_HAS_C1_IREFS 1 /* SoC has C1[IREFS] */
@ -448,7 +448,7 @@
/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
# define KINETIS_MCG_VERSION KINETIS_K_MCG_VERSION_06
# define KINETIS_MCG_VERSION KINETIS_MCG_VERSION_06
/* MCG Configuration Parameters */
@ -463,7 +463,7 @@
# undef KINETIS_MCG_HAS_PLL_INTERNAL_MODE /* Has PEI mode or PBI mode */
# undef KINETIS_MCG_HAS_RESET_IS_BLPI /* Has Reset clock mode is BLPI */
/* MCD Register Configuration */
/* MCG Register Configuration */
# define KINETIS_MCG_HAS_C1 1 /* SoC has C1 Register */
# define KINETIS_MCG_HAS_C1_IREFS 1 /* SoC has C1[IREFS] */
@ -544,7 +544,7 @@
# undef KINETIS_MCG_HAS_PLL_INTERNAL_MODE /* Has PEI mode or PBI mode */
# undef KINETIS_MCG_HAS_RESET_IS_BLPI /* Has Reset clock mode is BLPI */
/* MCD Register Configuration */
/* MCG Register Configuration */
# define KINETIS_MCG_HAS_C1 1 /* SoC has C1 Register */
# define KINETIS_MCG_HAS_C1_IREFS 1 /* SoC has C1[IREFS] */

324
arch/arm/include/kinetis/kinetis_pmc.h Normal file
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@ -0,0 +1,324 @@
/************************************************************************************
* arch/arm/include/kinetis/kinetis_pmc.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Note: It is envisioned that in the long term as a chip is added. The author of
* the new chip definitions will either find the exact configuration in an existing
* chip define and add the new chip to it Or add the PMC feature configuration
* #defines to the chip ifdef list below. In either case the author should mark
* it as "Verified to Document Number:" taken from the reference manual.
*
* To maintain backward compatibility to the version of NuttX prior to
* 2/22/2017, the catch all KINETIS_PMC_VERSION_UKN configuration is assigned
* to all the chips that did not have any conditional compilation based on
* KINETIS_K64 or KINETIS_K66. This is a "No worse" than the original code solution.
* N.B. Each original chip "if"definitions have been left intact so that the
* complete legacy definitions prior to 2/22/2017 may be filled in completely when
* vetted.
*/
/* PMC Register Configuration
*
* KINETIS_PMC_HAS_REGSC - SoC has REGSC Register
* KINETIS_PMC_HAS_REGSC_ACKISO - SoC has REGSC[ACKISO]
* KINETIS_PMC_HAS_REGSC_VLPRS - SoC has REGSC[VLPRS]
* KINETIS_PMC_HAS_REGSC_VLPO - SoC has REGSC[VLPO]
* KINETIS_PMC_HAS_REGSC_REGFPM - SoC has REGSC[REGFPM]
* KINETIS_PMC_HAS_REGSC_BGEN - SoC has REGSC[BGEN]
* KINETIS_PMC_HAS_REGSC_TRAMPO - SoC has REGSC[TRAMPO]
* KINETIS_PMC_HAS_REGSC_REGONS - SoC has REGSC[REGONS]
*/
/* Describe the version of the PMC
*
* These defines are not related to any NXP reference but are merely
* a way to label the versions we are using
*/
#define KINETIS_PMC_VERSION_UKN -1 /* What was in nuttx prior to 2/22/2017 */
#define KINETIS_PMC_VERSION_01 1 /* Verified Document Number: K60P144M150SF3RM Rev. 3, November 2014 */
#define KINETIS_PMC_VERSION_04 4 /* Verified to Document Numbers:
* K20P64M72SF1RM Rev. 1.1, Dec 2012
* K64P144M120SF5RM Rev. 2, January 2014
* K66P144M180SF5RMV2 Rev. 2, May 2015 */
/* MK20DX/DN---VLH5
*
* ------------- ------ --- ------- ------ ------- ------ ----- ----
* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
* FREQ CNT FLASH FLASH
* ------------- ------ --- ------- ------ ------- ------ ----- ----
* MK20DN32VLH5 50 MHz 64 LQFP 32 KB 32 KB — 8 KB 40
* MK20DX32VLH5 50 MHz 64 LQFP 64 KB 32 KB 2 KB 8 KB 40
* MK20DN64VLH5 50 MHz 64 LQFP 64 KB 64 KB — 16 KB 40
* MK20DX64VLH5 50 MHz 64 LQFP 96 KB 64 KB 2 KB 16 KB 40
* MK20DN128VLH5 50 MHz 64 LQFP 128 KB 128 KB — 16 KB 40
* MK20DX128VLH5 50 MHz 64 LQFP 160 KB 128 KB 2 KB 16 KB 40
*/
#if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5) || \
defined(CONFIG_ARCH_CHIP_MK20DX32VLH5) || \
defined(CONFIG_ARCH_CHIP_MK20DN64VLH5) || \
defined(CONFIG_ARCH_CHIP_MK20DX64VLH5) || \
defined(CONFIG_ARCH_CHIP_MK20DN128VLH5) || \
defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
/* MK20DX---VLH7
*
* ------------- ------ --- ------- ------ ------- ------ ----- ----
* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
* FREQ CNT FLASH FLASH
* ------------- ------ --- ------- ------ ------- ------ ----- ----
* MK20DX64VLH7 72 MHz 64 LQFP 96 KB 64 KB 2 KB 16 KB 40
* MK20DX128VLH7 72 MHz 64 LQFP 160 KB 128 KB 2 KB 32 KB 40
* MK20DX256VLH7 72 MHz 64 LQFP 288 KB 256 KB 2 KB 64 KB 40
* ------------- ------ --- ------- ------ ------- ------ ----- ----
*/
#elif defined(CONFIG_ARCH_CHIP_MK20DX64VLH7) || defined(CONFIG_ARCH_CHIP_MK20DX128VLH7) || \
defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
/* Verified to Document Number: K20P64M72SF1RM Rev. 1.1, Dec 2012 */
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
/* PMC Register Configuration */
# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
#elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
defined(CONFIG_ARCH_CHIP_MK40X128VLL50) || defined(CONFIG_ARCH_CHIP_MK40X128VML50) || \
defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
#elif defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_01
/* PMC Register Configuration */
# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
# undef KINETIS_PMC_HAS_REGSC_BGEN /* SoC has REGSC[BGEN] */
# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
/* PMC Register Configuration */
# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
/* MK66F N/X 1M0/2M0 V MD/LQ 18
*
* --------------- ------- --- ------- ------- ------ ------ ------ -----
* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
* FREQ CNT FLASH FLASH
* --------------- ------- --- ------- ------- ------ ------ ------ -----
* MK66FN2M0VMD18 180 MHz 144 MAPBGA 2 MB — — KB 260 KB 100
* MK66FX1M0VMD18 180 MHz 144 MAPBGA 1.25 MB 1 MB 4 KB 256 KB 100
* MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB — — KB 260 KB 100
* MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100
*/
#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
/* PMC Register Configuration */
# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
#else
# error "Unsupported Kinetis chip"
#endif
/* Use the catch all configuration for the PMC based on the implementations in nuttx prior 2/3/2017 */
#if KINETIS_PMC_VERSION == KINETIS_PMC_VERSION_UKN
/* PMC Register Configuration */
# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
# undef KINETIS_PMC_HAS_REGSC_ACKISO /* SoC has REGSC[ACKISO] */
# define KINETIS_PMC_HAS_REGSC_VLPRS 1 /* SoC has REGSC[VLPRS] */
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
# undef KINETIS_PMC_HAS_REGSC_BGEN /* SoC has REGSC[BGEN] */
# define KINETIS_PMC_HAS_REGSC_TRAMPO 1 /* SoC has REGSC[TRAMPO] */
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
#endif
#if !defined(KINETIS_PMC_VERSION)
# error "No KINETIS_PMC_VERSION defined!"
#endif
#if defined(KINETIS_PMC_HAS_C5_PRDIV)
# define KINETIS_PMC_C5_PRDIV_MASK ((1 << (KINETIS_PMC_C5_PRDIV_BITS))-1)
#endif
#if defined(KINETIS_PMC_HAS_C7_OSCSEL)
# define KINETIS_PMC_C7_OSCSEL_MASK ((1 << (KINETIS_PMC_C7_OSCSEL_BITS))-1)
#endif
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H */

1322
arch/arm/include/kinetis/kinetis_sim.h Normal file
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File diff suppressed because it is too large Load Diff

4
arch/arm/src/kinetis/chip/kinetis_llwu.h
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@ -232,7 +232,9 @@
/* LLWU Control and Status Register */
#define LLWU_CS_ACKISO (1 << 7) /* Bit 7: Acknowledge Isolation */
#if !defined(KINETIS_PMC_HAS_REGSC_ACKISO)
# define LLWU_CS_ACKISO (1 << 7) /* Bit 7: Acknowledge Isolation */
#endif
/* Bits 2-6: Reserved */
#define LLWU_CS_FLTEP (1 << 1) /* Bit 1: Digital Filter on External Pin */
#define LLWU_CS_FLTR (1 << 0) /* Bit 0: Digital Filter on RESET Pin */

27
arch/arm/src/kinetis/chip/kinetis_pmc.h
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@ -78,22 +78,33 @@
#define PMC_LVDSC2_LVWV_SHIFT (0) /* Bits 0-1: Low-Voltage Warning Voltage Select */
#define PMC_LVDSC2_LVWV_MASK (3 << PMC_LVDSC2_LVWV_SHIFT)
# define PMC_LVDSC2_LVWV_ LOW (0 << PMC_LVDSC2_LVWV_SHIFT) /* Low trip point selected (VLVW = VLVW1H/L) */
# define PMC_LVDSC2_LVWV_ MID1 (1 << PMC_LVDSC2_LVWV_SHIFT) /* Mid 1 trip point selected (VLVW = VLVW2H/L) */
# define PMC_LVDSC2_LVWV_ MID2 (2 << PMC_LVDSC2_LVWV_SHIFT) /* Mid 2 trip point selected (VLVW = VLVW3H/L) */
# define PMC_LVDSC2_LVWV_ HIGH (3 << PMC_LVDSC2_LVWV_SHIFT) /* High trip point selected (VLVW = VLVW4H/L) */
# define PMC_LVDSC2_LVWV_LOW (0 << PMC_LVDSC2_LVWV_SHIFT) /* Low trip point selected (VLVW = VLVW1H/L) */
# define PMC_LVDSC2_LVWV_MID1 (1 << PMC_LVDSC2_LVWV_SHIFT) /* Mid 1 trip point selected (VLVW = VLVW2H/L) */
# define PMC_LVDSC2_LVWV_MID2 (2 << PMC_LVDSC2_LVWV_SHIFT) /* Mid 2 trip point selected (VLVW = VLVW3H/L) */
# define PMC_LVDSC2_LVWV_HIGH (3 << PMC_LVDSC2_LVWV_SHIFT) /* High trip point selected (VLVW = VLVW4H/L) */
/* Bits 2-4: Reserved */
#define PMC_LVDSC2_LVWIE (1 << 5) /* Bit 5: Low-Voltage Warning Interrupt Enable */
#define PMC_LVDSC2_LVWACK (1 << 6) /* Bit 6: Low-Voltage Warning Acknowledge */
#define PMC_LVDSC2_LVWF (1 << 7) /* Bit 7: Low-Voltage Warning Flag */
/* Regulator Status and Control Register */
#define PMC_REGSC_BGBE (1 << 0) /* Bit 0: Bandgap Buffer Enable */
/* Bit 1: Reserved */
#define PMC_REGSC_REGONS (1 << 2) /* Bit 2: Regulator in Run Regulation Status */
#define PMC_REGSC_VLPRS (1 << 3) /* Bit 3: Very Low Power Run Status */
#define PMC_REGSC_TRAMPO (1 << 4) /* Bit 4: For devices with FlexNVM: Traditional RAM Power Option */
#if defined(KINETIS_PMC_HAS_REGSC_REGONS)
# define PMC_REGSC_REGONS (1 << 2) /* Bit 2: Regulator in Run Regulation Status */
#endif
#if defined(KINETIS_PMC_HAS_REGSC_ACKISO)
# define PMC_REGSC_ACKISO (1 << 3) /* Bit 3: Acknowledge Isolation */
#endif
#if defined(KINETIS_PMC_HAS_REGSC_VLPRS)
# define PMC_REGSC_VLPRS (1 << 3) /* Bit 3: Very Low Power Run Status */
#endif
#if defined(KINETIS_PMC_HAS_REGSC_BGEN)
# define PMC_REGSC_BGEN (1 << 4) /* Bit 4: Bandgap Enable In VLPx Operation */
#endif
#if defined(KINETIS_PMC_HAS_REGSC_TRAMPO)
# define PMC_REGSC_TRAMPO (1 << 4) /* Bit 4: For devices with FlexNVM: Traditional RAM Power Option */
#endif
/* Bits 5-7: Reserved */
/************************************************************************************

1635
arch/arm/src/kinetis/chip/kinetis_sim.h
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File diff suppressed because it is too large Load Diff

14
arch/arm/src/kinetis/kinetis_clockconfig.c
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@ -45,6 +45,7 @@
#include "chip/kinetis_mcg.h"
#include "chip/kinetis_sim.h"
#include "chip/kinetis_fmc.h"
#include "chip/kinetis_pmc.h"
#include "chip/kinetis_llwu.h"
#include "chip/kinetis_pinmux.h"
@ -191,7 +192,9 @@ static inline void kinesis_portclocks(void)
void kinetis_pllconfig(void)
{
#if defined(SIM_SCGC4_LLWU)
uint32_t regval32;
#endif
uint8_t regval8;
#if defined(BOARD_MCG_C2)
@ -228,16 +231,25 @@ void kinetis_pllconfig(void)
MCG_C2_RANGE_VHIGH | MCG_C2_EREFS, KINETIS_MCG_C2);
# endif
#endif /* defined(BOARD_MCG_C2) */
#if defined(SIM_SCGC4_LLWU)
/* Released latched state of oscillator and GPIO */
regval32 = getreg32(KINETIS_SIM_SCGC4);
regval32 |= SIM_SCGC4_LLWU;
putreg32(regval32, KINETIS_SIM_SCGC4);
#endif
#if defined(LLWU_CS_ACKISO)
regval8 = getreg8(KINETIS_LLWU_CS);
regval8 |= LLWU_CS_ACKISO;
putreg8(regval8, KINETIS_LLWU_CS);
#endif
#if defined(PMC_REGSC_ACKISO)
regval8 = getreg8(KINETIS_PMC_REGSC);
regval8 |= PMC_REGSC_ACKISO;
putreg8(regval8, KINETIS_PMC_REGSC);
#endif
/* Select external oscillator and Reference Divider and clear IREFS to
* start the external oscillator.

11
arch/arm/src/kinetis/kinetis_enet.c
View File

@ -2011,6 +2011,11 @@ static void kinetis_reset(struct kinetis_driver_s *priv)
int kinetis_netinitialize(int intf)
{
struct kinetis_driver_s *priv;
#ifdef CONFIG_NET_ETHERNET
uint32_t uidl;
uint32_t uidml;
uint8_t *mac;
#endif
uint32_t regval;
/* Get the interface structure associated with this interface number. */
@ -2158,9 +2163,9 @@ int kinetis_netinitialize(int intf)
* 1st octet)
*/
uint32_t uidl = getreg32(KINETIS_SIM_UIDL);
uint32_t uidml = getreg32(KINETIS_SIM_UIDML);
uint8_t *mac = priv->dev.d_mac.ether_addr_octet;
uidl = getreg32(KINETIS_SIM_UIDL);
uidml = getreg32(KINETIS_SIM_UIDML);
mac = priv->dev.d_mac.ether_addr_octet;
uidml |= 0x00000200;
uidml &= 0x0000FEFF;

3
arch/arm/src/kinetis/kinetis_usbdev.c
View File

@ -4396,10 +4396,11 @@ void up_usbinitialize(void)
* easier.
*/
#if 1
#warning "This code needs to be driven by BOARD_ settings and SIM_SOPT2[PLLFLLSE] needs to be set globally"
/* 1: Select clock source */
regval = getreg32(KINETIS_SIM_SOPT2);
regval |= SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_USBSRC;
regval |= SIM_SOPT2_PLLFLLSEL_MCGPLLCLK | SIM_SOPT2_USBSRC;
putreg32(regval, KINETIS_SIM_SOPT2);
regval = getreg32(KINETIS_SIM_CLKDIV2);

89
arch/arm/src/stm32f7/stm32_allocateheap.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/stm32f7/up_allocateheap.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -57,10 +57,12 @@
#include "up_arch.h"
#include "up_internal.h"
#include "stm32_mpuinit.h"
#include "stm32_dtcm.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Internal SRAM is available in all members of the STM32 family. The
* following definitions must be provided to specify the size and
* location of internal(system) SRAM:
@ -92,6 +94,20 @@
#define SRAM2_START STM32_SRAM2_BASE
#define SRAM2_END (SRAM2_START + STM32F7_SRAM2_SIZE)
/* The STM32 F7 has DTCM memory */
#undef HAVE_DTCM
#define HAVE_DTCM 1
#if !defined(DTCM_START) || !defined(DTCM_END)
# undef HAVE_DTCM
#endif
/* DTCM to be excluded from the main heap. */
#ifdef CONFIG_STM32F7_DTCMEXCLUDE
# undef HAVE_DTCM
#endif
/* We can't possibly have FSMC SRAM if the FSMC is not enabled */
#ifndef CONFIG_STM32F7_FSMC
@ -110,7 +126,7 @@
# endif
#endif
/* There are 3 possible heap configurations:
/* There are 4 possible heap configurations:
*
* Configuration 1. System SRAM1 (only)
* CONFIG_MM_REGIONS == 1
@ -118,9 +134,18 @@
* Configuration 2. System SRAM1 and SRAM2
* CONFIG_MM_REGIONS == 2
* CONFIG_STM32F7_FSMC_SRAM NOT defined
* Configuration 3. System SRAM1 and SRAM2 and FSMC SRAM
* Configuration 3. System SRAM1 and SRAM2 and DTCM
* CONFIG_MM_REGIONS == 3
* CONFIG_STM32F7_FSMC_SRAM undefined
* HAVE_DTCM defined
* Configuration 4. System SRAM1 and SRAM2 and FSMC SRAM
* CONFIG_MM_REGIONS == 3
* CONFIG_STM32F7_FSMC_SRAM defined
* HAVE_DTCM undefined
* Configuration 5. System SRAM1 and SRAM2 and DTCM and FSMC SRAM
* CONFIG_MM_REGIONS == 4
* CONFIG_STM32F7_FSMC_SRAM defined
* HAVE_DTCM defined
*
* Let's make sure that all definitions are consistent before doing
* anything else
@ -128,24 +153,48 @@
#if CONFIG_MM_REGIONS < 2
# ifdef CONFIG_STM32F7_FSMC_SRAM
# warning FSMC SRAM and SRAM2 excluded from the heap
# else
# warning "SRAM2 excluded from the heap"
# warning "FSMC SRAM excluded from the heap"
# undef CONFIG_STM32F7_FSMC_SRAM
# endif
# ifdef HAVE_DTCM
# warning "DTCM excluded from the heap"
# undef HAVE_DTCM
# endif
# warning "SRAM2 excluded from the heap"
#elif CONFIG_MM_REGIONS < 3
# ifdef CONFIG_STM32F7_FSMC_SRAM
# warning FSMC SRAM excluded from the heap
# warning "FSMC SRAM excluded from the heap"
# undef CONFIG_STM32F7_FSMC_SRAM
# endif
# ifdef HAVE_DTCM
# warning "DTCM excluded from the heap"
# undef HAVE_DTCM
# endif
#elif CONFIG_MM_REGIONS < 4
# ifndef CONFIG_STM32F7_FSMC_SRAM
# error CONFIG_MM_REGIONS > 2 but I do not know what some of the region(s) are
# if defined(CONFIG_STM32F7_FSMC_SRAM) && defined(HAVE_DTCM)
# warning "CONFIG_MM_REGIONS == 3 but have both FSMC SRAM and DTCM. DTCM excluded from the heap."
# undef HAVE_DTCM
# elif !defined(CONFIG_STM32F7_FSMC_SRAM) && !defined(HAVE_DTCM)
# error "CONFIG_MM_REGIONS == 3 but I do not know what some of the region(s) are"
# undef CONFIG_MM_REGIONS
# define CONFIG_MM_REGIONS 2
# endif
#elif CONFIG_MM_REGIONS < 5
# if !defined(CONFIG_STM32F7_FSMC_SRAM) && !defined(HAVE_DTCM)
# error "CONFIG_MM_REGIONS == 4 but I do not know what some of the region(s) are"
# undef CONFIG_MM_REGIONS
# define CONFIG_MM_REGIONS 2
# elif !defined(CONFIG_STM32F7_FSMC_SRAM) || !defined(HAVE_DTCM)
# error "CONFIG_MM_REGIONS == 4 but I do not know what some of the region(s) are"
# undef CONFIG_MM_REGIONS
# define CONFIG_MM_REGIONS 3
# endif
#else
# error CONFIG_MM_REGIONS > 3 but I do not know what some of the region(s) are
# error "CONFIG_MM_REGIONS > 4 but I do not know what some of the region(s) are"
# undef CONFIG_MM_REGIONS
# ifdef CONFIG_STM32F7_FSMC_SRAM
# if defined(CONFIG_STM32F7_FSMC_SRAM) && defined(HAVE_DTCM)
# define CONFIG_MM_REGIONS 4
# elif defined(CONFIG_STM32F7_FSMC_SRAM) || defined(HAVE_DTCM)
# define CONFIG_MM_REGIONS 3
# else
# define CONFIG_MM_REGIONS 2
@ -338,6 +387,24 @@ void up_addregion(void)
kumm_addregion((FAR void *)SRAM2_START, SRAM2_END-SRAM2_START);
#ifdef HAVE_DTCM
#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
/* Allow user-mode access to the DTCM heap */
stm32_mpu_uheap((uintptr_t)DTCM_START, DTCM_END-DTCM_START);
#endif
/* Colorize the heap for debug */
up_heap_color((FAR void *)DTCM_START, DTCM_END-DTCM_START);
/* Add the DTCM user heap region. */
kumm_addregion((FAR void *)DTCM_START, DTCM_END-DTCM_START);
#endif
#ifdef CONFIG_STM32F7_FSMC_SRAM
#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)

16
arch/arm/src/stm32l4/chip/stm32l4_comp.h
View File

@ -69,19 +69,11 @@
# define COMP_CSR_INMSEL_VREF (3 << COMP_CSR_INMSEL_SHIFT) /* VREFINT */
# define COMP_CSR_INMSEL_DAC1 (4 << COMP_CSR_INMSEL_SHIFT) /* DAC Channel1 */
# define COMP_CSR_INMSEL_DAC2 (5 << COMP_CSR_INMSEL_SHIFT) /* DAC Channel2 */
# define COMP_CSR_INMSEL_PIN1 (6 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 1 */
# define COMP_CSR_INMSEL_PIN2 (7 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 2 */
# define COMP1_CSR_INMSEL_PB1 (6 << COMP_CSR_INMSEL_SHIFT) /* PB1 */
# define COMP1_CSR_INMSEL_PC4 (7 << COMP_CSR_INMSEL_SHIFT) /* PC4 */
# define COMP2_CSR_INMSEL_PB3 (6 << COMP_CSR_INMSEL_SHIFT) /* PB3 */
# define COMP2_CSR_INMSEL_PB7 (7 << COMP_CSR_INMSEL_SHIFT) /* PB7 */
# define COMP_CSR_INMSEL_PIN1 (6 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 1: COMP1=PB1; COMP2=PB3 */
# define COMP_CSR_INMSEL_PIN2 (7 << COMP_CSR_INMSEL_SHIFT) /* Input minus pin 2: COMP1=PC4; COMP2=PB7 */
#define COMP_CSR_INPSEL_MASK (1 << 7) /* Bit 7: Input plus selection bit */
# define COMP1_CSR_INPSEL_PIN1 (0)
# define COMP1_CSR_INPSEL_PIN2 COMP_CSR_INPSEL_MASK
# define COMP1_CSR_INPSEL_PC5 (0)
# define COMP1_CSR_INPSEL_PB2 COMP_CSR_INPSEL_MASK
# define COMP2_CSR_INPSEL_PB4 (0)
# define COMP2_CSR_INPSEL_PB6 COMP_CSR_INPSEL_MASK
# define COMP_CSR_INPSEL_PIN1 (0) /* Input plus pin 1: COMP1=PC5; COMP2=PB4 */
# define COMP_CSR_INPSEL_PIN2 COMP_CSR_INPSEL_MASK /* Input plus pin 1: COMP1=PB2; COMP2=PB6 */
#define COMP2_CSR_WINMODE (1 << 9) /* Bit 9: Windows mode selection bit (COMP2 only) */
# define COMP2_CSR_WINMODE_NOCONN (0) /* Comparator 2 input not connected to Comparator 1 */
# define COMP2_CSR_WINMODE_CONN COMP2_CSR_WINMODE /* Comparator 2 input connected to Comparator 1 */

6
arch/arm/src/stm32l4/stm32l4_comp.c
View File

@ -107,18 +107,18 @@ int stm32l4_compconfig(int cmp, const struct stm32l4_comp_config_s *cfg)
{
case STM32L4_COMP_INP_PIN_1:
stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INP_1 : GPIO_COMP2_INP_1);
regval |= COMP1_CSR_INPSEL_PIN1;
regval |= COMP_CSR_INPSEL_PIN1;
break;
case STM32L4_COMP_INP_PIN_2:
stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INP_2 : GPIO_COMP2_INP_2);
regval |= COMP1_CSR_INPSEL_PIN2;
regval |= COMP_CSR_INPSEL_PIN2;
break;
#if defined(CONFIG_STM32L4_STM32L4X3)
case STM32L4_COMP_INP_PIN_3:
stm32l4_configgpio(cmp == STM32L4_COMP1 ? GPIO_COMP1_INP_3 : GPIO_COMP2_INP_3);
regval |= COMP1_CSR_INPSEL_PIN3;
regval |= COMP_CSR_INPSEL_PIN3;
break;
#endif

1
configs/bambino-200e/netnsh/defconfig
View File

@ -852,7 +852,6 @@ CONFIG_LIBM=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/bambino-200e/usbnsh/defconfig
View File

@ -726,7 +726,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/fire-stm32v2/nsh/defconfig
View File

@ -1176,7 +1176,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/freedom-k64f/nsh/defconfig
View File

@ -709,7 +709,6 @@ CONFIG_NUNGET_CHARS=2
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/freedom-k66f/netnsh/defconfig
View File

@ -916,7 +916,6 @@ CONFIG_ARCH_LOWPUTC=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set

1
configs/freedom-k66f/nsh/defconfig
View File

@ -802,7 +802,6 @@ CONFIG_ARCH_LOWPUTC=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set

1
configs/hymini-stm32v/nsh/defconfig
View File

@ -923,7 +923,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/hymini-stm32v/nsh2/defconfig
View File

@ -1139,7 +1139,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/hymini-stm32v/usbmsc/defconfig
View File

@ -976,7 +976,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

2
configs/nucleo-144/f767-evalos/defconfig
View File

@ -747,7 +747,7 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
# Memory Management
#
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=2
CONFIG_MM_REGIONS=3
# CONFIG_ARCH_HAVE_HEAP2 is not set
# CONFIG_GRAN is not set

2
configs/nucleo-144/f767-nsh/defconfig
View File

@ -734,7 +734,7 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
# Memory Management
#
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=2
CONFIG_MM_REGIONS=3
# CONFIG_ARCH_HAVE_HEAP2 is not set
# CONFIG_GRAN is not set

1
configs/nucleo-l476rg/nsh/defconfig
View File

@ -760,7 +760,6 @@ CONFIG_ARCH_LOWPUTC=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set

5
configs/olimex-stm32-p407/include/board.h
View File

@ -235,6 +235,11 @@
#define GPIO_USART3_CTS GPIO_USART3_CTS_2 /* PD11 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */
/* USART6: */
#define GPIO_USART6_RX GPIO_USART6_RX_2 /* PG9 */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
/* CAN: */
#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */

1
configs/olimex-stm32-p407/knsh/defconfig
View File

@ -944,7 +944,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/olimex-stm32-p407/nsh/defconfig
View File

@ -937,7 +937,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

5
configs/olimex-stm32-p407/src/Makefile
View File

@ -48,6 +48,11 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_STM32_FSMC),y)
CSRCS += stm32_sram.c
endif
ifeq ($(CONFIG_STM32_OTGFS),y)
CSRCS += stm32_usb.c
endif

30
configs/olimex-stm32-p407/src/olimex-stm32-p407.h
View File

@ -190,6 +190,36 @@
int stm32_bringup(void);
/************************************************************************************
* Name: stm32_stram_configure
*
* Description:
* Initialize to access external SRAM. SRAM will be visible at the FSMC Bank
* NOR/SRAM2 base address (0x64000000)
*
* General transaction rules. The requested AHB transaction data size can be 8-,
* 16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple
* transaction rules must be followed:
*
* Case 1: AHB transaction width and SRAM data width are equal
* There is no issue in this case.
* Case 2: AHB transaction size is greater than the memory size
* In this case, the FSMC splits the AHB transaction into smaller consecutive
* memory accesses in order to meet the external data width.
* Case 3: AHB transaction size is smaller than the memory size.
* SRAM supports the byte select feature.
* a) FSMC allows write transactions accessing the right data through its
* byte lanes (NBL[1:0])
* b) Read transactions are allowed (the controller reads the entire memory
* word and uses the needed byte only). The NBL[1:0] are always kept low
* during read transactions.
*
************************************************************************************/
#ifdef CONFIG_STM32_FSMC
void stm32_stram_configure(void);
#endif
/************************************************************************************
* Name: stm32_usb_configure
*

6
configs/olimex-stm32-p407/src/stm32_boot.c
View File

@ -63,6 +63,12 @@
void stm32_boardinitialize(void)
{
#ifdef CONFIG_STM32_FSMC
/* If the FSMC is enabled, then enable SRAM access */
stm32_stram_configure();
#endif
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usb_configure() has been brought
* into the build. Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also

262
configs/olimex-stm32-p407/src/stm32_sram.c Normal file
View File

@ -0,0 +1,262 @@
/************************************************************************************
* configs/olimex-stm32-p407/src/stm32_sram.c
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <debug.h>
#include "chip.h"
#include "up_arch.h"
#include "stm32.h"
#include "stm3240g-eval.h"
#ifdef CONFIG_STM32_FSMC
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if STM32_NGPIO_PORTS < 6
# error "Required GPIO ports not enabled"
#endif
#if defined(CONFIG_STM32_USART3) || defined(CONFIG_STM32_USART6)
# error "USART3 and USART6 conflict with use of SRAM"
#endif
/* SRAM Timing
* REVIST: These were ported from the STM3240G-EVAL and have not been verified on
* this platform.
*/
#define SRAM_ADDRESS_SETUP_TIME 3
#define SRAM_ADDRESS_HOLD_TIME 0
#define SRAM_DATA_SETUP_TIME 6
#define SRAM_BUS_TURNAROUND_DURATION 1
#define SRAM_CLK_DIVISION 0
#define SRAM_DATA_LATENCY 0
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Private Data
************************************************************************************/
/* GPIOs Configuration **************************************************************
*---------------------+------------------+------------------+-----------------+
* GPIO FSMC NOTE |GPIO FSMC NOTE|GPIO FSMC NOTE|GPIO FSMC NOTE|
*---------------------+------------------+------------------+-----------------+
* PD0 FSMC_D2 |PE0 FSMC_NBL0 |PF0 FSMC_A0 |PG0 FSMC_A10 |
* PD1 FSMC_D3 |PE1 FSMC_NBL1 |PF1 FSMC_A1 |PG1 FSMC_A11 |
* | |PF2 FSMC_A2 |PG2 FSMC_A12 |
* | |PF3 FSMC_A3 |PG3 FSMC_A13 |
* PD4 FSMC_NOE 2 | |PF4 FSMC_A4 |PG4 FSMC_A14 |
* PD5 FSMC_NWE | |PF5 FSMC_A5 |PG5 FSMC_A15 |
* | | | |
* PD7 FSMC_NE1/NCE2 |PE7 FSMC_D4 | | |
* PD8 FSMC_D13 1 |PE8 FSMC_D5 | | |
* PD9 FSMC_D14 1 |PE9 FSMC_D6 | | |
* PD10 FSMC_D15 1 |PE10 FSMC_D7 | | |
* PD11 FSMC_A16 1 |PE11 FSMC_D8 | | |
* PD12 FSMC_A17 |PE12 FSMC_D9 |PF12 FSMC_A6 | |
* |PE13 FSMC_D10 |PF13 FSMC_A7 | |
* PD14 FSMC_D0 |PE14 FSMC_D11 |PF14 FSMC_A8 | |
* PD15 FSMC_D1 |PE15 FSMC_D12 |PF15 FSMC_A9 | |
*---------------------+------------------+------------------+-----------------+
*
* NOTES:
* (1) Shared with USART3: PD8=USART3_TX PD9=USART3_RX PD11=USART3_CTS
* PD12=USART3_RTS
* (2) Shared with USB: PD4=USB_HS_FAULT
*/
/* SRAM GPIO configuration */
static const uint32_t g_sramconfig[] =
{
/* Address configuration: FSMC_A0-FSMC_A17 */
GPIO_FSMC_A0, GPIO_FSMC_A1 , GPIO_FSMC_A2, GPIO_FSMC_A3, GPIO_FSMC_A4 , GPIO_FSMC_A5,
GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8, GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11,
GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14, GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17,
/* Data Configuration: FSMC_D0-FSMC_D15 */
GPIO_FSMC_D0, GPIO_FSMC_D1 , GPIO_FSMC_D2, GPIO_FSMC_D3, GPIO_FSMC_D4 , GPIO_FSMC_D5,
GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8, GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11,
GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14, GPIO_FSMC_D15
/* Control Signals:
*
* /CS = PD7, FSMC_NE1
* /OE = PD4, FSMC_NOE
* /WE = PD5, FSMC_NWE
* /BHE = PE0, FSMC_NBL0
* /BHL = PE1, PSMC_NBL1
*/
GPIO_FSMC_NE1, GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NBL0, GPIO_FSMC_NBL1
};
#define NSRAM_CONFIG (sizeof(g_sramconfig)/sizeof(uint32_t))
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_enablefsmc
*
* Description:
* Enable clocking to the FSMC module
*
************************************************************************************/
static void stm32_enablefsmc(void)
{
uint32_t regval;
/* Enable AHB clocking to the FSMC */
regval = getreg32( STM32_RCC_AHB3ENR);
regval |= RCC_AHB3ENR_FSMCEN;
putreg32(regval, STM32_RCC_AHB3ENR);
}
/************************************************************************************
* Name: stm32_sramgpios
*
* Description:
* Configure SRAM GPIO pins
*
************************************************************************************/
static void stm32_sramgpios(void)
{
int i;
/* Configure SRAM GPIOs */
for (i = 0; i < NSRAM_CONFIG; i++)
{
stm32_configgpio(g_sramconfig[i]);
}
}
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_stram_configure
*
* Description:
* Initialize to access external SRAM. SRAM will be visible at the FSMC Bank
* NOR/SRAM2 base address (0x64000000)
*
* General transaction rules. The requested AHB transaction data size can be 8-,
* 16- or 32-bit wide whereas the SRAM has a fixed 16-bit data width. Some simple
* transaction rules must be followed:
*
* Case 1: AHB transaction width and SRAM data width are equal
* There is no issue in this case.
* Case 2: AHB transaction size is greater than the memory size
* In this case, the FSMC splits the AHB transaction into smaller consecutive
* memory accesses in order to meet the external data width.
* Case 3: AHB transaction size is smaller than the memory size.
* SRAM supports the byte select feature.
* a) FSMC allows write transactions accessing the right data through its
* byte lanes (NBL[1:0])
* b) Read transactions are allowed (the controller reads the entire memory
* word and uses the needed byte only). The NBL[1:0] are always kept low
* during read transactions.
*
************************************************************************************/
void stm32_stram_configure(void)
{
/* Configure GPIO pins */
stm32_extmemgpios(g_sramconfig, NSRAM_CONFIG); /* SRAM-specific control lines */
/* Enable AHB clocking to the FSMC */
stm32_enablefsmc();
/* Bank1 NOR/SRAM control register configuration
*
* Bank enable : Not yet
* Data address mux : Disabled
* Memory Type : PSRAM
* Data bus width : 16-bits
* Flash access : Disabled
* Burst access mode : Disabled
* Polarity : Low
* Wrapped burst mode : Disabled
* Write timing : Before state
* Write enable : Yes
* Wait signal : Disabled
* Extended mode : Disabled
* Asynchronous wait : Disabled
* Write burst : Disabled
*/
putreg32((FSMC_BCR_PSRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN), STM32_FSMC_BCR2);
/* Bank1 NOR/SRAM timing register configuration */
putreg32((FSMC_BTR_ADDSET(SRAM_ADDRESS_SETUP_TIME) | FSMC_BTR_ADDHLD(SRAM_ADDRESS_HOLD_TIME) |
FSMC_BTR_DATAST(SRAM_DATA_SETUP_TIME) | FSMC_BTR_BUSTURN(SRAM_BUS_TURNAROUND_DURATION) |
FSMC_BTR_CLKDIV(SRAM_CLK_DIVISION) | FSMC_BTR_DATLAT(SRAM_DATA_LATENCY) |
FSMC_BTR_ACCMODA),
STM32_FSMC_BTR2);
/* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */
putreg32(0xffffffff, STM32_FSMC_BWTR2); /* Extended mode not used */
/* Enable the bank */
putreg32((FSMC_BCR_MBKEN | FSMC_BCR_PSRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN), STM32_FSMC_BCR2);
}
#endif /* CONFIG_STM32_FSMC */

1
configs/open1788/knsh/defconfig
View File

@ -687,7 +687,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/open1788/nsh/defconfig
View File

@ -684,7 +684,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/sam4s-xplained-pro/nsh/defconfig
View File

@ -831,7 +831,6 @@ CONFIG_NUNGET_CHARS=2
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/sama5d3x-ek/demo/defconfig
View File

@ -910,7 +910,6 @@ CONFIG_NUNGET_CHARS=2
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7A_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/sama5d3x-ek/nxplayer/defconfig
View File

@ -859,7 +859,6 @@ CONFIG_NUNGET_CHARS=2
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7A_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/sama5d4-ek/elf/defconfig
View File

@ -782,7 +782,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
CONFIG_LIBC_ARCH_ELF=y
# CONFIG_ARMV7A_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/sama5d4-ek/ipv6/defconfig
View File

@ -1243,7 +1243,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7A_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/sama5d4-ek/knsh/defconfig
View File

@ -831,7 +831,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
CONFIG_LIBC_ARCH_ELF=y
# CONFIG_ARMV7A_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/sama5d4-ek/nsh/defconfig
View File

@ -1247,7 +1247,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7A_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/sama5d4-ek/nxwm/defconfig
View File

@ -1239,7 +1239,6 @@ CONFIG_LIBM=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7A_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/same70-xplained/netnsh/defconfig
View File

@ -986,7 +986,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/same70-xplained/nsh/defconfig
View File

@ -819,7 +819,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/samv71-xult/knsh/defconfig
View File

@ -829,7 +829,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/samv71-xult/module/defconfig
View File

@ -741,7 +741,6 @@ CONFIG_MODLIB_BUFFERINCR=32
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
CONFIG_LIBC_ARCH_ELF=y
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/samv71-xult/mxtxplnd/defconfig
View File

@ -950,7 +950,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/samv71-xult/netnsh/defconfig
View File

@ -989,7 +989,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/samv71-xult/nsh/defconfig
View File

@ -822,7 +822,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/samv71-xult/nxwm/defconfig
View File

@ -968,7 +968,6 @@ CONFIG_LIBM=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/samv71-xult/vnc/defconfig
View File

@ -1090,7 +1090,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/samv71-xult/vnxwm/defconfig
View File

@ -1118,7 +1118,6 @@ CONFIG_LIBM=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm3210e-eval/composite/defconfig
View File

@ -1056,7 +1056,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm3210e-eval/nsh/defconfig
View File

@ -1013,7 +1013,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm3210e-eval/nsh2/defconfig
View File

@ -1173,7 +1173,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm3210e-eval/usbmsc/defconfig
View File

@ -981,7 +981,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm3220g-eval/nsh2/defconfig
View File

@ -1145,7 +1145,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm3240g-eval/nsh2/defconfig
View File

@ -1149,7 +1149,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

6
configs/stm32f103-minimum/Kconfig
View File

@ -4,4 +4,10 @@
#
if ARCH_BOARD_STM32F103_MINIMUM
config STM32F103MINIMUM_QETIMER
int "Timer to use with QE encoder"
default 4
depends on QENCODER
endif

265
configs/stm32f103-minimum/README.txt
View File

@ -4,70 +4,86 @@ README
This README discusses issues unique to NuttX configurations for the
STM32F103C8T6 Minimum System Development Board for ARM Microcontroller.
This board is available from several vendors on the net, and may
be sold under different names or no name at all. It is based on a
STM32F103C8T6 and has a DIP-40 form-factor.
Contents
========
There are two versions of very similar boards: One is red and one is
blue. See http://www.stm32duino.com/viewtopic.php?f=28&t=117
- STM32F103C8T6 Minimum System Development Boards:
- LEDs
- UARTs
- Timer Inputs/Outputs
- Using 128KiB of Flash instead of 64KiB
- Quadrature Encoder
- STM32F103 Minimum - specific Configuration Options
- Configurations
The Red Board:
STM32F103C8T6 Minimum System Development Boards:
================================================
Good things about the red board:
This STM32F103C8T6 minimum system development board is available from
several vendors on the net, and may be sold under different names or
no name at all. It is based on a STM32F103C8T6 and has a DIP-40 form-
factor.
- 1.5k pull up resistor on the PA12 pin (USB D+) which you can
programatically drag down for automated USB reset.
- large power capacitors and LDO power.
There are two versions of very similar boards: One is red and one is
blue. See http://www.stm32duino.com/viewtopic.php?f=28&t=117
Problems with the red board:
The Red Board:
- Silk screen is barely readable, the text is chopped off on some of
the pins
- USB connector only has two anchor points and it is directly soldered
on the surface
- Small reset button with hardly any resistance
Good things about the red board:
The Blue Board:
- 1.5k pull up resistor on the PA12 pin (USB D+) which you can
programatically drag down for automated USB reset.
- large power capacitors and LDO power.
Good things about the blue board:
Problems with the red board:
- Four soldered anchor point on the USB connector. What you can't tell
from this picture is that there is a notch in the pcb board and the USB
connector sits down inside it some. This provides some lateral stability
that takes some of the stress off the solder points.
- It has nice clear readable silkscreen printing.
- It also a larger reset button.
- Silk screen is barely readable, the text is chopped off on some of
the pins
- USB connector only has two anchor points and it is directly soldered
on the surface
- Small reset button with hardly any resistance
Problems with the blue board:
The Blue Board:
- Probably won't work as a USB device if it has a 10k pull-up on PA12. You
have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
resistor, you will need to replace it with a 1.5k one to use the native
USB.
- Puny voltage regulator probably 100mA.
Good things about the blue board:
A schematic for the blue board is available here:
http://www.stm32duino.com/download/file.php?id=276
- Four soldered anchor point on the USB connector. What you can't tell
from this picture is that there is a notch in the pcb board and the USB
connector sits down inside it some. This provides some lateral stability
that takes some of the stress off the solder points.
- It has nice clear readable silkscreen printing.
- It also a larger reset button.
Both Boards:
Problems with the blue board:
Nice features common to both:
- Probably won't work as a USB device if it has a 10k pull-up on PA12. You
have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
resistor, you will need to replace it with a 1.5k one to use the native
USB.
- Puny voltage regulator probably 100mA.
- SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
- USB 5V is broken out with easy access.
- User LED on PC13
- Power LED
- You can probably use more flash (128k) than officially documented for
the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
and it seemed to work.
A schematic for the blue board is available here:
http://www.stm32duino.com/download/file.php?id=276
Problems with both boards:
Both Boards:
- No preloaded bootloader * to me this isn't really a problem as the
entire 64k of flash is available for use
- No user button
Nice features common to both:
This is the board pinout based on its form-factor for the Blue board:
- SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
- USB 5V is broken out with easy access.
- User LED on PC13
- Power LED
- You can probably use more flash (128k) than officially documented for
the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
and it seemed to work.
Problems with both boards:
- No preloaded bootloader * to me this isn't really a problem as the
entire 64k of flash is available for use
- No user button
This is the board pinout based on its form-factor for the Blue board:
USB
___
@ -94,25 +110,15 @@ This is the board pinout based on its form-factor for the Blue board:
|3.3V VB|
|_____________|
Contents
========
- LEDs
- UARTs
- Timer Inputs/Outputs
- Using 128KiB of Flash instead of 64KiB
- STM32F103 Minimum - specific Configuration Options
- Configurations
LEDs
====
The STM32F103 Minimum board has only one software controllable LED.
This LED can be used by the board port when CONFIG_ARCH_LEDS option is
enabled.
The STM32F103 Minimum board has only one software controllable LED.
This LED can be used by the board port when CONFIG_ARCH_LEDS option is
enabled.
If enabled the LED is simply turned on when the board boots
succesfully, and is blinking on panic / assertion failed.
If enabled the LED is simply turned on when the board boots
succesfully, and is blinking on panic / assertion failed.
UARTs
=====
@ -139,7 +145,7 @@ UARTs
Default USART/UART Configuration
--------------------------------
USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
Timer Inputs/Outputs
====================
@ -171,69 +177,104 @@ Timer Inputs/Outputs
Using 128KiB of Flash instead of 64KiB
======================================
Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
instead of 64KiB as documented in the datasheet and reported by its internal
register.
Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
instead of 64KiB as documented in the datasheet and reported by its internal
register.
In order to enable 128KiB you need modify the linker script to reflect this
new size. Open the configs/stm32f103-minimum/scripts/ld.script and replace:
In order to enable 128KiB you need modify the linker script to reflect this
new size. Open the configs/stm32f103-minimum/scripts/ld.script and replace:
flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
with
with
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
Enable many NuttX features (ie. many filesystems and applications) to get a
large binary image with more than 64K.
Enable many NuttX features (ie. many filesystems and applications) to get a
large binary image with more than 64K.
We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
up to dated OpenOCD version (ie. openocd-0.9).
We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
up to dated OpenOCD version (ie. openocd-0.9).
You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing:
You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing:
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
with
with
flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
We will use OpenOCD with STLink-V2 programmer, but it will work with other
programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
We will use OpenOCD with STLink-V2 programmer, but it will work with other
programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
Open a terminal and execute:
Open a terminal and execute:
$ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
$ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
Now in other terminal execute:
Now in other terminal execute:
$ telnet localhost 4444
$ telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> reset halt
stm32f1x.cpu: target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
> reset halt
stm32f1x.cpu: target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
> flash write_image erase nuttx.bin 0x08000000
auto erase enabled
device id = 0x20036410
ignoring flash probed value, using configured bank size
flash size = 128kbytes
stm32f1x.cpu: target state: halted
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
> flash write_image erase nuttx.bin 0x08000000
auto erase enabled
device id = 0x20036410
ignoring flash probed value, using configured bank size
flash size = 128kbytes
stm32f1x.cpu: target state: halted
target halted due to breakpoint, current mode: Thread
xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
> reset run
> exit
> reset run
> exit
Now NuttX should start normally.
Now NuttX should start normally.
Quadrature Encoder:
===================
The nsh configuration has been used to test the Quadrture Encoder
(QEncoder, QE) with the following modifications to the configuration
file:
- These setting enable support for the common QEncode upper half driver:
CONFIG_SENSORS=y
CONFIG_QENCODER=y
- This is a board setting that selected timer 4 for use with the
quadrature encode:
CONFIG_STM32F103MINIMUM_QETIMER=4
- These settings enable the STM32 Quadrature encoder on timer 4:
CONFIG_STM32_TIM4_CAP=y
CONFIG_STM32_TIM4_QE=y
CONFIG_STM32_TIM4_QECLKOUT=2800000
CONFIG_STM32_QENCODER_FILTER=y
CONFIG_STM32_QENCODER_SAMPLE_EVENT_6=y
CONFIG_STM32_QENCODER_SAMPLE_FDTS_4=y
- These settings enable the test case at apps/examples/qencoder:
CONFIG_EXAMPLES_QENCODER=y
CONFIG_EXAMPLES_QENCODER_DELAY=100
CONFIG_EXAMPLES_QENCODER_DEVPATH="/dev/qe0"
In this configuration, the QEncoder inputs will be on the TIM4 inputs of
PB6 and PB7.
STM32F103 Minimum - specific Configuration Options
==================================================
@ -406,21 +447,25 @@ STM32F103 Minimum - specific Configuration Options
Configurations
==============
Each STM32F103 Minimum configuration is maintained in a sub-directory and
can be selected as follow:
Instantiating Configurations
----------------------------
Each STM32F103 Minimum configuration is maintained in a sub-directory and
can be selected as follow:
cd tools
./configure.sh STM32F103 Minimum/<subdir>
cd -
. ./setenv.sh
If this is a Windows native build, then configure.bat should be used
instead of configure.sh:
If this is a Windows native build, then configure.bat should be used
instead of configure.sh:
configure.bat STM32F103-Minimum\<subdir>
Where <subdir> is one of the following:
Where <subdir> is one of the following:
Configuration Directories
-------------------------
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. This

1
configs/stm32f103-minimum/audio_tone/defconfig
View File

@ -945,7 +945,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

4
configs/stm32f103-minimum/src/Makefile
View File

@ -73,6 +73,10 @@ ifeq ($(CONFIG_LCD_ST7567),y)
CSRCS += stm32_lcd.c
endif
ifeq ($(CONFIG_QENCODER),y)
CSRCS += stm32_qencoder.c
endif
ifeq ($(CONFIG_VEML6070),y)
CSRCS += stm32_veml6070.c
endif

12
configs/stm32f103-minimum/src/stm32_bringup.c
View File

@ -163,6 +163,18 @@ int stm32_bringup(void)
}
#endif
#ifdef CONFIG_QENCODER
/* Initialize and register the qencoder driver */
ret = stm32_qencoder_initialize("/dev/qe0", CONFIG_STM32F103MINIMUM_QETIMER);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to register the qencoder: %d\n",
ret);
}
#endif
#ifdef CONFIG_USERLED
/* Register the LED driver */

80
configs/stm32f103-minimum/src/stm32_qencoder.c Normal file
View File

@ -0,0 +1,80 @@
/************************************************************************************
* configs/stm32f103-minimum/src/stm32_qencoder.c
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/sensors/qencoder.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "stm32_qencoder.h"
#include "stm32f103_minimum.h"
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_qencoder_initialize
*
* Description:
* All STM32 architectures must provide the following interface to work with
* examples/qencoder.
*
************************************************************************************/
int stm32_qencoder_initialize(FAR const char *devpath, int timer)
{
int ret;
/* Initialize a quadrature encoder interface. */
sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
ret = stm32_qeinitialize(devpath, timer);
if (ret < 0)
{
snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
}
return ret;
}

1
configs/stm32f429i-disco/extflash/defconfig
View File

@ -1022,7 +1022,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f429i-disco/lcd/defconfig
View File

@ -1070,7 +1070,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f429i-disco/ltdc/defconfig
View File

@ -1088,7 +1088,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f429i-disco/nsh/defconfig
View File

@ -935,7 +935,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f429i-disco/nxwm/defconfig
View File

@ -1141,7 +1141,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f429i-disco/usbmsc/defconfig
View File

@ -971,7 +971,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f429i-disco/usbnsh/defconfig
View File

@ -985,7 +985,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f4discovery/elf/defconfig
View File

@ -930,7 +930,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
CONFIG_LIBC_ARCH_ELF=y
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f4discovery/ipv6/defconfig
View File

@ -1161,7 +1161,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f4discovery/netnsh/defconfig
View File

@ -1165,7 +1165,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f4discovery/nsh/defconfig
View File

@ -951,7 +951,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

1
configs/stm32f4discovery/posix_spawn/defconfig
View File

@ -930,7 +930,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
CONFIG_LIBC_ARCH_ELF=y
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

3
configs/stm32f746-ws/nsh/defconfig
View File

@ -862,7 +862,7 @@ CONFIG_FAT_DIRECT_RETRY=y
# Memory Management
#
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=2
CONFIG_MM_REGIONS=3
# CONFIG_ARCH_HAVE_HEAP2 is not set
CONFIG_GRAN=y
# CONFIG_GRAN_SINGLE is not set
@ -912,7 +912,6 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set

2
configs/stm32f746g-disco/nsh/defconfig
View File

@ -732,7 +732,7 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
# Memory Management
#
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=2
CONFIG_MM_REGIONS=3
# CONFIG_ARCH_HAVE_HEAP2 is not set
# CONFIG_GRAN is not set

1
configs/stm32l476-mdk/nsh/defconfig
View File

@ -775,7 +775,6 @@ CONFIG_ARCH_LOWPUTC=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set

1
configs/stm32l476vg-disco/nsh/defconfig
View File

@ -825,7 +825,6 @@ CONFIG_ARCH_LOWPUTC=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set

69
configs/twr-k64f120m/netnsh/defconfig
View File

@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y
#
# Build Configuration
#
CONFIG_APPS_DIR="../apps"
# CONFIG_APPS_DIR="../apps"
CONFIG_BUILD_FLAT=y
# CONFIG_BUILD_2PASS is not set
@ -43,56 +43,15 @@ CONFIG_INTELHEX_BINARY=y
# Debug Options
#
CONFIG_DEBUG_ALERT=y
CONFIG_DEBUG_FEATURES=y
#
# Debug SYSLOG Output Controls
#
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_WARN=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_ASSERTIONS=y
#
# Subsystem Debug Options
#
# CONFIG_DEBUG_BINFMT is not set
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_FS_ERROR=y
CONFIG_DEBUG_FS_WARN=y
# CONFIG_DEBUG_FS_INFO is not set
# CONFIG_DEBUG_GRAPHICS is not set
# CONFIG_DEBUG_LIB is not set
# CONFIG_DEBUG_MM is not set
CONFIG_DEBUG_NET=y
CONFIG_DEBUG_NET_ERROR=y
CONFIG_DEBUG_NET_WARN=y
# CONFIG_DEBUG_NET_INFO is not set
# CONFIG_DEBUG_SCHED is not set
#
# OS Function Debug Options
#
# CONFIG_DEBUG_IRQ is not set
#
# Driver Debug Options
#
# CONFIG_DEBUG_LEDS is not set
# CONFIG_DEBUG_GPIO is not set
CONFIG_DEBUG_MEMCARD=y
CONFIG_DEBUG_MEMCARD_ERROR=y
CONFIG_DEBUG_MEMCARD_WARN=y
# CONFIG_DEBUG_MEMCARD_INFO is not set
# CONFIG_DEBUG_TIMER is not set
# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_DEBUG_SYMBOLS=y
# CONFIG_DEBUG_SYMBOLS is not set
CONFIG_ARCH_HAVE_CUSTOMOPT=y
CONFIG_DEBUG_NOOPT=y
# CONFIG_DEBUG_NOOPT is not set
# CONFIG_DEBUG_CUSTOMOPT is not set
# CONFIG_DEBUG_FULLOPT is not set
CONFIG_DEBUG_FULLOPT=y
#
# System Type
@ -174,7 +133,6 @@ CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
# CONFIG_DEBUG_HARDFAULT is not set
#
# ARMV7M Configuration Options
@ -545,10 +503,10 @@ CONFIG_DEV_NULL=y
# CONFIG_PWM is not set
# CONFIG_ARCH_HAVE_I2CRESET is not set
# CONFIG_I2C is not set
# CONFIG_SPI is not set
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
# CONFIG_SPI is not set
# CONFIG_I2S is not set
#
@ -609,11 +567,9 @@ CONFIG_NETDEVICES=y
CONFIG_NETDEV_TELNET=y
CONFIG_TELNET_RXBUFFER_SIZE=256
CONFIG_TELNET_TXBUFFER_SIZE=256
# CONFIG_TELNET_DUMPBUFFER is not set
# CONFIG_NETDEV_MULTINIC is not set
CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y
# CONFIG_NETDEV_LATEINIT is not set
# CONFIG_NET_DUMPPACKET is not set
#
# External Ethernet MAC Device Support
@ -642,7 +598,6 @@ CONFIG_ETH0_PHY_KSZ8041=y
# CONFIG_ETH0_PHY_LAN8740A is not set
# CONFIG_ETH0_PHY_LAN8742A is not set
# CONFIG_ETH0_PHY_DM9161 is not set
# CONFIG_NETDEV_PHY_DEBUG is not set
# CONFIG_PIPES is not set
# CONFIG_PM is not set
# CONFIG_POWER is not set
@ -679,7 +634,6 @@ CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
# CONFIG_SERIAL_DMA is not set
# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
CONFIG_UART1_SERIAL_CONSOLE=y
# CONFIG_OTHER_SERIAL_CONSOLE is not set
@ -779,8 +733,6 @@ CONFIG_NET_MAX_LISTENPORTS=20
CONFIG_NET_TCP_READAHEAD=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_TCP_NWRBCHAINS=8
# CONFIG_NET_TCP_WRBUFFER_DEBUG is not set
# CONFIG_NET_TCP_WRBUFFER_DUMP is not set
CONFIG_NET_TCP_RECVDELAY=0
# CONFIG_NET_TCPBACKLOG is not set
# CONFIG_NET_SENDFILE is not set
@ -825,7 +777,6 @@ CONFIG_IOB_NBUFFERS=36
CONFIG_IOB_BUFSIZE=196
CONFIG_IOB_NCHAINS=8
CONFIG_IOB_THROTTLE=8
# CONFIG_IOB_DEBUG is not set
# CONFIG_NET_ARCH_INCR32 is not set
# CONFIG_NET_ARCH_CHKSUM is not set
# CONFIG_NET_STATISTICS is not set
@ -850,7 +801,6 @@ CONFIG_NET_HOSTNAME="TWRK64"
#
# CONFIG_DISABLE_MOUNTPOINT is not set
CONFIG_FS_AUTOMOUNTER=y
CONFIG_FS_AUTOMOUNTER_DEBUG=y
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_PSEUDOFS_SOFTLINKS is not set
CONFIG_FS_READABLE=y
@ -957,7 +907,6 @@ CONFIG_ARCH_LOWPUTC=y
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
@ -1065,10 +1014,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_EXAMPLES_NRF24L01TERM is not set
CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXFFS is not set
# CONFIG_EXAMPLES_NXHELLO is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTERM is not set
# CONFIG_EXAMPLES_NXTEXT is not set
@ -1085,12 +1034,13 @@ CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_SLCD is not set
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_SMP is not set
# CONFIG_EXAMPLES_STAT is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_UDPBLASTER is not set
# CONFIG_EXAMPLES_UDP is not set
# CONFIG_EXAMPLES_UDPBLASTER is not set
# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
@ -1252,7 +1202,6 @@ CONFIG_NSH_ARCHINIT=y
#
CONFIG_NSH_NETINIT=y
# CONFIG_NSH_NETINIT_THREAD is not set
# CONFIG_NSH_NETINIT_DEBUG is not set
#
# IP Address Configuration

143
configs/twr-k64f120m/nsh/defconfig
View File

@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y
#
# Build Configuration
#
CONFIG_APPS_DIR="../apps"
# CONFIG_APPS_DIR="../apps"
CONFIG_BUILD_FLAT=y
# CONFIG_BUILD_2PASS is not set
@ -43,52 +43,15 @@ CONFIG_INTELHEX_BINARY=y
# Debug Options
#
CONFIG_DEBUG_ALERT=y
CONFIG_DEBUG_FEATURES=y
#
# Debug SYSLOG Output Controls
#
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_WARN=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_ASSERTIONS=y
#
# Subsystem Debug Options
#
# CONFIG_DEBUG_BINFMT is not set
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_FS_ERROR=y
CONFIG_DEBUG_FS_WARN=y
# CONFIG_DEBUG_FS_INFO is not set
# CONFIG_DEBUG_GRAPHICS is not set
# CONFIG_DEBUG_LIB is not set
# CONFIG_DEBUG_MM is not set
# CONFIG_DEBUG_SCHED is not set
#
# OS Function Debug Options
#
# CONFIG_DEBUG_IRQ is not set
#
# Driver Debug Options
#
# CONFIG_DEBUG_LEDS is not set
# CONFIG_DEBUG_GPIO is not set
CONFIG_DEBUG_MEMCARD=y
CONFIG_DEBUG_MEMCARD_ERROR=y
CONFIG_DEBUG_MEMCARD_WARN=y
# CONFIG_DEBUG_MEMCARD_INFO is not set
# CONFIG_DEBUG_TIMER is not set
# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_DEBUG_SYMBOLS=y
# CONFIG_DEBUG_SYMBOLS is not set
CONFIG_ARCH_HAVE_CUSTOMOPT=y
CONFIG_DEBUG_NOOPT=y
# CONFIG_DEBUG_NOOPT is not set
# CONFIG_DEBUG_CUSTOMOPT is not set
# CONFIG_DEBUG_FULLOPT is not set
CONFIG_DEBUG_FULLOPT=y
#
# System Type
@ -170,7 +133,6 @@ CONFIG_ARCH_HAVE_FPU=y
# CONFIG_ARCH_HAVE_TRUSTZONE is not set
CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARM_MPU is not set
# CONFIG_DEBUG_HARDFAULT is not set
#
# ARMV7M Configuration Options
@ -236,7 +198,8 @@ CONFIG_ARCH_FAMILY_K64=y
CONFIG_KINETIS_HAVE_I2C1=y
CONFIG_KINETIS_HAVE_I2C2=y
# CONFIG_KINETIS_HAVE_I2C3 is not set
# CONFIG_KINETIS_HAVE_I2C4 is not set
CONFIG_KINETIS_HAVE_SPI1=y
CONFIG_KINETIS_HAVE_SPI2=y
# CONFIG_KINETIS_TRACE is not set
# CONFIG_KINETIS_FLEXBUS is not set
# CONFIG_KINETIS_UART0 is not set
@ -266,6 +229,7 @@ CONFIG_KINETIS_SDHC=y
# CONFIG_KINETIS_FTM0 is not set
# CONFIG_KINETIS_FTM1 is not set
# CONFIG_KINETIS_FTM2 is not set
# CONFIG_KINETIS_FTM3 is not set
# CONFIG_KINETIS_LPTIMER is not set
# CONFIG_KINETIS_RTC is not set
# CONFIG_KINETIS_EWM is not set
@ -525,10 +489,10 @@ CONFIG_DEV_NULL=y
# CONFIG_PWM is not set
# CONFIG_ARCH_HAVE_I2CRESET is not set
# CONFIG_I2C is not set
# CONFIG_SPI is not set
# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set
# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set
# CONFIG_ARCH_HAVE_SPI_BITORDER is not set
# CONFIG_SPI is not set
# CONFIG_I2S is not set
#
@ -616,7 +580,6 @@ CONFIG_STANDARD_SERIAL=y
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
# CONFIG_SERIAL_DMA is not set
# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set
CONFIG_UART1_SERIAL_CONSOLE=y
# CONFIG_OTHER_SERIAL_CONSOLE is not set
@ -676,7 +639,6 @@ CONFIG_SYSLOG_CONSOLE=y
#
# CONFIG_DISABLE_MOUNTPOINT is not set
CONFIG_FS_AUTOMOUNTER=y
CONFIG_FS_AUTOMOUNTER_DEBUG=y
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_PSEUDOFS_SOFTLINKS is not set
CONFIG_FS_READABLE=y
@ -747,13 +709,30 @@ CONFIG_MM_REGIONS=1
#
# Standard C Library Options
#
#
# Standard C I/O
#
# CONFIG_STDIO_DISABLE_BUFFERING is not set
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_DLLFCN is not set
# CONFIG_LIBC_MODLIB is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
CONFIG_LIBC_LONG_LONG=y
# CONFIG_LIBC_SCANSET is not set
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_MEMCPY_VIK is not set
# CONFIG_LIBM is not set
#
# Architecture-Specific Support
#
CONFIG_ARCH_LOWPUTC=y
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_LIBC_ARCH_MEMCPY is not set
# CONFIG_LIBC_ARCH_MEMCMP is not set
# CONFIG_LIBC_ARCH_MEMMOVE is not set
@ -764,41 +743,64 @@ CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBC_ARCH_STRNCPY is not set
# CONFIG_LIBC_ARCH_STRLEN is not set
# CONFIG_LIBC_ARCH_STRNLEN is not set
# CONFIG_LIBC_ARCH_BZERO is not set
# CONFIG_LIBC_ARCH_ELF is not set
# CONFIG_ARMV7M_MEMCPY is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
CONFIG_LIBC_LONG_LONG=y
# CONFIG_LIBC_SCANSET is not set
# CONFIG_LIBC_IOCTL_VARIADIC is not set
# CONFIG_LIBC_WCHAR is not set
# CONFIG_LIBC_LOCALE is not set
#
# stdlib Options
#
CONFIG_LIB_RAND_ORDER=1
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
CONFIG_LIB_HOMEDIR="/"
CONFIG_LIBC_TMPDIR="/tmp"
CONFIG_LIBC_MAX_TMPFILE=32
#
# Program Execution Options
#
# CONFIG_LIBC_EXECFUNCS is not set
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
#
# errno Decode Support
#
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_LIBC_TMPDIR="/tmp"
CONFIG_LIBC_MAX_TMPFILE=32
CONFIG_ARCH_LOWPUTC=y
#
# memcpy/memset Options
#
# CONFIG_MEMSET_OPTSPEED is not set
# CONFIG_LIBC_DLLFCN is not set
# CONFIG_LIBC_MODLIB is not set
# CONFIG_LIBC_WCHAR is not set
# CONFIG_LIBC_LOCALE is not set
#
# Time/Time Zone Support
#
# CONFIG_LIBC_LOCALTIME is not set
# CONFIG_TIME_EXTENDED is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_MEMCPY_VIK is not set
# CONFIG_MEMSET_OPTSPEED is not set
CONFIG_ARCH_HAVE_TLS=y
#
# Thread Local Storage (TLS)
#
# CONFIG_TLS is not set
#
# Network-Related Options
#
# CONFIG_LIBC_IPv4_ADDRCONV is not set
# CONFIG_LIBC_IPv6_ADDRCONV is not set
# CONFIG_LIBC_NETDB is not set
#
# NETDB Support
#
# CONFIG_NETDB_HOSTFILE is not set
# CONFIG_LIBC_IOCTL_VARIADIC is not set
CONFIG_LIB_SENDFILE_BUFSIZE=512
#
# Non-standard Library Support
@ -846,10 +848,10 @@ CONFIG_ARCH_HAVE_TLS=y
# CONFIG_EXAMPLES_NRF24L01TERM is not set
CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXFFS is not set
# CONFIG_EXAMPLES_NXHELLO is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTERM is not set
# CONFIG_EXAMPLES_NXTEXT is not set
@ -866,6 +868,7 @@ CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_SLCD is not set
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_SMP is not set
# CONFIG_EXAMPLES_STAT is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_TIFF is not set

8
drivers/Kconfig
View File

@ -337,14 +337,6 @@ if I2C
source drivers/i2c/Kconfig
endif
menuconfig SPI
bool "SPI Driver Support"
default n
---help---
This selection enables selection of common SPI options. This option
should be enabled by all platforms that support SPI interfaces.
See include/nuttx/spi/spi.h for further SPI driver information.
source drivers/spi/Kconfig
menuconfig I2S

10
drivers/audio/Kconfig
View File

@ -36,11 +36,11 @@ config AUDIO_I2SCHAR_TXTIMEOUT
endif # AUDIO_I2SCHAR
config AUDIO_TONE
bool "Audio Tone Generator using PWM"
default n
depends on PWM && AUDIO_DEVICES
---help---
This driver enables the Audio Tone Generator for NuttX.
bool "Audio Tone Generator using PWM"
default n
depends on PWM && AUDIO_DEVICES
---help---
This driver enables the Audio Tone Generator for NuttX.
if AUDIO_TONE

45
drivers/audio/tone.c
View File

@ -94,6 +94,9 @@ struct tone_upperhalf_s
{
uint8_t crefs; /* The number of times the device has been
* opened */
#ifdef CONFIG_PWM_MULTICHAN
uint8_t channel; /* Output channel that drives the tone. */
#endif
volatile bool started; /* True: pulsed output is being generated */
sem_t exclsem; /* Supports mutual exclusion */
struct pwm_info_s tone; /* Pulsed output for Audio Tone */
@ -146,6 +149,19 @@ static bool g_repeat;
* Private Function Prototypes
****************************************************************************/
static void oneshot_callback(FAR struct oneshot_lowerhalf_s *lower,
FAR void *arg);
static uint32_t note_duration(FAR uint32_t *silence, uint32_t note_length,
uint32_t dots);
static uint32_t rest_duration(uint32_t rest_length, uint32_t dots);
static void start_note(FAR struct tone_upperhalf_s *upper, uint8_t note);
static void stop_note(FAR struct tone_upperhalf_s *upper);
static void start_tune(FAR struct tone_upperhalf_s *upper, const char *tune);
static void next_note(FAR struct tone_upperhalf_s *upper);
static int next_char(void);
static uint8_t next_number(void);
static uint8_t next_dots(void);
static int tone_open(FAR struct file *filep);
static int tone_close(FAR struct file *filep);
static ssize_t tone_read(FAR struct file *filep, FAR char *buffer,
@ -153,10 +169,6 @@ static ssize_t tone_read(FAR struct file *filep, FAR char *buffer,
static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer,
size_t buflen);
static int next_char(void);
static uint8_t next_number(void);
static uint8_t next_dots(void);
static void next_note(FAR struct tone_upperhalf_s *upper);
/****************************************************************************
* Private Data
@ -294,12 +306,17 @@ static void start_note(FAR struct tone_upperhalf_s *upper, uint8_t note)
{
FAR struct pwm_lowerhalf_s *tone = upper->devtone;
upper->tone.frequency = g_notes_freq[note - 1];
upper->tone.duty = 50;
upper->tone.frequency = g_notes_freq[note - 1];
#ifdef CONFIG_PWM_MULTICHAN
upper->tone.channels[0].channel = upper->channel;
upper->tone.channels[0].duty = b16HALF;
#else
upper->tone.duty = b16HALF;
#endif
/* REVISIT: Should check the return value */
tone->ops->start(tone, &upper->tone);
return;
}
/****************************************************************************
@ -311,8 +328,6 @@ static void stop_note(FAR struct tone_upperhalf_s *upper)
FAR struct pwm_lowerhalf_s *tone = upper->devtone;
tone->ops->stop(tone);
return;
}
/****************************************************************************
@ -520,7 +535,6 @@ static void next_note(FAR struct tone_upperhalf_s *upper)
ts.tv_nsec = (unsigned long)nsec;
ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts);
return;
/* Change tempo */
@ -648,7 +662,6 @@ static void next_note(FAR struct tone_upperhalf_s *upper)
/* And arrange a callback when the note should stop */
ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts);
return;
/* Tune looks bad (unexpected EOF, bad character, etc.) */
@ -925,10 +938,15 @@ static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer,
****************************************************************************/
int tone_register(FAR const char *path, FAR struct pwm_lowerhalf_s *tone,
#ifdef CONFIG_PWM_MULTICHAN
int channel,
#endif
FAR struct oneshot_lowerhalf_s *oneshot)
{
FAR struct tone_upperhalf_s *upper;
DEBUGASSERT(path != NULL && tone != NULL);
/* Allocate the upper-half data structure */
upper =
@ -947,6 +965,9 @@ int tone_register(FAR const char *path, FAR struct pwm_lowerhalf_s *tone,
sem_init(&upper->exclsem, 0, 1);
upper->devtone = tone;
upper->oneshot = oneshot;
#ifdef CONFIG_PWM_MULTICHAN
upper->channel = (uint8_t)channel;
#endif
/* Register the PWM device */

8
drivers/spi/Kconfig
View File

@ -15,6 +15,14 @@ config ARCH_HAVE_SPI_BITORDER
bool
default n
menuconfig SPI
bool "SPI Driver Support"
default n
---help---
This selection enables selection of common SPI options. This option
should be enabled by all platforms that support SPI interfaces.
See include/nuttx/spi/spi.h for further SPI driver information.
if SPI
config SPI_SLAVE

13
fs/vfs/fs_fstatfs.c
View File

@ -79,7 +79,7 @@ int fstatfs(int fd, FAR struct statfs *buf)
if ((unsigned int)fd >= CONFIG_NFILE_DESCRIPTORS)
{
/* No networking... it is a bad descriptor in any event */
/* It is a bad, out-of-range descriptor */
set_errno(EBADF);
return ERROR;
@ -103,11 +103,20 @@ int fstatfs(int fd, FAR struct statfs *buf)
inode = filep->f_inode;
DEBUGASSERT(inode != NULL);
/* Check if the file is open */
if (inode == NULL)
{
/* The descriptor does not refer to an open file. */
ret = -EBADF;
}
else
#ifndef CONFIG_DISABLE_MOUNTPOINT
/* The way we handle the stat depends on the type of inode that we
* are dealing with.
*/
#ifndef CONFIG_DISABLE_MOUNTPOINT
if (INODE_IS_MOUNTPT(inode))
{
/* The node is a file system mointpoint. Verify that the mountpoint

2
fs/vfs/fs_read.c
View File

@ -92,7 +92,7 @@ ssize_t file_read(FAR struct file *filep, FAR void *buf, size_t nbytes)
* method?
*/
else if (inode && inode->u.i_ops && inode->u.i_ops->read)
else if (inode != NULL && inode->u.i_ops && inode->u.i_ops->read)
{
/* Yes.. then let it perform the read. NOTE that for the case of the
* mountpoint, we depend on the read methods being identical in

5
include/cxx/cstring
View File

@ -87,6 +87,11 @@ namespace std
// Declared in legacy strings.h
using ::bcmp;
using ::bcopy;
using ::bzero;
using ::index;
using ::rindex;
using ::ffs;
using ::strcasecmp;
using ::strncasecmp;

8
include/nuttx/audio/tone.h
View File

@ -1,7 +1,7 @@
/****************************************************************************
* include/nuttx/audio/tone.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Author: Alan Carvalho de Assis <acassis@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
@ -76,6 +76,9 @@ extern "C"
* filesystem. The recommended convention is to name all PWM drivers
* as "/dev/tone0", "/dev/tone1", etc. where the driver path
* differs only in the "minor" number at the end of the device name.
* channel - The the PWM peripheral supports multiple output channels, then
* this value must be provided to indicate the output channel that drives
* the tone.
* tone - A pointer to an instance of lower half PWM driver tone. This
* instance will be bound to the Audio Tone driver and must persists as
* long as that driver persists.
@ -86,6 +89,9 @@ extern "C"
****************************************************************************/
int tone_register(FAR const char *path, FAR struct pwm_lowerhalf_s *tone,
#ifdef CONFIG_PWM_MULTICHAN
int channel,
#endif
FAR struct oneshot_lowerhalf_s *oneshot);
#undef EXTERN

15
include/nuttx/drivers/pwm.h
View File

@ -66,12 +66,16 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* CONFIG_PWM - Enables because PWM driver support
* CONFIG_PWM_PULSECOUNT - Some hardware will support generation of a fixed
* number of pulses. This might be used, for example to support a stepper
* motor. If the hardware will support a fixed pulse count, then this
* configuration should be set to enable the capability.
* CONFIG_PWM_MULTICHAN - Enables support for multiple output channels per
* timer. If selected, then CONFIG_PWM_NCHANNELS must be provided to
* indicated the maximum number of supported PWM output channels.
* CONFIG_DEBUG_PWM_INFO - This will generate output that can be use to
* debug the PWM driver.
*/
@ -122,6 +126,10 @@
* Public Types
****************************************************************************/
/* If the PWM peripheral supports multiple output channels, then this
* structure describes the output state on one channel.
*/
#ifdef CONFIG_PWM_MULTICHAN
struct pwm_chan_s
{
@ -135,8 +143,11 @@ struct pwm_chan_s
struct pwm_info_s
{
uint32_t frequency; /* Frequency of the pulse train */
#ifdef CONFIG_PWM_MULTICHAN
/* Per-channel output state */
struct pwm_chan_s channels[CONFIG_PWM_NCHANNELS];
#else
ub16_t duty; /* Duty of the pulse train, "1"-to-"0" duration.
* Maximum: 65535/65536 (0x0000ffff)
@ -145,7 +156,7 @@ struct pwm_info_s
uint32_t count; /* The number of pulse to generate. 0 means to
* generate an indefinite number of pulses */
# endif
#endif
#endif /* CONFIG_PWM_MULTICHAN */
};
/* This structure is a set a callback functions used to call from the upper-
@ -184,7 +195,7 @@ struct pwm_ops_s
FAR const struct pwm_info_s *info);
#endif
/* Stop the pulsed output and reset the timer resources*/
/* Stop the pulsed output and reset the timer resources */
CODE int (*stop)(FAR struct pwm_lowerhalf_s *dev);

59
include/strings.h
View File

@ -47,20 +47,24 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Compatibility definitions */
#define bcmp(b1,b2,len) memcmp(b1,b2,(size_t)len)
#define bcopy(b1,b2,len) (void)memmove(b2,b1,len)
#if !defined(CONFIG_HAVE_INLINE) && !defined(__cplusplus)
/* Compatibility definitions
*
* Marked LEGACY in Open Group Base Specifications Issue 6/IEEE Std 1003.1-2004
* Removed from Open Group Base Specifications Issue 7/IEEE Std 1003.1-2008
*/
#ifndef CONFIG_LIBC_ARCH_BZERO
# define bzero(s,n) (void)memset(s,0,n)
#endif
# define bcmp(b1,b2,len) memcmp(b1,b2,(size_t)len)
# define bcopy(b1,b2,len) (void)memmove(b2,b1,len)
# define bzero(s,n) (void)memset(s,0,n)
# define index(s,c) strchr(s,c)
# define rindex(s,c) strrchr(s,c)
#define index(s,c) strchr(s,c)
#define rindex(s,c) strrchr(s,c)
#endif /* !CONFIG_HAVE_INLINE && !__cplusplus */
/****************************************************************************
* Public Function Prototypes
* Inline Functions
****************************************************************************/
#undef EXTERN
@ -72,6 +76,43 @@ extern "C"
#define EXTERN extern
#endif
#if defined(CONFIG_HAVE_INLINE) || defined(__cplusplus)
/* Compatibility inline functions.
*
* Marked LEGACY in Open Group Base Specifications Issue 6/IEEE Std 1003.1-2004
* Removed from Open Group Base Specifications Issue 7/IEEE Std 1003.1-2008
*/
static inline int bcmp(FAR const void *b1, FAR const void *b2, size_t len)
{
return memcmp(b1, b2, len);
}
static inline void bcopy(FAR const void *b1, FAR void *b2, size_t len)
{
(void)memmove(b2, b1, len);
}
static inline void bzero(FAR void *s, size_t len)
{
(void)memset(s, 0, len);
}
static inline FAR char *index(FAR const char *s, int c)
{
return strchr(s, c);
}
static inline FAR char *rindex(FAR const char *s, int c)
{
return strrchr(s, c);
}
#endif /* CONFIG_HAVE_INLINE || __cplusplus */
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
int ffs(int j);
int strcasecmp(FAR const char *, FAR const char *);
int strncasecmp(FAR const char *, FAR const char *, size_t);

4
libc/machine/Kconfig
View File

@ -84,10 +84,6 @@ config LIBC_ARCH_STRNLEN
bool
default n
config LIBC_ARCH_BZERO
bool
default n
config LIBC_ARCH_ELF
bool
default n

5
libc/string/lib_strcasestr.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* libc/string/lib_strstr.c
* libc/string/lib_strcasestr.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use str source and binary forms, with or without
@ -40,6 +40,7 @@
#include <nuttx/config.h>
#include <string.h>
#include <strings.h>
#include <ctype.h>
/****************************************************************************

2
sched/pthread/pthread_mutexlock.c
View File

@ -150,7 +150,7 @@ int pthread_mutex_lock(FAR pthread_mutex_t *mutex)
ret = pthread_takesemaphore((FAR sem_t *)&mutex->sem);
/* If we succussfully obtained the semaphore, then indicate
/* If we successfully obtained the semaphore, then indicate
* that we own it.
*/