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Fix Kconfig style

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Remove spaces from Kconfig files
Add TABs
Replace help => ---help---
This commit is contained in:
simbit18 2024-09-17 13:32:41 +02:00 committed by Xiang Xiao
parent 237087f61a
commit 583f025422
6 changed files with 102 additions and 100 deletions
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138
arch/arm/src/armv8-r/Kconfig
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@ -92,134 +92,136 @@ config ARMV8R_NONMASKABLE_FIQ
default n default n
config ARMV8R_HAVE_L2CC config ARMV8R_HAVE_L2CC
bool bool
default n default n
---help--- ---help---
Selected by the configuration tool if the architecture supports any Selected by the configuration tool if the architecture supports any
kind of L2 cache. kind of L2 cache.
config ARMV8R_HAVE_L2CC_PL310 config ARMV8R_HAVE_L2CC_PL310
bool bool
default n default n
select ARMV8R_HAVE_L2CC select ARMV8R_HAVE_L2CC
---help--- ---help---
Set by architecture-specific code if the hardware supports a PL310 Set by architecture-specific code if the hardware supports a PL310
r3p2 L2 cache (only version r3p2 is supported). r3p2 L2 cache (only version r3p2 is supported).
if ARMV8R_HAVE_L2CC if ARMV8R_HAVE_L2CC
menu "L2 Cache Configuration" menu "L2 Cache Configuration"
config ARMV8R_L2CC_PL310 config ARMV8R_L2CC_PL310
bool "ARMv8-R L2CC P310 Support" bool "ARMv8-R L2CC P310 Support"
default n default n
depends on ARMV8R_HAVE_L2CC_PL310 depends on ARMV8R_HAVE_L2CC_PL310
select ARCH_L2CACHE select ARCH_L2CACHE
---help--- ---help---
Enable the 2 Cache Controller (L2CC) is based on the L2CC-PL310 ARM Enable the 2 Cache Controller (L2CC) is based on the L2CC-PL310 ARM
multi-way cache macrocell, version r3p2. The addition of an on-chip multi-way cache macrocell, version r3p2. The addition of an on-chip
secondary cache, also referred to as a Level 2 or L2 cache, is a secondary cache, also referred to as a Level 2 or L2 cache, is a
method of improving the system performance when significant memory method of improving the system performance when significant memory
traffic is generated by the processor. traffic is generated by the processor.
if ARCH_L2CACHE if ARCH_L2CACHE
if ARMV8R_L2CC_PL310 if ARMV8R_L2CC_PL310
config PL310_LOCKDOWN_BY_MASTER config PL310_LOCKDOWN_BY_MASTER
bool "PL310 Lockdown by Master" bool "PL310 Lockdown by Master"
default n default n
config PL310_LOCKDOWN_BY_LINE config PL310_LOCKDOWN_BY_LINE
bool "PL310 Lockdown by Line" bool "PL310 Lockdown by Line"
default n default n
config PL310_ADDRESS_FILTERING config PL310_ADDRESS_FILTERING
bool "PL310 Address Filtering by Line" bool "PL310 Address Filtering by Line"
default n default n
config PL310_TRCR config PL310_TRCR
bool "PL310 TRCR set by usr" bool "PL310 TRCR set by usr"
default n default n
if PL310_TRCR if PL310_TRCR
config PL310_TRCR_TSETLAT config PL310_TRCR_TSETLAT
int "PL310 TRCR setup latency" int "PL310 TRCR setup latency"
default 1 default 1
config PL310_TRCR_TRDLAT config PL310_TRCR_TRDLAT
int "PL310 TRCR read access latency" int "PL310 TRCR read access latency"
default 1 default 1
config PL310_TRCR_TWRLAT config PL310_TRCR_TWRLAT
int "PL310 TRCR write access latency" int "PL310 TRCR write access latency"
default 1 default 1
endif # PL310_TRCR endif # PL310_TRCR
config PL310_DRCR config PL310_DRCR
bool "PL310 DRCR set by usr" bool "PL310 DRCR set by usr"
default n default n
if PL310_DRCR if PL310_DRCR
config PL310_DRCR_DSETLAT config PL310_DRCR_DSETLAT
int "PL310 DRCR setup latency" int "PL310 DRCR setup latency"
default 1 default 1
config PL310_DRCR_DRDLAT config PL310_DRCR_DRDLAT
int "PL310 DRCR read access latency" int "PL310 DRCR read access latency"
default 1 default 1
config PL310_DRCR_DWRLAT config PL310_DRCR_DWRLAT
int "PL310 DRCR write access latency" int "PL310 DRCR write access latency"
default 1 default 1
endif # PL310_DRCR endif # PL310_DRCR
endif # ARMV8R_L2CC_PL310 endif # ARMV8R_L2CC_PL310
choice choice
prompt "L2 Cache Associativity" prompt "L2 Cache Associativity"
default ARMV8R_ASSOCIATIVITY_8WAY default ARMV8R_ASSOCIATIVITY_8WAY
depends on ARCH_L2CACHE depends on ARCH_L2CACHE
---help--- ---help---
This choice specifies the associativity of L2 cache in terms of the This choice specifies the associativity of L2 cache in terms of the
number of ways. This value could be obtained by querying cache number of ways. This value could be obtained by querying cache
configuration registers. However, by defining a configuration configuration registers. However, by defining a configuration
setting instead, we can avoid using RAM memory to hold information setting instead, we can avoid using RAM memory to hold information
about properties of the memory. about properties of the memory.
config ARMV8R_ASSOCIATIVITY_8WAY config ARMV8R_ASSOCIATIVITY_8WAY
bool "8-Way Associativity" bool "8-Way Associativity"
config ARMV8R_ASSOCIATIVITY_16WAY config ARMV8R_ASSOCIATIVITY_16WAY
bool "16-Way Associativity" bool "16-Way Associativity"
endchoice # L2 Cache Associativity endchoice # L2 Cache Associativity
choice choice
prompt "L2 Cache Way Size" prompt "L2 Cache Way Size"
default ARMV8R_WAYSIZE_16KB default ARMV8R_WAYSIZE_16KB
depends on ARCH_L2CACHE depends on ARCH_L2CACHE
---help--- ---help---
This choice specifies size of each way. This value can be obtained This choice specifies size of each way. This value can be obtained
by querying cache configuration registers. However, by defining a by querying cache configuration registers. However, by defining a
configuration setting instead, we can avoid using RAM memory to hold configuration setting instead, we can avoid using RAM memory to hold
information information
config ARMV8R_WAYSIZE_16KB config ARMV8R_WAYSIZE_16KB
bool "16 KiB" bool "16 KiB"
config ARMV8R_WAYSIZE_32KB config ARMV8R_WAYSIZE_32KB
bool "32 KiB" bool "32 KiB"
config ARMV8R_WAYSIZE_64KB config ARMV8R_WAYSIZE_64KB
bool "64 KiB" bool "64 KiB"
config ARMV8R_WAYSIZE_128KB config ARMV8R_WAYSIZE_128KB
bool "128 KiB" bool "128 KiB"
config ARMV8R_WAYSIZE_256KB config ARMV8R_WAYSIZE_256KB
bool "256 KiB" bool "256 KiB"
config ARMV8R_WAYSIZE_512KB config ARMV8R_WAYSIZE_512KB
bool "512 KiB" bool "512 KiB"
endchoice # L2 Cache Way Size endchoice # L2 Cache Way Size
endif # ARCH_L2CACHE endif # ARCH_L2CACHE

6
boards/Kconfig
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@ -1112,9 +1112,9 @@ config ARCH_BOARD_MIZAR32A
depends on ARCH_CHIP_AT32UC3A0512 depends on ARCH_CHIP_AT32UC3A0512
select ARCH_HAVE_LEDS select ARCH_HAVE_LEDS
---help--- ---help---
This is a port of NuttX for the Mizar32-A board designed by SimpleMachines, This is a port of NuttX for the Mizar32-A board designed by SimpleMachines,
Italy. The board is based on the AT32UC3A0512 MCU and uses avr32-gcc Italy. The board is based on the AT32UC3A0512 MCU and uses avr32-gcc
version 4.4.7 for its build on GNU/Linux. version 4.4.7 for its build on GNU/Linux.
config ARCH_BOARD_MOTEINO_MEGA config ARCH_BOARD_MOTEINO_MEGA
bool "LowPowerLab MoteinoMEGA" bool "LowPowerLab MoteinoMEGA"

6
boards/arm/csk6/csk6011a-nano/Kconfig
View File

@ -8,9 +8,9 @@ choice
prompt "Console Mode" prompt "Console Mode"
default CSK6_CONSOLE_UART0 default CSK6_CONSOLE_UART0
config CSK6_CONSOLE_UART0 config CSK6_CONSOLE_UART0
bool "USART0 is a console port" bool "USART0 is a console port"
select USART0_SERIALDRIVER select USART0_SERIALDRIVER
#TODO add support other port #TODO add support other port
endchoice # USART0 Mode endchoice # USART0 Mode

38
drivers/sensors/Kconfig
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@ -1534,7 +1534,7 @@ config SHT4X_I2C_FREQUENCY
config SHT4X_I2C_ADDR config SHT4X_I2C_ADDR
hex "SHT4X I2C address" hex "SHT4X I2C address"
default 0x44 default 0x44
range 0x44 0x46 range 0x44 0x46
---help--- ---help---
Enables debug features for the SHT4X Enables debug features for the SHT4X
@ -1718,34 +1718,34 @@ config SENSORS_LTR308_THREAD_STACKSIZE
endif # SENSORS_LTR308 endif # SENSORS_LTR308
config SENSORS_AMG88XX config SENSORS_AMG88XX
bool "AMG88xx infrared array sensor" bool "AMG88xx infrared array sensor"
default n default n
select I2C select I2C
---help--- ---help---
Enable driver support for AMG88xx infrared array sensor. Enable driver support for AMG88xx infrared array sensor.
if SENSORS_AMG88XX if SENSORS_AMG88XX
choice choice
prompt "AMG88xx AD_SELECT value" prompt "AMG88xx AD_SELECT value"
default SENSOR_AMG88XX_AD_SELECT_0 default SENSOR_AMG88XX_AD_SELECT_0
---help--- ---help---
AD SELECT sets the amg88xx i2c address AD SELECT sets the amg88xx i2c address
AD_SELECT tied to GND -> sensor address 0x68 AD_SELECT tied to GND -> sensor address 0x68
AD_SELECT tied to VCC -> sensor address 0x69 AD_SELECT tied to VCC -> sensor address 0x69
config SENSOR_AMG88XX_AD_SELECT_0 config SENSOR_AMG88XX_AD_SELECT_0
bool "AD_SELECT tied to GND" bool "AD_SELECT tied to GND"
config SENSOR_AMG88XX_AD_SELECT_1 config SENSOR_AMG88XX_AD_SELECT_1
bool "AD_SELECT tied to VCC" bool "AD_SELECT tied to VCC"
endchoice endchoice
config SENSOR_AMG88XX_ADDR config SENSOR_AMG88XX_ADDR
hex hex
default 0x68 if SENSOR_AMG88XX_AD_SELECT_0 default 0x68 if SENSOR_AMG88XX_AD_SELECT_0
default 0x69 if SENSOR_AMG88XX_AD_SELECT_1 default 0x69 if SENSOR_AMG88XX_AD_SELECT_1
endif # SENSORS_AMG88XX endif # SENSORS_AMG88XX

4
fs/v9fs/Kconfig
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@ -13,8 +13,8 @@ config FS_V9FS
if FS_V9FS if FS_V9FS
config V9FS_DEFAULT_MSIZE config V9FS_DEFAULT_MSIZE
int "V9FS Default message max size" int "V9FS Default message max size"
default 65536 default 65536
config V9FS_VIRTIO_9P config V9FS_VIRTIO_9P
bool "Virtio 9P support" bool "Virtio 9P support"

8
sched/Kconfig
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@ -1979,7 +1979,7 @@ config PID_INITIAL_COUNT
config SCHED_EVENTS config SCHED_EVENTS
bool "Schedule Event objects" bool "Schedule Event objects"
default n default n
help ---help---
This option enables event objects. Threads may wait on event This option enables event objects. Threads may wait on event
objects for specific events, but both threads and ISRs may deliver objects for specific events, but both threads and ISRs may deliver
events to event objects. events to event objects.