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Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem.

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This commit is contained in:
Gregory Nutt 2016-12-21 08:04:15 -06:00
parent 1b7162a0db
commit 588d2b506f
1 changed files with 5 additions and 2 deletions
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7
arch/xtensa/include/xtensa/xtensa_coproc.h
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@ -153,7 +153,8 @@ static inline uint32_t xtensa_get_cpenable(void)
__asm__ __volatile__
(
"rsr %0, CPENABLE" : "=r"(cpenable)
"\trsr %0, CPENABLE\n"
: "=r"(cpenable)
);
return cpenable;
@ -165,7 +166,9 @@ static inline void xtensa_set_cpenable(uint32_t cpenable)
{
__asm__ __volatile__
(
"wsr %0, PS" : : "r"(cpenable)
"\twsr %0, CPENABLE\n"
"\trsync\n"
: : "r"(cpenable)
);
}