Typo fix
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@ -58,8 +58,9 @@
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#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator (not populated) */
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#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator (not populated) */
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/* PLL Configuration. NOTE: Only even frequency crystals are supported that will
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/* PLL Configuration. NOTE: Only even frequency crystals are supported that will
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* produce a 2MHz reference clock to the PLL. The rated speed is 72MHz, but can
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* produce a 2MHz reference clock to the PLL. The rated speed for the MK20DX256VLH7
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* be overclocked at 96MHz
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* is 72MHz and 50MHz for the MK20DX128VLH5, but according to the PJRC website,
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* both can be overclocked at 96MHz
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*
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*
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* 48MHz (rated 50MHz)
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* 48MHz (rated 50MHz)
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*
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*
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@ -79,7 +80,7 @@
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* MCG Frequency: PLLOUT = 96MHz
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* MCG Frequency: PLLOUT = 96MHz
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*/
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*/
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#if defiend(CONFIG_TEENSY_3X_OVERCLOCK)
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#if defined(CONFIG_TEENSY_3X_OVERCLOCK)
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/* PLL Configuration */
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/* PLL Configuration */
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# define BOARD_PRDIV 1 /* PLL External Reference Divider */
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# define BOARD_PRDIV 1 /* PLL External Reference Divider */
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