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merge from nuttx

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This commit is contained in:
Lok Tep 2015-10-08 22:57:34 +02:00
commit 5983019a45
831 changed files with 13829 additions and 14037 deletions
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2
arch/arm/include/a1x/a10_irq.h
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@ -197,7 +197,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/arch.h
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@ -187,7 +187,7 @@ typedef struct save_addrenv_s save_addrenv_t;
#endif
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/arm/irq.h
View File

@ -206,7 +206,7 @@ static inline void irqrestore(irqstate_t flags)
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/arm/syscall.h
View File

@ -219,7 +219,7 @@ static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1,
}
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/armv6-m/irq.h
View File

@ -341,7 +341,7 @@ static inline void setcontrol(uint32_t control)
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/armv6-m/syscall.h
View File

@ -242,7 +242,7 @@ static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1,
}
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/armv7-a/irq.h
View File

@ -387,7 +387,7 @@ static inline void irqrestore(irqstate_t flags)
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__

2
arch/arm/include/armv7-a/syscall.h
View File

@ -219,7 +219,7 @@ static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1,
}
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/armv7-m/irq.h
View File

@ -357,7 +357,7 @@ static inline void setcontrol(uint32_t control)
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/armv7-m/irq_cmnvector.h
View File

@ -157,7 +157,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/armv7-m/irq_lazyfpu.h
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@ -175,7 +175,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/armv7-m/syscall.h
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@ -242,7 +242,7 @@ static inline uintptr_t sys_call6(unsigned int nbr, uintptr_t parm1,
}
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/c5471/irq.h
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@ -80,7 +80,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/calypso/irq.h
View File

@ -35,7 +35,7 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************/
****************************************************************************/
#ifndef __INCLUDE_NUTTX_IRQ_H
#error "This file should never be included directly! Use <nuttx/irq.h>"

2
arch/arm/include/dm320/irq.h
View File

@ -109,7 +109,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

24
arch/arm/include/efm32/efm32g_irq.h
View File

@ -1,4 +1,4 @@
/*****************************************************************************
/****************************************************************************
* arch/arm/include/efm32s/efm32g_irq.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
@ -31,7 +31,7 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
@ -40,13 +40,13 @@
#ifndef __ARCH_ARM_INCLUDE_EFM32G_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32G_IRQ_H
/*****************************************************************************
/****************************************************************************
* Included Files
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Pre-processor Definitions
*****************************************************************************/
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
@ -91,13 +91,13 @@
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS+30)
/*****************************************************************************
/****************************************************************************
* Public Types
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Public Data
*****************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -108,9 +108,9 @@ extern "C"
#define EXTERN extern
#endif
/*****************************************************************************
/****************************************************************************
* Public Functions
*****************************************************************************/
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

24
arch/arm/include/efm32/efm32gg_irq.h
View File

@ -1,4 +1,4 @@
/*****************************************************************************
/****************************************************************************
* arch/arm/include/efm32s/efm32gg_irq.h
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
@ -31,7 +31,7 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
@ -40,13 +40,13 @@
#ifndef __ARCH_ARM_INCLUDE_EFM32GG_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32GG_IRQ_H
/*****************************************************************************
/****************************************************************************
* Included Files
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Pre-processor Definitions
*****************************************************************************/
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
@ -100,13 +100,13 @@
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS+39)
/*****************************************************************************
/****************************************************************************
* Public Types
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Public Data
*****************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -117,9 +117,9 @@ extern "C"
#define EXTERN extern
#endif
/*****************************************************************************
/****************************************************************************
* Public Functions
*****************************************************************************/
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

24
arch/arm/include/efm32/efm32tg_irq.h
View File

@ -1,4 +1,4 @@
/*****************************************************************************
/****************************************************************************
* arch/arm/include/efm32s/efm32tg_irq.h
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
@ -31,7 +31,7 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
@ -40,13 +40,13 @@
#ifndef __ARCH_ARM_INCLUDE_EFM32TG_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32TG_IRQ_H
/*****************************************************************************
/****************************************************************************
* Included Files
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Pre-processor Definitions
*****************************************************************************/
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map
* directly to bits in the NVIC. This does, however, waste several words of
@ -84,13 +84,13 @@
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS+23)
/*****************************************************************************
/****************************************************************************
* Public Types
*****************************************************************************/
****************************************************************************/
/*****************************************************************************
/****************************************************************************
* Public Data
*****************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@ -101,9 +101,9 @@ extern "C"
#define EXTERN extern
#endif
/*****************************************************************************
/****************************************************************************
* Public Functions
*****************************************************************************/
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus

2
arch/arm/include/imx/irq.h
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@ -139,7 +139,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/irq.h
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@ -80,7 +80,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/lpc11xx/irq.h
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@ -124,7 +124,7 @@ typedef void (*vic_vector_t)(uint32_t *regs);
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/lpc17xx/irq.h
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@ -99,7 +99,7 @@ typedef void (*vic_vector_t)(uint32_t *regs);
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/lpc17xx/lpc176x_irq.h
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@ -235,7 +235,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/lpc17xx/lpc178x_irq.h
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@ -281,7 +281,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/lpc214x/irq.h
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@ -100,7 +100,7 @@ typedef void (*vic_vector_t)(uint32_t *regs);
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/lpc2378/irq.h
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@ -122,7 +122,7 @@ typedef void (*vic_vector_t)(uint32_t *regs);
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/lpc31xx/irq.h
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@ -93,7 +93,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

124
arch/arm/include/lpc43xx/chip.h
View File

@ -134,8 +134,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4310FET100)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
@ -159,8 +160,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (4) /* Four ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (4) /* Four ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4320FBD144)
# warning "Data sheet and user manual are consistement for the LPC4320"
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
@ -185,8 +187,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4320FET100)
# warning "Data sheet and user manual are consistement for the LPC4320"
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
@ -211,8 +214,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (4) /* Four ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (4) /* Four ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4330FBD144)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
@ -236,8 +240,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET100)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
@ -261,8 +266,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (4) /* Four ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (4) /* Four ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET180)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
@ -286,8 +292,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4330FET256)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
@ -311,8 +318,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
@ -336,8 +344,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4350FET180)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
@ -361,8 +370,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4350FET256)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
@ -386,8 +396,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4353FBD208)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
@ -411,8 +422,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET180)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
@ -436,8 +448,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET256)
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (256*1025)
@ -461,8 +474,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET180)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
@ -486,8 +500,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4357FBD208)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
@ -511,8 +526,9 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET256)
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1025)
@ -536,15 +552,16 @@
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (8) /* Eight ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4370FET100)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM (plus 18Kb for Cortex-M0)*/
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
# define LPC43_AHBSRAM_BANK0_SIZE (32*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (16*1024)
# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
# undef LPC43_NLCD /* No LCD controller */
@ -559,10 +576,37 @@
# define LPC43_NTIMERS (4) /* Four Timers */
# define LPC43_NI2C (2) /* Two I2C controllers */
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NCAN (2) /* Two C-CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC_CHANNELS (4) /* Four ADC channels */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels (per ADC)*/
# define LPC43_NADC12 (1) /* ONne 12-bit ADC controllers (ADCHS)*/
#elif defined(CONFIG_ARCH_CHIP_LPC4370FET256)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)
# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM (plus 18Kb for Cortex-M0)*/
# define LPC43_LOCSRAM_BANK1_SIZE (72*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (32*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (16*1024)
# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
# define LPC43_EEPROM_SIZE (0) /* No EEPROM */
# define LPC43_NLCD (1) /* One LCD controller */
# define LPC43_ETHERNET (1) /* One Ethernet controller */
# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
# define LPC43_USB1 (1) /* Have USB1 (Host, Device) */
# define LPC43_USB1_ULPI (1) /* Have USB1 (Host, Device) with ULPI I/F */
# define LPC43_MCPWM (1) /* One PWM interface */
# define LPC43_QEI (1) /* One Quadrature Encoder interface */
# define LPC43_NUSARTS (4) /* Three USARTs + 1 UART */
# define LPC43_NSSP (2) /* Two SSP controllers */
# define LPC43_NTIMERS (4) /* Four Timers */
# define LPC43_NI2C (2) /* Two I2C controllers */
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two C-CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels (per ADC)*/
# define LPC43_NADC12 (1) /* ONne 12-bit ADC controllers (ADCHS)*/
>>>>>>> remotes/nuttx/arch/master
#else
# error "Unsupported LPC43xx chip"
#endif

2
arch/arm/include/lpc43xx/irq.h
View File

@ -201,7 +201,7 @@ typedef void (*vic_vector_t)(uint32_t *regs);
********************************************************************************************/
/********************************************************************************************
* Public Variables
* Public Data
********************************************************************************************/
/********************************************************************************************

2
arch/arm/include/moxart/irq.h
View File

@ -57,7 +57,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/sam34/sam3u_irq.h
View File

@ -251,7 +251,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/sam34/sam3x_irq.h
View File

@ -406,7 +406,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/sam34/sam4cm_irq.h
View File

@ -280,7 +280,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
#ifndef __ASSEMBLY__

2
arch/arm/include/sam34/sam4e_irq.h
View File

@ -314,7 +314,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/sam34/sam4l_irq.h
View File

@ -312,7 +312,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/sam34/sam4s_irq.h
View File

@ -262,7 +262,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/sama5/sama5d2_irq.h
View File

@ -399,7 +399,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/sama5/sama5d3_irq.h
View File

@ -371,7 +371,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/sama5/sama5d4_irq.h
View File

@ -414,7 +414,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/samdl/samd20_irq.h
View File

@ -117,7 +117,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

2
arch/arm/include/samv7/samv71_irq.h
View File

@ -413,7 +413,7 @@
****************************************************************************************/
/****************************************************************************************
* Public Variables
* Public Data
****************************************************************************************/
/****************************************************************************************

44
arch/arm/include/stm32/dma2d.h
View File

@ -1,4 +1,4 @@
/*******************************************************************************
/****************************************************************************
* arch/arm/src/include/stm32/dma2d.h
*
* Copyright (C) 2015 Marco Krahl. All rights reserved.
@ -31,26 +31,26 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32_DMA2D_H
#define __ARCH_ARM_INCLUDE_STM32_DMA2D_H
/*******************************************************************************
/****************************************************************************
* Included Files
******************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <nuttx/video/fb.h>
/*******************************************************************************
/****************************************************************************
* Pre-processor Definitions
******************************************************************************/
****************************************************************************/
/*******************************************************************************
/****************************************************************************
* Public Types
******************************************************************************/
****************************************************************************/
struct ltdc_area_s; /* see arch/chip/ltdc.h */
@ -322,15 +322,15 @@ struct dma2d_layer_s
uint32_t color);
};
/*******************************************************************************
/****************************************************************************
* Public Data
******************************************************************************/
****************************************************************************/
/*******************************************************************************
/****************************************************************************
* Public Functions
******************************************************************************/
****************************************************************************/
/*******************************************************************************
/****************************************************************************
* Name: up_dma2dgetlayer
*
* Description:
@ -343,11 +343,11 @@ struct dma2d_layer_s
* Reference to the dma2d layer control structure on success or Null if no
* related exist.
*
******************************************************************************/
****************************************************************************/
FAR struct dma2d_layer_s * up_dma2dgetlayer(int lid);
/******************************************************************************
/****************************************************************************
* Name: up_dma2dcreatelayer
*
* Description:
@ -365,13 +365,13 @@ FAR struct dma2d_layer_s * up_dma2dgetlayer(int lid);
* -ENOMEM if no memory available or exceeds
* CONFIG_STM32_DMA2D_NLAYERS
*
******************************************************************************/
****************************************************************************/
FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
fb_coord_t height,
uint8_t fmt);
/******************************************************************************
/****************************************************************************
* Name: up_dma2dremovelayer
*
* Description:
@ -384,11 +384,11 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
* On success - OK
* On error - -EINVAL
*
*****************************************************************************/
****************************************************************************/
int up_dma2dremovelayer(FAR struct dma2d_layer_s *layer);
/******************************************************************************
/****************************************************************************
* Name: up_dma2dinitialize
*
* Description:
@ -398,17 +398,17 @@ int up_dma2dremovelayer(FAR struct dma2d_layer_s *layer);
* OK - On success
* An error if initializing failed.
*
******************************************************************************/
****************************************************************************/
int up_dma2dinitialize(void);
/******************************************************************************
/****************************************************************************
* Name: up_dma2duninitialize
*
* Description:
* Uninitialize the dma2d controller
*
******************************************************************************/
****************************************************************************/
void up_dma2duninitialize(void);

28
arch/arm/include/stm32/ltdc.h
View File

@ -1,4 +1,4 @@
/*******************************************************************************
/****************************************************************************
* arch/arm/src/include/stm32/ltdc.h
*
* Copyright (C) 2014-2015 Marco Krahl. All rights reserved.
@ -31,27 +31,27 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32_LTDC_H
#define __ARCH_ARM_INCLUDE_STM32_LTDC_H
/*******************************************************************************
/****************************************************************************
* Included Files
******************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <nuttx/video/fb.h>
#ifdef CONFIG_STM32_LTDC
/*******************************************************************************
/****************************************************************************
* Pre-processor Definitions
******************************************************************************/
****************************************************************************/
/*******************************************************************************
/****************************************************************************
* Public Types
******************************************************************************/
****************************************************************************/
struct dma2d_layer_s; /* see arch/chip/dma2d.h */
@ -565,15 +565,15 @@ struct ltdc_layer_s
#endif
};
/*******************************************************************************
/****************************************************************************
* Public Data
******************************************************************************/
****************************************************************************/
/*******************************************************************************
/****************************************************************************
* Public Functions
******************************************************************************/
****************************************************************************/
/*******************************************************************************
/****************************************************************************
* Name: up_ltdcgetlayer
*
* Description:
@ -586,7 +586,7 @@ struct ltdc_layer_s
* Reference to the layer control structure on success or Null if parameter
* invalid.
*
******************************************************************************/
****************************************************************************/
FAR struct ltdc_layer_s *up_ltdcgetlayer(int lid);
#endif /* CONFIG_STM32_LTDC */
#endif /* __ARCH_ARM_INCLUDE_STM32_LTDC_H */

2
arch/arm/include/syscall.h
View File

@ -70,7 +70,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/include/types.h
View File

@ -101,7 +101,7 @@ typedef unsigned int irqstate_t;
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Global Function Prototypes
* Public Function Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_TYPES_H */

8
arch/arm/src/a1x/a1x_boot.c
View File

@ -81,7 +81,7 @@
****************************************************************************/
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
extern uint32_t _vector_start; /* Beginning of vector block */
@ -268,9 +268,9 @@ static void a1x_copyvectorblock(void)
* 0xffff0000)
*/
src = (uint32_t*)&_vector_start;
end = (uint32_t*)&_vector_end;
dest = (uint32_t*)(A1X_VECTOR_VSRAM + VECTOR_TABLE_OFFSET);
src = (uint32_t *)&_vector_start;
end = (uint32_t *)&_vector_end;
dest = (uint32_t *)(A1X_VECTOR_VSRAM + VECTOR_TABLE_OFFSET);
while (src < end)
{

8
arch/arm/src/a1x/a1x_irq.c
View File

@ -226,10 +226,10 @@ uint32_t *arm_decodeirq(uint32_t *regs)
#if 0 /* Use PEND registers instead */
uint32_t regval;
/* During initialization, the BASE address register was set to zero.
* Therefore, when we read the VECTOR address register, we get the IRQ number
* shifted left by two.
*/
/* During initialization, the BASE address register was set to zero.
* Therefore, when we read the VECTOR address register, we get the IRQ number
* shifted left by two.
*/
regval = getreg32(A1X_INTC_VECTOR);

4
arch/arm/src/a1x/a1x_irq.h
View File

@ -73,9 +73,9 @@ extern "C"
#define EXTERN extern
#endif
/***************************************************************************
/****************************************************************************
* Public Function Prototypes
***************************************************************************/
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)

56
arch/arm/src/a1x/a1x_lowputc.c
View File

@ -1,4 +1,4 @@
/**************************************************************************
/****************************************************************************
* arch/arm/src/a1x/a1x_lowputc.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
@ -31,11 +31,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
**************************************************************************/
****************************************************************************/
/**************************************************************************
/****************************************************************************
* Included Files
**************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -51,9 +51,9 @@
#include "chip/a1x_uart.h"
#include "a1x_pio.h"
/**************************************************************************
/****************************************************************************
* Pre-processor Definitions
**************************************************************************/
****************************************************************************/
/* Select UART parameters for the selected console */
@ -166,37 +166,37 @@
#define CONSOLE_DL (A1X_SCLK / (CONSOLE_BAUD << 4))
/**************************************************************************
/****************************************************************************
* Private Types
**************************************************************************/
****************************************************************************/
/**************************************************************************
/****************************************************************************
* Private Function Prototypes
**************************************************************************/
****************************************************************************/
/**************************************************************************
* Global Variables
**************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/**************************************************************************
/****************************************************************************
* Private Variables
**************************************************************************/
****************************************************************************/
/**************************************************************************
/****************************************************************************
* Private Functions
**************************************************************************/
****************************************************************************/
/**************************************************************************
/****************************************************************************
* Public Functions
**************************************************************************/
****************************************************************************/
/**************************************************************************
/****************************************************************************
* Name: up_lowputc
*
* Description:
* Output one byte on the serial console
*
**************************************************************************/
****************************************************************************/
void up_lowputc(char ch)
{
@ -211,7 +211,7 @@ void up_lowputc(char ch)
#endif
}
/**************************************************************************
/****************************************************************************
* Name: a1x_lowsetup
*
* Description:
@ -219,7 +219,7 @@ void up_lowputc(char ch)
* console. Its purpose is to get the console output available as soon
* as possible.
*
**************************************************************************/
****************************************************************************/
void a1x_lowsetup(void)
{
@ -264,15 +264,15 @@ void a1x_lowsetup(void)
/* Clear fifos */
putreg32(UART_FCR_RFIFOR|UART_FCR_XFIFOR, CONSOLE_BASE+A1X_UART_FCR_OFFSET);
putreg32(UART_FCR_RFIFOR | UART_FCR_XFIFOR, CONSOLE_BASE + A1X_UART_FCR_OFFSET);
/* Set trigger */
putreg32(UART_FCR_FIFOE|UART_FCR_RT_HALF, CONSOLE_BASE+A1X_UART_FCR_OFFSET);
putreg32(UART_FCR_FIFOE | UART_FCR_RT_HALF, CONSOLE_BASE + A1X_UART_FCR_OFFSET);
/* Set up the LCR and set DLAB=1 */
putreg32(CONSOLE_LCR_VALUE|UART_LCR_DLAB, CONSOLE_BASE+A1X_UART_LCR_OFFSET);
putreg32(CONSOLE_LCR_VALUE | UART_LCR_DLAB, CONSOLE_BASE + A1X_UART_LCR_OFFSET);
/* Set the BAUD divisor */
@ -285,8 +285,8 @@ void a1x_lowsetup(void)
/* Configure the FIFOs */
putreg32(UART_FCR_RT_HALF|UART_FCR_XFIFOR|UART_FCR_RFIFOR|UART_FCR_FIFOE,
CONSOLE_BASE+A1X_UART_FCR_OFFSET);
putreg32(UART_FCR_RT_HALF | UART_FCR_XFIFOR | UART_FCR_RFIFOR | UART_FCR_FIFOE,
CONSOLE_BASE + A1X_UART_FCR_OFFSET);
#endif
#endif /* HAVE_UART_DEVICE */
}

8
arch/arm/src/a1x/a1x_pio.c
View File

@ -67,7 +67,7 @@
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: a1x_pio_pin
@ -154,9 +154,9 @@ static int a1x_pio_interrupt(int irq, void *context)
pending >>= 2;
}
/* Check for pending interrupts in any of the last bits */
/* Check for pending interrupts in any of the last bits */
else
else
{
if ((pending & 0x00000001) == 0)
{
@ -173,7 +173,7 @@ static int a1x_pio_interrupt(int irq, void *context)
#endif
/****************************************************************************
* Global Functions
* Public Functions
****************************************************************************/
/****************************************************************************

49
arch/arm/src/a1x/a1x_serial.c
View File

@ -948,17 +948,17 @@ static inline uint32_t a1x_uartdl(uint32_t baud)
static int up_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint16_t dl;
uint32_t lcr;
/* Clear fifos */
up_serialout(priv, A1X_UART_FCR_OFFSET, (UART_FCR_RFIFOR|UART_FCR_XFIFOR));
up_serialout(priv, A1X_UART_FCR_OFFSET, (UART_FCR_RFIFOR | UART_FCR_XFIFOR));
/* Set trigger */
up_serialout(priv, A1X_UART_FCR_OFFSET, (UART_FCR_FIFOE|UART_FCR_RT_HALF));
up_serialout(priv, A1X_UART_FCR_OFFSET, (UART_FCR_FIFOE | UART_FCR_RT_HALF));
/* Set up the IER */
@ -1019,7 +1019,8 @@ static int up_setup(struct uart_dev_s *dev)
/* Configure the FIFOs */
up_serialout(priv, A1X_UART_FCR_OFFSET,
(UART_FCR_RT_HALF|UART_FCR_XFIFOR|UART_FCR_RFIFOR|UART_FCR_FIFOE));
(UART_FCR_RT_HALF | UART_FCR_XFIFOR | UART_FCR_RFIFOR |
UART_FCR_FIFOE));
/* Enable Auto-Flow Control in the Modem Control Register */
@ -1041,7 +1042,7 @@ static int up_setup(struct uart_dev_s *dev)
static void up_shutdown(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_disableuartint(priv, NULL);
}
@ -1062,7 +1063,7 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret;
/* Attach and enable the IRQ */
@ -1070,11 +1071,11 @@ static int up_attach(struct uart_dev_s *dev)
ret = irq_attach(priv->irq, priv->handler);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
up_enable_irq(priv->irq);
up_enable_irq(priv->irq);
}
return ret;
@ -1092,7 +1093,7 @@ static int up_attach(struct uart_dev_s *dev)
static void up_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_disable_irq(priv->irq);
irq_detach(priv->irq);
}
@ -1115,7 +1116,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
uint32_t status;
int passes;
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,
* until we have been looping for a long time.
@ -1268,7 +1269,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret = OK;
switch (cmd)
@ -1276,7 +1277,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
case TIOCSERGSTRUCT:
{
struct up_dev_s *user = (struct up_dev_s*)arg;
struct up_dev_s *user = (struct up_dev_s *)arg;
if (!user)
{
ret = -EINVAL;
@ -1309,7 +1310,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_SERIAL_TERMIOS
case TCGETS:
{
struct termios *termiosp = (struct termios*)arg;
struct termios *termiosp = (struct termios *)arg;
if (!termiosp)
{
@ -1329,7 +1330,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TCSETS:
{
struct termios *termiosp = (struct termios*)arg;
struct termios *termiosp = (struct termios *)arg;
uint32_t lcr; /* Holds current values of line control register */
uint16_t dl; /* Divisor latch */
@ -1391,7 +1392,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint32_t rbr;
*status = up_serialin(priv, A1X_UART_LSR_OFFSET);
@ -1409,7 +1410,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status)
static void up_rxint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@ -1434,7 +1435,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return ((up_serialin(priv, A1X_UART_LSR_OFFSET) & UART_LSR_DR) != 0);
}
@ -1448,7 +1449,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, A1X_UART_THR_OFFSET, (uint32_t)ch);
}
@ -1462,7 +1463,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@ -1498,7 +1499,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return ((up_serialin(priv, A1X_UART_LSR_OFFSET) & UART_LSR_THRE) != 0);
}
@ -1512,7 +1513,7 @@ static bool up_txready(struct uart_dev_s *dev)
static bool up_txempty(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return ((up_serialin(priv, A1X_UART_LSR_OFFSET) & UART_LSR_THRE) != 0);
}
@ -1653,7 +1654,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
#ifdef HAVE_SERIAL_CONSOLE
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
uint32_t ier;
up_disableuartint(priv, &ier);
#endif

2
arch/arm/src/a1x/a1x_timerisr.c
View File

@ -78,7 +78,7 @@
****************************************************************************/
/****************************************************************************
* Global Functions
* Public Functions
****************************************************************************/
/****************************************************************************

2
arch/arm/src/arm/arm.h
View File

@ -427,7 +427,7 @@ static inline void tlb_data_invalidate_single(unsigned int mva)
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/src/arm/up_allocpage.c
View File

@ -236,7 +236,7 @@ int up_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
/* Finally, return the virtual address of allocated page */
*vpage = (void*)(vaddr & ~PAGEMASK);
*vpage = (void *)(vaddr & ~PAGEMASK);
return OK;
}

26
arch/arm/src/arm/up_assert.c
View File

@ -126,7 +126,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t*)stack;
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
@ -153,7 +153,7 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t*)&current_regs[regs];
uint32_t *ptr = (uint32_t *)&current_regs[regs];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
@ -198,7 +198,7 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
#ifdef CONFIG_ARCH_STACKDUMP
static void up_dumpstate(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
uint32_t sp = up_getsp();
uint32_t ustackbase;
uint32_t ustacksize;
@ -310,18 +310,18 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || ((struct tcb_s*)g_readytorun.head)->pid == 0)
if (current_regs || ((struct tcb_s *)g_readytorun.head)->pid == 0)
{
(void)irqsave();
for (;;)
{
(void)irqsave();
for (; ; )
{
#ifdef CONFIG_ARCH_LEDS
board_led_on(LED_PANIC);
up_mdelay(250);
board_led_off(LED_PANIC);
up_mdelay(250);
board_led_on(LED_PANIC);
up_mdelay(250);
board_led_off(LED_PANIC);
up_mdelay(250);
#endif
}
}
}
else
{
@ -340,7 +340,7 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
#ifdef CONFIG_PRINT_TASKNAME
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
#endif
board_led_on(LED_ASSERTION);

6
arch/arm/src/arm/up_blocktask.c
View File

@ -76,7 +76,7 @@
void up_block_task(struct tcb_s *tcb, tstate_t task_state)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
/* Verify that the context switch can be performed */
@ -128,7 +128,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Reset scheduler parameters */
@ -152,7 +152,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously

2
arch/arm/src/arm/up_dataabort.c
View File

@ -113,7 +113,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
*/
savestate = (uint32_t*)current_regs;
savestate = (uint32_t *)current_regs;
#endif
current_regs = regs;

2
arch/arm/src/arm/up_doirq.c
View File

@ -109,7 +109,7 @@ void up_doirq(int irq, uint32_t *regs)
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
up_restorefpu((uint32_t*)current_regs);
up_restorefpu((uint32_t *)current_regs);
#endif
#ifdef CONFIG_ARCH_ADDRENV

32
arch/arm/src/arm/up_elf.c
View File

@ -173,10 +173,10 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr),
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
offset = (*(uint32_t*)addr & 0x00ffffff) << 2;
offset = (*(uint32_t *)addr & 0x00ffffff) << 2;
if (offset & 0x02000000)
{
offset -= 0x04000000;
@ -193,8 +193,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset >>= 2;
*(uint32_t*)addr &= 0xff000000;
*(uint32_t*)addr |= offset & 0x00ffffff;
*(uint32_t *)addr &= 0xff000000;
*(uint32_t *)addr |= offset & 0x00ffffff;
}
break;
@ -202,34 +202,34 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value);
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t*)addr += sym->st_value;
*(uint32_t *)addr += sym->st_value;
}
break;
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t*)addr));
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
*(uint32_t*)addr &= 0xf000000f;
*(uint32_t *)addr &= 0xf000000f;
/* Change instruction to 'mov pc, Rm' */
*(uint32_t*)addr |= 0x01a0f000;
*(uint32_t *)addr |= 0x01a0f000;
}
break;
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value);
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t*)addr + sym->st_value - addr;
*(uint32_t*)addr = offset & 0x7fffffff;
offset = *(uint32_t *)addr + sym->st_value - addr;
*(uint32_t *)addr = offset & 0x7fffffff;
}
break;
@ -237,10 +237,10 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr),
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
offset = *(uint32_t*)addr;
offset = *(uint32_t *)addr;
offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
offset = (offset ^ 0x8000) - 0x8000;
@ -250,8 +250,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset >>= 16;
}
*(uint32_t*)addr &= 0xfff0f000;
*(uint32_t*)addr |= ((offset & 0xf000) << 4) | (offset & 0x0fff);
*(uint32_t *)addr &= 0xfff0f000;
*(uint32_t *)addr |= ((offset & 0xf000) << 4) | (offset & 0x0fff);
}
break;

2
arch/arm/src/arm/up_fullcontextrestore.S
View File

@ -53,7 +53,7 @@
**************************************************************************/
/**************************************************************************
* Global Variables
* Public Data
**************************************************************************/
/**************************************************************************

2
arch/arm/src/arm/up_prefetchabort.c
View File

@ -96,7 +96,7 @@ void up_prefetchabort(uint32_t *regs)
* for register dumps and possibly context switching.
*/
savestate = (uint32_t*)current_regs;
savestate = (uint32_t *)current_regs;
#endif
current_regs = regs;

6
arch/arm/src/arm/up_releasepending.c
View File

@ -65,7 +65,7 @@
void up_release_pending(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
slldbg("From TCB=%p\n", rtcb);
@ -96,7 +96,7 @@ void up_release_pending(void)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -121,7 +121,7 @@ void up_release_pending(void)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously

6
arch/arm/src/arm/up_reprioritizertr.c
View File

@ -92,7 +92,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
}
else
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
@ -150,7 +150,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -174,7 +174,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously

2
arch/arm/src/arm/up_saveusercontext.S
View File

@ -53,7 +53,7 @@
**************************************************************************/
/**************************************************************************
* Global Variables
* Public Data
**************************************************************************/
/**************************************************************************

22
arch/arm/src/arm/up_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_schedulesigaction.c
*
* Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2010, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -103,25 +103,25 @@
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
/* Refuse to handle nested signal actions */
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
flags = irqsave();
/* Refuse to handle nested signal actions */
if (!tcb->xcp.sigdeliver)
{
irqstate_t flags;
/* Make sure that interrupts are disabled */
flags = irqsave();
/* First, handle some special cases when the signal is
* being delivered to the currently executing task.
*/
sdbg("rtcb=0x%p current_regs=0x%p\n", g_readytorun.head, current_regs);
if (tcb == (struct tcb_s*)g_readytorun.head)
if (tcb == (struct tcb_s *)g_readytorun.head)
{
/* CASE 1: We are not in an interrupt handler and
* a task is signalling itself for some reason.
@ -196,9 +196,9 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_PC] = (uint32_t)up_sigdeliver;
tcb->xcp.regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
}
irqrestore(flags);
}
irqrestore(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */

2
arch/arm/src/arm/up_sigdeliver.c
View File

@ -82,7 +82,7 @@
void up_sigdeliver(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
uint32_t regs[XCPTCONTEXT_REGS];
sig_deliver_t sigdeliver;

18
arch/arm/src/arm/up_unblocktask.c
View File

@ -71,7 +71,7 @@
void up_unblock_task(struct tcb_s *tcb)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
/* Verify that the context switch can be performed */
@ -110,7 +110,7 @@ void up_unblock_task(struct tcb_s *tcb)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -136,16 +136,16 @@ void up_unblock_task(struct tcb_s *tcb)
* g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(rtcb);
#endif
/* Update scheduler parameters */

4
arch/arm/src/arm/up_va2pte.c
View File

@ -101,11 +101,11 @@ uint32_t *up_va2pte(uintptr_t vaddr)
/* Get the L1 table entry associated with this virtual address */
L1 = *(uint32_t*)PG_POOL_VA2L1VADDR(vaddr);
L1 = *(uint32_t *)PG_POOL_VA2L1VADDR(vaddr);
/* Get the address of the L2 page table from the L1 entry */
L2 = (uint32_t*)PG_POOL_L12VPTABLE(L1);
L2 = (uint32_t *)PG_POOL_L12VPTABLE(L1);
/* Get the index into the L2 page table. Each L1 entry maps
* 256 x 4Kb or 1024 x 1Kb pages.

2
arch/arm/src/arm/up_vectoraddrexcptn.S
View File

@ -46,7 +46,7 @@
************************************************************************************/
/************************************************************************************
* Global Data
* Public Data
************************************************************************************/
/************************************************************************************

2
arch/arm/src/arm/up_vectors.S
View File

@ -48,7 +48,7 @@
************************************************************************************/
/************************************************************************************
* Global Data
* Public Data
************************************************************************************/
.data

2
arch/arm/src/arm/up_vectortab.S
View File

@ -44,7 +44,7 @@
****************************************************************************/
/****************************************************************************
* Global Data
* Public Data
****************************************************************************/
/****************************************************************************

2
arch/arm/src/arm/vfork.S
View File

@ -46,7 +46,7 @@
************************************************************************************/
/************************************************************************************
* Global Symbols
* Public Symbols
************************************************************************************/
.file "vfork.S"

26
arch/arm/src/armv6-m/up_assert.c
View File

@ -125,7 +125,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t*)stack;
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
@ -226,7 +226,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
return ret;
}
static int assert_tracecallback(FAR struct usbtrace_s *trace,FAR void *arg)
static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
{
usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value);
return 0;
@ -240,7 +240,7 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace,FAR void *arg)
#ifdef CONFIG_ARCH_STACKDUMP
static void up_dumpstate(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
uint32_t sp = up_getsp();
uint32_t ustackbase;
uint32_t ustacksize;
@ -365,18 +365,18 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || ((struct tcb_s*)g_readytorun.head)->pid == 0)
if (current_regs || ((struct tcb_s *)g_readytorun.head)->pid == 0)
{
(void)irqsave();
for (;;)
{
(void)irqsave();
for (; ; )
{
#ifdef CONFIG_ARCH_LEDS
board_led_on(LED_PANIC);
up_mdelay(250);
board_led_off(LED_PANIC);
up_mdelay(250);
board_led_on(LED_PANIC);
up_mdelay(250);
board_led_off(LED_PANIC);
up_mdelay(250);
#endif
}
}
}
else
{
@ -395,7 +395,7 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
#ifdef CONFIG_PRINT_TASKNAME
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
#endif
board_led_on(LED_ASSERTION);

6
arch/arm/src/armv6-m/up_blocktask.c
View File

@ -74,7 +74,7 @@
void up_block_task(struct tcb_s *tcb, tstate_t task_state)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
/* Verify that the context switch can be performed */
@ -126,7 +126,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Reset scheduler parameters */
@ -141,7 +141,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
else
{
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
/* Reset scheduler parameters */

4
arch/arm/src/armv6-m/up_doirq.c
View File

@ -90,7 +90,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
* current_regs is also used to manage interrupt level context switches.
*/
savestate = (uint32_t*)current_regs;
savestate = (uint32_t *)current_regs;
current_regs = regs;
/* Acknowledge the interrupt */
@ -107,7 +107,7 @@ uint32_t *up_doirq(int irq, uint32_t *regs)
* switch occurred during interrupt processing.
*/
regs = (uint32_t*)current_regs;
regs = (uint32_t *)current_regs;
/* Restore the previous value of current_regs. NULL would indicate that
* we are no longer in an interrupt handler. It will be non-NULL if we

48
arch/arm/src/armv6-m/up_elf.c
View File

@ -169,10 +169,10 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr),
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
offset = (*(uint32_t*)addr & 0x00ffffff) << 2;
offset = (*(uint32_t *)addr & 0x00ffffff) << 2;
if (offset & 0x02000000)
{
offset -= 0x04000000;
@ -189,8 +189,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset >>= 2;
*(uint32_t*)addr &= 0xff000000;
*(uint32_t*)addr |= offset & 0x00ffffff;
*(uint32_t *)addr &= 0xff000000;
*(uint32_t *)addr |= offset & 0x00ffffff;
}
break;
@ -198,9 +198,9 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value);
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t*)addr += sym->st_value;
*(uint32_t *)addr += sym->st_value;
}
break;
@ -242,8 +242,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
* J2 = lower_insn[11]
*/
upper_insn = (uint32_t)(*(uint16_t*)addr);
lower_insn = (uint32_t)(*(uint16_t*)(addr + 2));
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
@ -315,10 +315,10 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
J2 = S ^ (~(offset >> 22) & 1);
upper_insn = ((upper_insn & 0xf800) | (S << 10) | ((offset >> 12) & 0x03ff));
*(uint16_t*)addr = (uint16_t)upper_insn;
*(uint16_t *)addr = (uint16_t)upper_insn;
lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff));
*(uint16_t*)(addr + 2) = (uint16_t)lower_insn;
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
bvdbg(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
S, J1, J2, (int)upper_insn, (int)lower_insn);
@ -328,25 +328,25 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t*)addr));
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
*(uint32_t*)addr &= 0xf000000f;
*(uint32_t *)addr &= 0xf000000f;
/* Change instruction to 'mov pc, Rm' */
*(uint32_t*)addr |= 0x01a0f000;
*(uint32_t *)addr |= 0x01a0f000;
}
break;
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value);
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t*)addr + sym->st_value - addr;
*(uint32_t*)addr = offset & 0x7fffffff;
offset = *(uint32_t *)addr + sym->st_value - addr;
*(uint32_t *)addr = offset & 0x7fffffff;
}
break;
@ -354,10 +354,10 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr),
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
offset = *(uint32_t*)addr;
offset = *(uint32_t *)addr;
offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
offset = (offset ^ 0x8000) - 0x8000;
@ -367,8 +367,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset >>= 16;
}
*(uint32_t*)addr &= 0xfff0f000;
*(uint32_t*)addr |= ((offset & 0xf000) << 4) | (offset & 0x0fff);
*(uint32_t *)addr &= 0xfff0f000;
*(uint32_t *)addr |= ((offset & 0xf000) << 4) | (offset & 0x0fff);
}
break;
@ -405,8 +405,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
* imm8 = imm16[0:7] = lower_insn[7:0]
*/
upper_insn = (uint32_t)(*(uint16_t*)addr);
lower_insn = (uint32_t)(*(uint16_t*)(addr + 2));
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
@ -440,10 +440,10 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
}
upper_insn = ((upper_insn & 0xfbf0) | ((offset & 0xf000) >> 12) | ((offset & 0x0800) >> 1));
*(uint16_t*)addr = (uint16_t)upper_insn;
*(uint16_t *)addr = (uint16_t)upper_insn;
lower_insn = ((lower_insn & 0x8f00) | ((offset & 0x0700) << 4) | (offset & 0x00ff));
*(uint16_t*)(addr + 2) = (uint16_t)lower_insn;
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
bvdbg(" insn [%04x %04x]\n",
(int)upper_insn, (int)lower_insn);

2
arch/arm/src/armv6-m/up_exception.S
View File

@ -49,7 +49,7 @@
#include "chip.h"
/************************************************************************************
* Global Symbols
* Public Symbols
************************************************************************************/
.globl exception_common

2
arch/arm/src/armv6-m/up_fullcontextrestore.S
View File

@ -48,7 +48,7 @@
************************************************************************************/
/************************************************************************************
* Global Symbols
* Public Symbols
************************************************************************************/
.cpu cortex-m0

4
arch/arm/src/armv6-m/up_hardfault.c
View File

@ -89,11 +89,11 @@
int up_hardfault(int irq, FAR void *context)
{
uint32_t *regs = (uint32_t*)context;
uint32_t *regs = (uint32_t *)context;
/* Get the value of the program counter where the fault occurred */
uint16_t *pc = (uint16_t*)regs[REG_PC] - 1;
uint16_t *pc = (uint16_t *)regs[REG_PC] - 1;
/* Check if the pc lies in known FLASH memory.
* REVISIT: What if the PC lies in "unknown" external memory?

6
arch/arm/src/armv6-m/up_releasepending.c
View File

@ -64,7 +64,7 @@
void up_release_pending(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
slldbg("From TCB=%p\n", rtcb);
@ -95,7 +95,7 @@ void up_release_pending(void)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -110,7 +110,7 @@ void up_release_pending(void)
else
{
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */

8
arch/arm/src/armv6-m/up_reprioritizertr.c
View File

@ -91,7 +91,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
}
else
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
slldbg("TCB=%p PRI=%d\n", tcb, priority);
@ -136,7 +136,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
sched_suspend_scheduler(rtcb);
/* Are we in an interrupt handler? */
/* Are we in an interrupt handler? */
if (current_regs)
{
@ -150,7 +150,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -165,7 +165,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
else
{
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */

2
arch/arm/src/armv6-m/up_saveusercontext.S
View File

@ -48,7 +48,7 @@
************************************************************************************/
/************************************************************************************
* Global Symbols
* Public Symbols
************************************************************************************/
.cpu cortex-m0

22
arch/arm/src/armv6-m/up_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv6-m/up_schedulesigaction.c
*
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -104,25 +104,25 @@
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
/* Refuse to handle nested signal actions */
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
flags = irqsave();
/* Refuse to handle nested signal actions */
if (!tcb->xcp.sigdeliver)
{
irqstate_t flags;
/* Make sure that interrupts are disabled */
flags = irqsave();
/* First, handle some special cases when the signal is being delivered
* to the currently executing task.
*/
sdbg("rtcb=0x%p current_regs=0x%p\n", g_readytorun.head, current_regs);
if (tcb == (struct tcb_s*)g_readytorun.head)
if (tcb == (struct tcb_s *)g_readytorun.head)
{
/* CASE 1: We are not in an interrupt handler and a task is
* signalling itself for some reason.
@ -206,9 +206,9 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_LR] = EXC_RETURN_PRIVTHR;
#endif
}
irqrestore(flags);
}
irqrestore(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */

2
arch/arm/src/armv6-m/up_sigdeliver.c
View File

@ -87,7 +87,7 @@ void up_sigdeliver(void)
* copy an may overwrite the regs[] array contents. Sorry.
*/
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
uint32_t regs[XCPTCONTEXT_REGS + 4];
sig_deliver_t sigdeliver;

12
arch/arm/src/armv6-m/up_svcall.c
View File

@ -159,7 +159,7 @@ static void dispatch_syscall(void)
int up_svcall(int irq, FAR void *context)
{
uint32_t *regs = (uint32_t*)context;
uint32_t *regs = (uint32_t *)context;
uint32_t cmd;
DEBUGASSERT(regs && regs == current_regs);
@ -211,7 +211,7 @@ int up_svcall(int irq, FAR void *context)
case SYS_save_context:
{
DEBUGASSERT(regs[REG_R1] != 0);
memcpy((uint32_t*)regs[REG_R1], regs, XCPTCONTEXT_SIZE);
memcpy((uint32_t *)regs[REG_R1], regs, XCPTCONTEXT_SIZE);
}
break;
@ -233,7 +233,7 @@ int up_svcall(int irq, FAR void *context)
case SYS_restore_context:
{
DEBUGASSERT(regs[REG_R1] != 0);
current_regs = (uint32_t*)regs[REG_R1];
current_regs = (uint32_t *)regs[REG_R1];
}
break;
@ -256,8 +256,8 @@ int up_svcall(int irq, FAR void *context)
case SYS_switch_context:
{
DEBUGASSERT(regs[REG_R1] != 0 && regs[REG_R2] != 0);
memcpy((uint32_t*)regs[REG_R1], regs, XCPTCONTEXT_SIZE);
current_regs = (uint32_t*)regs[REG_R2];
memcpy((uint32_t *)regs[REG_R1], regs, XCPTCONTEXT_SIZE);
current_regs = (uint32_t *)regs[REG_R2];
}
break;
@ -407,7 +407,7 @@ int up_svcall(int irq, FAR void *context)
* parameter will reside at an offset of 4 from the stack pointer.
*/
regs[REG_R3] = *(uint32_t*)(regs[REG_SP]+4);
regs[REG_R3] = *(uint32_t *)(regs[REG_SP]+4);
}
break;
#endif

2
arch/arm/src/armv6-m/up_switchcontext.S
View File

@ -48,7 +48,7 @@
************************************************************************************/
/************************************************************************************
* Global Symbols
* Public Symbols
************************************************************************************/
.cpu cortex-m0

2
arch/arm/src/armv6-m/up_systemreset.c
View File

@ -76,7 +76,7 @@ void up_systemreset(void)
/* Wait for the reset */
for (;;);
for (; ; );
}

6
arch/arm/src/armv6-m/up_unblocktask.c
View File

@ -69,7 +69,7 @@
void up_unblock_task(struct tcb_s *tcb)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
/* Verify that the context switch can be performed */
@ -108,7 +108,7 @@ void up_unblock_task(struct tcb_s *tcb)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */
@ -123,7 +123,7 @@ void up_unblock_task(struct tcb_s *tcb)
else
{
struct tcb_s *nexttcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *nexttcb = (struct tcb_s *)g_readytorun.head;
/* Update scheduler parameters */

16
arch/arm/src/armv6-m/up_vectors.c
View File

@ -85,16 +85,16 @@ extern char _ebss;
*/
unsigned _vectors[] __attribute__((section(".vectors"))) =
{
/* Initial stack */
{
/* Initial stack */
IDLE_STACK,
IDLE_STACK,
/* Reset exception handler */
/* Reset exception handler */
(unsigned)&__start,
(unsigned)&__start,
/* Vectors 2 - n point directly at the generic handler */
/* Vectors 2 - n point directly at the generic handler */
[2 ... (15 + ARMV6M_PERIPHERAL_INTERRUPTS)] = (unsigned)&exception_common
};
[2 ... (15 + ARMV6M_PERIPHERAL_INTERRUPTS)] = (unsigned)&exception_common
};

2
arch/arm/src/armv6-m/vfork.S
View File

@ -46,7 +46,7 @@
************************************************************************************/
/************************************************************************************
* Global Symbols
* Public Symbols
************************************************************************************/
.cpu cortex-m0

2
arch/arm/src/armv7-a/addrenv.h
View File

@ -72,7 +72,7 @@
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__

2
arch/arm/src/armv7-a/arm.h
View File

@ -96,7 +96,7 @@
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Variables
* Public Data
****************************************************************************/
/****************************************************************************

20
arch/arm/src/armv7-a/arm_addrenv_shm.c
View File

@ -285,19 +285,19 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages)
flags = irqsave();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page\
* address.
*/
/* Get the virtual address corresponding to the physical page
* address.
*/
l2table = (FAR uint32_t *)arm_pgvaddr(paddr);
l2table = (FAR uint32_t *)arm_pgvaddr(paddr);
#else
/* Temporarily map the page into the virtual address space */
/* Temporarily map the page into the virtual address space */
l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE,
MMU_MEMFLAGS);
l2table = (FAR uint32_t *)
(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE,
MMU_MEMFLAGS);
l2table = (FAR uint32_t *)
(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
#endif
/* Unmap this virtual page address.

2
arch/arm/src/armv7-a/arm_allocpage.c
View File

@ -236,7 +236,7 @@ int arm_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
/* Finally, return the virtual address of allocated page */
*vpage = (void*)(vaddr & ~PAGEMASK);
*vpage = (void *)(vaddr & ~PAGEMASK);
return OK;
}

26
arch/arm/src/armv7-a/arm_assert.c
View File

@ -124,7 +124,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t*)stack;
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
@ -187,7 +187,7 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t*)&current_regs[regs];
uint32_t *ptr = (uint32_t *)&current_regs[regs];
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
@ -232,7 +232,7 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
#ifdef CONFIG_ARCH_STACKDUMP
static void up_dumpstate(void)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
uint32_t sp = up_getsp();
uint32_t ustackbase;
uint32_t ustacksize;
@ -365,18 +365,18 @@ static void _up_assert(int errorcode)
{
/* Are we in an interrupt handler or the idle task? */
if (current_regs || ((struct tcb_s*)g_readytorun.head)->pid == 0)
if (current_regs || ((struct tcb_s *)g_readytorun.head)->pid == 0)
{
(void)irqsave();
for (;;)
{
(void)irqsave();
for (; ; )
{
#ifdef CONFIG_ARCH_LEDS
board_led_on(LED_PANIC);
up_mdelay(250);
board_led_off(LED_PANIC);
up_mdelay(250);
board_led_on(LED_PANIC);
up_mdelay(250);
board_led_off(LED_PANIC);
up_mdelay(250);
#endif
}
}
}
else
{
@ -395,7 +395,7 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
#ifdef CONFIG_PRINT_TASKNAME
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
#endif
board_led_on(LED_ASSERTION);

18
arch/arm/src/armv7-a/arm_blocktask.c
View File

@ -76,7 +76,7 @@
void up_block_task(struct tcb_s *tcb, tstate_t task_state)
{
struct tcb_s *rtcb = (struct tcb_s*)g_readytorun.head;
struct tcb_s *rtcb = (struct tcb_s *)g_readytorun.head;
bool switch_needed;
/* Verify that the context switch can be performed */
@ -128,7 +128,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
/* Reset scheduler parameters */
@ -152,16 +152,16 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* of the g_readytorun task list.
*/
rtcb = (struct tcb_s*)g_readytorun.head;
rtcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(rtcb);
(void)group_addrenv(rtcb);
#endif
/* Reset scheduler parameters */

2
arch/arm/src/armv7-a/arm_dataabort.c
View File

@ -112,7 +112,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
* for register dumps and possibly context switching.
*/
savestate = (uint32_t*)current_regs;
savestate = (uint32_t *)current_regs;
current_regs = regs;
/* In the NuttX on-demand paging implementation, only the read-only, .text

2
arch/arm/src/armv7-a/arm_doirq.c
View File

@ -105,7 +105,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
up_restorefpu((uint32_t*)current_regs);
up_restorefpu((uint32_t *)current_regs);
#endif
#ifdef CONFIG_ARCH_ADDRENV

32
arch/arm/src/armv7-a/arm_elf.c
View File

@ -175,10 +175,10 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr),
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
offset = (*(uint32_t*)addr & 0x00ffffff) << 2;
offset = (*(uint32_t *)addr & 0x00ffffff) << 2;
if (offset & 0x02000000)
{
offset -= 0x04000000;
@ -195,8 +195,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset >>= 2;
*(uint32_t*)addr &= 0xff000000;
*(uint32_t*)addr |= offset & 0x00ffffff;
*(uint32_t *)addr &= 0xff000000;
*(uint32_t *)addr |= offset & 0x00ffffff;
}
break;
@ -204,34 +204,34 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value);
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t*)addr += sym->st_value;
*(uint32_t *)addr += sym->st_value;
}
break;
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t*)addr));
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
*(uint32_t*)addr &= 0xf000000f;
*(uint32_t *)addr &= 0xf000000f;
/* Change instruction to 'mov pc, Rm' */
*(uint32_t*)addr |= 0x01a0f000;
*(uint32_t *)addr |= 0x01a0f000;
}
break;
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t*)addr), sym, (long)sym->st_value);
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t*)addr + sym->st_value - addr;
*(uint32_t*)addr = offset & 0x7fffffff;
offset = *(uint32_t *)addr + sym->st_value - addr;
*(uint32_t *)addr = offset & 0x7fffffff;
}
break;
@ -239,10 +239,10 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t*)addr),
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
offset = *(uint32_t*)addr;
offset = *(uint32_t *)addr;
offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
offset = (offset ^ 0x8000) - 0x8000;
@ -252,8 +252,8 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset >>= 16;
}
*(uint32_t*)addr &= 0xfff0f000;
*(uint32_t*)addr |= ((offset & 0xf000) << 4) | (offset & 0x0fff);
*(uint32_t *)addr &= 0xfff0f000;
*(uint32_t *)addr |= ((offset & 0xf000) << 4) | (offset & 0x0fff);
}
break;

68
arch/arm/src/armv7-a/arm_l2cc_pl310.c
View File

@ -38,9 +38,9 @@
*
************************************************************************************/
/***************************************************************************
/****************************************************************************
* Included Files
***************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -56,9 +56,9 @@
#ifdef CONFIG_ARMV7A_L2CC_PL310
/***************************************************************************
/****************************************************************************
* Pre-processor Definitions
***************************************************************************/
****************************************************************************/
/* Configuration ***********************************************************/
/* Number of ways depends on ARM configuration */
@ -75,17 +75,17 @@
/* The size of one depends on ARM configuration */
#if defined(CONFIG_ARMV7A_WAYSIZE_16KB)
# define PL310_WAYSIZE (16*1024)
# define PL310_WAYSIZE (16 * 1024)
#elif defined(CONFIG_ARMV7A_WAYSIZE_32KB)
# define PL310_WAYSIZE (32*1024)
# define PL310_WAYSIZE (32 * 1024)
#elif defined(CONFIG_ARMV7A_WAYSIZE_64KB)
# define PL310_WAYSIZE (64*1024)
# define PL310_WAYSIZE (64 * 1024)
#elif defined(CONFIG_ARMV7A_WAYSIZE_128KB)
# define PL310_WAYSIZE (128*1024)
# define PL310_WAYSIZE (128 * 1024)
#elif defined(CONFIG_ARMV7A_WAYSIZE_256KB)
# define PL310_WAYSIZE (256*1024)
# define PL310_WAYSIZE (256 * 1024)
#elif defined(CONFIG_ARMV7A_WAYSIZE_512KB)
# define PL310_WAYSIZE (512*1024)
# define PL310_WAYSIZE (512 * 1024)
#else
# error "Way size not selected"
#endif
@ -251,11 +251,11 @@
#define dsb(a) __asm__ __volatile__ ("dsb " #a : : : "memory")
/***************************************************************************
/****************************************************************************
* Private Functions
***************************************************************************/
****************************************************************************/
/***************************************************************************
/****************************************************************************
* Name: pl310_flush_all
*
* Description:
@ -267,7 +267,7 @@
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
static void pl310_flush_all(void)
{
@ -292,7 +292,7 @@ static void pl310_flush_all(void)
* Public Functions
****************************************************************************/
/***************************************************************************
/****************************************************************************
* Name: up_l2ccinitialize
*
* Description:
@ -306,7 +306,7 @@ static void pl310_flush_all(void)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void up_l2ccinitialize(void)
{
@ -415,7 +415,7 @@ void up_l2ccinitialize(void)
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_enable
*
* Description:
@ -428,7 +428,7 @@ void up_l2ccinitialize(void)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_enable(void)
{
@ -442,7 +442,7 @@ void l2cc_enable(void)
irqrestore(flags);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_disable
*
* Description:
@ -454,7 +454,7 @@ void l2cc_enable(void)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_disable(void)
{
@ -472,7 +472,7 @@ void l2cc_disable(void)
irqrestore(flags);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_sync
*
* Description:
@ -485,7 +485,7 @@ void l2cc_disable(void)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_sync(void)
{
@ -500,7 +500,7 @@ void l2cc_sync(void)
irqrestore(flags);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_invalidate_all
*
* Description:
@ -512,7 +512,7 @@ void l2cc_sync(void)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_invalidate_all(void)
{
@ -550,7 +550,7 @@ void l2cc_invalidate_all(void)
irqrestore(flags);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_invalidate
*
* Description:
@ -564,7 +564,7 @@ void l2cc_invalidate_all(void)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
{
@ -647,7 +647,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
irqrestore(flags);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_clean_all
*
* Description:
@ -659,7 +659,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_clean_all(void)
{
@ -684,7 +684,7 @@ void l2cc_clean_all(void)
irqrestore(flags);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_clean
*
* Description:
@ -698,7 +698,7 @@ void l2cc_clean_all(void)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
{
@ -765,7 +765,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
irqrestore(flags);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_flush_all
*
* Description:
@ -777,7 +777,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_flush_all(void)
{
@ -790,7 +790,7 @@ void l2cc_flush_all(void)
irqrestore(flags);
}
/***************************************************************************
/****************************************************************************
* Name: l2cc_flush
*
* Description:
@ -804,7 +804,7 @@ void l2cc_flush_all(void)
* Returned Value:
* None
*
***************************************************************************/
****************************************************************************/
void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
{

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