Only 256Kb FLASH
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3080 42af7a65-404d-4744-a932-0658087f49c3
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@ -33,7 +33,7 @@
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*
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****************************************************************************/
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/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and
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/* The LPC1766 has 256Kb of FLASH beginning at address 0x0000:0000 and
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* 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address
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* 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses
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* 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit
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@ -42,7 +42,7 @@
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MEMORY
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{
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K
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sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
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}
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@ -33,7 +33,7 @@
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*
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****************************************************************************/
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/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and
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/* The LPC1766 has 256Kb of FLASH beginning at address 0x0000:0000 and
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* 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address
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* 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses
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* 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit
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@ -42,7 +42,7 @@
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MEMORY
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{
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K
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sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
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}
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@ -33,7 +33,7 @@
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*
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****************************************************************************/
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/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and
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/* The LPC1766 has 256Kb of FLASH beginning at address 0x0000:0000 and
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* 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address
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* 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses
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* 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit
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@ -42,7 +42,7 @@
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MEMORY
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{
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K
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sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
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}
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@ -33,7 +33,7 @@
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*
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****************************************************************************/
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/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and
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/* The LPC1766 has 256Kb of FLASH beginning at address 0x0000:0000 and
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* 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address
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* 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses
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* 0x20070000 and 0x20080000. Here we assume that .data and .bss will all fit
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@ -42,7 +42,7 @@
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MEMORY
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{
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K
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flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K
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sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
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}
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