Update clock logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2576 42af7a65-404d-4744-a932-0658087f49c3
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@ -87,6 +87,28 @@
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#define SAM3U_PLLA_FREQUENCY (96000000)
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#define SAM3U_CPU_FREQUENCY (48000000)
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/* HSMCI clocking
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*
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* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
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* divided by (2*(CLKDIV+1)).
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*
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* MCI_SPEED = MCK / (2*(CLKDIV+1))
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* CLKDIV = MCI / MCI_SPEED / 2 - 1
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*/
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/* MCK = 48MHz, CLKDIV = 59, MCI_SPEED = 48MHz / 2 * (59+1) = 400 KHz */
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#define HSMCI_INIT_CLKDIV (59 << HSMCI_MR_CLKDIV_SHIFT)
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/* MCK = 48MHz, CLKDIV = 1, MCI_SPEED = 48MHz / 2 * (1+1) = 12 MHz */
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#define HSMCI_MMCXFR_CLKDIV (3 << HSMCI_MR_CLKDIV_SHIFT)
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/* MCK = 48MHz, CLKDIV = 0, MCI_SPEED = 48MHz / 2 * (0+1) = 24 MHz */
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#define HSMCI_SDXFR_CLKDIV (0 << HSMCI_MR_CLKDIV_SHIFT)
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#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV
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/* LED definitions ******************************************************************/
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#define LED_STARTED 0 /* LED0=OFF LED1=OFF LED2=OFF */
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