diff --git a/arch/arm/src/stm32/stm32f20xxx_rcc.c b/arch/arm/src/stm32/stm32f20xxx_rcc.c
index ac72fb60bc..dd796f86c2 100644
--- a/arch/arm/src/stm32/stm32f20xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32f20xxx_rcc.c
@@ -631,7 +631,7 @@ static void stm32_stdclockconfig(void)
 
       /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
 
-#ifdef STM32_FLASH_PREFETCH
+#ifdef CONFIG_STM32_FLASH_PREFETCH
       regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
 #else
       regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
diff --git a/arch/arm/src/stm32/stm32f40xxx_rcc.c b/arch/arm/src/stm32/stm32f40xxx_rcc.c
index fc7fe1697d..82757c43f6 100644
--- a/arch/arm/src/stm32/stm32f40xxx_rcc.c
+++ b/arch/arm/src/stm32/stm32f40xxx_rcc.c
@@ -669,7 +669,7 @@ static void stm32_stdclockconfig(void)
  
       /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
 
-#ifdef STM32_FLASH_PREFETCH
+#ifdef CONFIG_STM32_FLASH_PREFETCH
       regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
 #else
       regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);