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Fix to lpc214x MMC/SD due to lm3s changes

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1833 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-05-28 23:14:27 +00:00
parent bfacea73ba
commit 5db59d557b
15 changed files with 154 additions and 16 deletions
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3
ChangeLog
View File

@ -746,5 +746,8 @@
* configs/eagle100/*/Make.defs: Added configuration options that should make
it possible to build NuttX for the Eagle100 using CodeSourcery 2009q1 toolchain
and the devkitARM GNU toolchain.
* configs/mcu123-lpc214x/src: Corrected some logic in the LPC2148 SPI receive block
logic. Re-verified SDC ver1.x support with 1Gb Toshiba SDC, 1Gb PNY SDC, 2Gb SanDisk SDC,
and 4Gb Kingston SDHC.

5
Documentation/NuttX.html
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@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
<p>Last Updated: May 27, 2009</p>
<p>Last Updated: May 28, 2009</p>
</td>
</tr>
</table>
@ -1436,6 +1436,9 @@ nuttx-0.4.7 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
* configs/eagle100/*/Make.defs: Added configuration options that should make
it possible to build NuttX for the Eagle100 using CodeSourcery 2009q1 toolchain
and the devkitARM GNU toolchain.
* configs/mcu123-lpc214x/src: Corrected some logic in the LPC2148 SPI receive block
logic. Re-verified SDC ver1.x support with 1Gb Toshiba SDC, 1Gb PNY SDC, 2Gb SanDisk SDC,
and 4Gb Kingston SDHC.
pascal-0.1.3 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

8
Documentation/NuttxPortingGuide.html
View File

@ -12,7 +12,7 @@
<h1><big><font color="#3c34ec">
<i>NuttX RTOS Porting Guide</i>
</font></big></h1>
<p>Last Updated: May 22, 2009</p>
<p>Last Updated: May 28, 2009</p>
</td>
</tr>
</table>
@ -2180,6 +2180,12 @@ extern void up_ledoff(int led);
<li>
<code>CONFIG_MMCSD_READONLY</code>: Provide read-only access. Default is Read/Write
</li>
<li>
<code>CONFIG_MMCSD_SPICLOCK</code>: Maximum SPI clock to drive MMC/SD card. Default is 20MHz.
</li>
<li>
<code>CONFIG_MMCSD_SYNCHRONIZE</code>: Special synchronization logic needed
</li>
</ul>
<h2>Network Support</h2>

6
Makefile
View File

@ -1,7 +1,7 @@
############################################################################
# Makefile
#
# Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
# Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
@ -268,7 +268,7 @@ subdir_clean:
@$(MAKE) -C tools -f Makefile.mkconfig TOPDIR="$(TOPDIR)" clean
@$(MAKE) -C mm -f Makefile.test TOPDIR="$(TOPDIR)" clean
clean: subdir_clean clean_context
clean: subdir_clean
@rm -f $(BIN) nuttx.* mm_test *.map *~
subdir_distclean:
@ -278,7 +278,7 @@ subdir_distclean:
fi \
done
distclean: clean subdir_distclean
distclean: clean subdir_distclean clean_context
@rm -f Make.defs setenv.sh .config

1
configs/README.txt
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@ -287,6 +287,7 @@ defconfig -- This is a configuration file similar to the Linux
Read/Write
CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
Default is 20MHz.
CONFIG_MMCSD_SYNCHRONIZE - Special synchronization logic needed
TCP/IP and UDP support via uIP
CONFIG_NET - Enable or disable all network features

3
configs/eagle100/httpd/defconfig
View File

@ -359,10 +359,13 @@ CONFIG_FS_ROMFS=n
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD_SYNCHRONIZE=n
#
# TCP/IP and UDP support via uIP

3
configs/eagle100/nettest/defconfig
View File

@ -359,10 +359,13 @@ CONFIG_FS_ROMFS=n
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD_SYNCHRONIZE=n
#
# TCP/IP and UDP support via uIP

3
configs/eagle100/nsh/defconfig
View File

@ -358,10 +358,13 @@ CONFIG_FS_ROMFS=n
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD_SYNCHRONIZE=n
#
# TCP/IP and UDP support via uIP

3
configs/eagle100/ostest/defconfig
View File

@ -358,10 +358,13 @@ CONFIG_FS_ROMFS=n
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_MMCSD_SYNCHRONIZE=n
#
# TCP/IP and UDP support via uIP

14
configs/mcu123-lpc214x/nsh/defconfig
View File

@ -301,9 +301,21 @@ CONFIG_FS_FAT=y
CONFIG_FS_ROMFS=n
#
# MMC/SD configuration
# SPI-based MMC/SD driver
#
# CONFIG_MMCSD_NSLOTS
# Number of MMC/SD slots supported by the driver
# CONFIG_MMCSD_READONLY
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
#CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SYNCHRONIZE=y
#
# SPI-based MMC/SD driver

7
configs/mcu123-lpc214x/ostest/defconfig
View File

@ -303,8 +303,15 @@ CONFIG_FS_ROMFS=n
# Number of MMC/SD slots supported by the driver
# CONFIG_MMCSD_READONLY
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
#CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SYNCHRONIZE=y
#
# TCP/IP and UDP support via uIP

49
configs/mcu123-lpc214x/src/up_spi.c
View File

@ -62,6 +62,7 @@
#include <nuttx/config.h>
#include <nuttx/spi.h>
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/arch.h>
@ -79,9 +80,31 @@
* Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG too) */
#undef SPI_DEBUG /* Define to enable debug */
#undef SPI_VERBOSE /* Define to enable verbose debug */
#ifdef SPI_DEBUG
# define spidbg lldbg
# ifdef SPI_VERBOSE
# define spivdbg lldbg
# else
# define spivdbg(x...)
# endif
#else
# undef SPI_VERBOSE
# define spidbg(x...)
# define spivdbg(x...)
#endif
/* Clocking */
#define LPC214X_CCLKFREQ (LPC214X_FOSC*LPC214X_PLL_M)
#define LPC214X_PCLKFREQ (LPC214X_CCLKFREQ/LPC214X_APB_DIV)
/* Use either FIO or legacy GPIO */
#ifdef CONFIG_LPC214x_FIO
# define CS_SET_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_SET_OFFSET)
# define CS_CLR_REGISTER (LPC214X_FIO0_BASE+LPC214X_FIO_CLR_OFFSET)
@ -153,12 +176,14 @@ static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean
{
/* Enable slave select (low enables) */
spidbg("CD asserted\n");
putreg32(bit, CS_CLR_REGISTER);
}
else
{
/* Disable slave select (low enables) */
spidbg("CD de-asserted\n");
putreg32(bit, CS_SET_REGISTER);
/* Wait for the TX FIFO not full indication */
@ -214,6 +239,8 @@ static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency)
divisor = (divisor + 1) & ~1;
putreg8(divisor, LPC214X_SPI1_CPSR);
spidbg("Frequency %d->%d\n", frequency, LPC214X_PCLKFREQ / divisor);
return LPC214X_PCLKFREQ / divisor;
}
@ -238,6 +265,7 @@ static ubyte spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
* board.
*/
spidbg("Return SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
@ -259,6 +287,8 @@ static ubyte spi_status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd)
{
register uint16 regval;
/* Wait while the TX FIFO is full */
while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF));
@ -273,7 +303,9 @@ static uint16 spi_send(FAR struct spi_dev_s *dev, uint16 wd)
/* Get the value from the RX FIFO and return it */
return (uint16)getreg16(LPC214X_SPI1_DR);
regval = getreg16(LPC214X_SPI1_DR);
spidbg("%04x->%04x\n", wd, regval);
return regval;
}
/*************************************************************************
@ -302,6 +334,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
/* Loop while thre are bytes remaining to be sent */
spidbg("nwords: %d\n", nwords);
while (nwords > 0)
{
/* While the TX FIFO is not full and there are bytes left to send */
@ -318,6 +351,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
/* Then discard all card responses until the RX & TX FIFOs are emptied. */
spidbg("discarding\n");
do
{
/* Is there anything in the RX fifo? */
@ -367,11 +401,12 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords)
{
FAR ubyte *ptr = (FAR ubyte*)buffer;
uint32 fifobytes = 0;
uint32 rxpending = 0;
/* While there is remaining to be sent (and no synchronization error has occurred) */
while (ptr || fifobytes)
spidbg("nwords: %d\n", nwords);
while (nwords || rxpending)
{
/* Fill the transmit FIFO with 0xff...
* Write 0xff to the data register while (1) the TX FIFO is
@ -379,20 +414,22 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
* and (3) there are more bytes to be sent.
*/
spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
while ((getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF) &&
(fifobytes < LPC214X_SPI1_FIFOSZ) && nwords)
(rxpending < LPC214X_SPI1_FIFOSZ) && nwords)
{
putreg16(0xff, LPC214X_SPI1_DR);
nwords--;
fifobytes++;
rxpending++;
}
/* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
spivdbg("RX: rxpending: %d\n", rxpending);
while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE)
{
*ptr++ = (ubyte)getreg16(LPC214X_SPI1_DR);
fifobytes--;
rxpending--;
}
}
}

7
configs/mcu123-lpc214x/usbserial/defconfig
View File

@ -308,8 +308,15 @@ CONFIG_FS_ROMFS=n
# Number of MMC/SD slots supported by the driver
# CONFIG_MMCSD_READONLY
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
#CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SYNCHRONIZE=y
#
# TCP/IP and UDP support via uIP

7
configs/mcu123-lpc214x/usbstorage/defconfig
View File

@ -308,8 +308,15 @@ CONFIG_FS_ROMFS=n
# Number of MMC/SD slots supported by the driver
# CONFIG_MMCSD_READONLY
# Provide read-only access (default is read/write)
# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
# Default is 20MHz.
# CONFIG_MMCSD_SYNCHRONIZE
# Special synchronization logic needed
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
#CONFIG_MMCSD_SPICLOCK=20000000
CONFIG_MMCSD_SYNCHRONIZE=y
#
# TCP/IP and UDP support via uIP

49
drivers/mmcsd/mmcsd_spi.c
View File

@ -168,6 +168,9 @@ static void mmcsd_semtake(sem_t *sem);
/* Card SPI interface *******************************************************/
#ifdef CONFIG_MMCSD_SYNCHRONIZE
static inline void mmcsd_synchronize(FAR struct mmcsd_slot_s *slot);
#endif
static int mmcsd_waitready(FAR struct mmcsd_slot_s *slot);
static uint32 mmcsd_sendcmd(FAR struct mmcsd_slot_s *slot,
const struct mmcsd_cmdinfo_s *cmd, uint32 arg);
@ -343,6 +346,38 @@ static void mmcsd_semtake(sem_t *sem)
#define mmcsd_semgive(sem) sem_post(sem)
/****************************************************************************
* Name: mmcsd_synchronize
*
* Description:
* Wait until the the card is no longer busy
*
* Assumptions:
* MMC/SD card already selected
*
****************************************************************************/
#ifdef CONFIG_MMCSD_SYNCHRONIZE
static inline void mmcsd_synchronize(FAR struct mmcsd_slot_s *slot)
{
FAR struct spi_dev_s *spi = slot->spi;
/* De-select the MMCSD card */
SPI_SELECT(spi, SPIDEV_MMCSD, FALSE);
/* Wait a bit */
SPI_SEND(spi, 0xff);
/* Reselect the card */
SPI_SELECT(spi, SPIDEV_MMCSD, TRUE);
}
#else
# define mmcsd_synchronize(slot) /* No synchronization needed */s
#endif
/****************************************************************************
* Name: mmcsd_waitready
*
@ -804,6 +839,7 @@ static int mmcsd_getcardinfo(FAR struct mmcsd_slot_s *slot, ubyte *buffer,
/* Send the CMD9 or CMD10 */
mmcsd_synchronize(slot);
result = mmcsd_sendcmd(slot, cmd, 0);
if (result != MMCSD_SPIR1_OK)
{
@ -1081,7 +1117,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
mmcsd_semtake(&slot->sem);
SPI_SELECT(spi, SPIDEV_MMCSD, TRUE);
SPI_SEND(spi, 0xff);
mmcsd_synchronize(slot);
/* Single or multiple block read? */
@ -1108,7 +1144,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer,
}
else
{
/* Send CMD17: Reads a block of the size selected by the SET_BLOCKLEN
/* Send CMD18: Reads a block of the size selected by the SET_BLOCKLEN
* command and verify that good R1 status is returned
*/
@ -1243,7 +1279,7 @@ static ssize_t mmcsd_write(FAR struct inode *inode, const unsigned char *buffer,
mmcsd_semtake(&slot->sem);
SPI_SELECT(spi, SPIDEV_MMCSD, TRUE);
SPI_SEND(spi, 0xff);
mmcsd_synchronize(slot);
/* Single or multiple block transfer? */
@ -1533,9 +1569,11 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
do
{
fvdbg("%d. Send CMD55/ACMD41\n", elapsed);
mmcsd_synchronize(slot);
result = mmcsd_sendcmd(slot, &g_cmd55, 0);
if (result == MMCSD_SPIR1_IDLESTATE || result == MMCSD_SPIR1_OK)
{
mmcsd_synchronize(slot);
result = mmcsd_sendcmd(slot, &g_acmd41, 1 << 30);
if (result == MMCSD_SPIR1_OK)
{
@ -1578,11 +1616,13 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
/* Both the MMC card and the SD card support CMD55 */
fvdbg("Send CMD55/ACMD41\n");
mmcsd_synchronize(slot);
result = mmcsd_sendcmd(slot, &g_cmd55, 0);
if (result == MMCSD_SPIR1_IDLESTATE || result == MMCSD_SPIR1_OK)
{
/* But ACMD41 is supported only on SD */
mmcsd_synchronize(slot);
result = mmcsd_sendcmd(slot, &g_acmd41, 0);
if (result == MMCSD_SPIR1_IDLESTATE || result == MMCSD_SPIR1_OK)
{
@ -1600,9 +1640,11 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
if (IS_SD(slot->type))
{
fvdbg("%d. Send CMD55/ACMD41\n", elapsed);
mmcsd_synchronize(slot);
result = mmcsd_sendcmd(slot, &g_cmd55, 0);
if (result == MMCSD_SPIR1_IDLESTATE || result == MMCSD_SPIR1_OK)
{
mmcsd_synchronize(slot);
result = mmcsd_sendcmd(slot, &g_acmd41, 0);
if (result == MMCSD_SPIR1_OK)
{
@ -1613,6 +1655,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
else
{
fvdbg("%d. Send CMD1\n", i);
mmcsd_synchronize(slot);
result = mmcsd_sendcmd(slot, &g_cmd1, 0);
if (result == MMCSD_SPIR1_OK)
{