From 5db8af3015198a884b685c59968e42f9d7dc4992 Mon Sep 17 00:00:00 2001 From: patacongo Date: Mon, 28 Jan 2008 22:32:40 +0000 Subject: [PATCH] UART config is untested git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@578 42af7a65-404d-4744-a932-0658087f49c3 --- TODO | 18 ++++++++++++++---- arch/arm/src/c5471/c5471_serial.c | 8 +++++--- arch/arm/src/common/up_internal.h | 2 +- arch/arm/src/dm320/dm320_serial.c | 12 ++++++------ arch/c5471/src/up_internal.h | 2 +- arch/c5471/src/up_serial.c | 8 +++++--- arch/dm320/src/up_internal.h | 2 +- arch/dm320/src/up_serial.c | 12 ++++++------ 8 files changed, 39 insertions(+), 25 deletions(-) diff --git a/TODO b/TODO index 5ff1cabccd..4ef87b23c3 100644 --- a/TODO +++ b/TODO @@ -16,8 +16,8 @@ NuttX TODO List (Last updated January 6, 2008) (3) Build system (0) Applications & Tests (examples/) (1) ARM (arch/arm/) - (0) ARM/C5471 (arch/arm/src/c5471/) - (1) ARM/DM320 (arch/arm/src/dm320/) + (1) ARM/C5471 (arch/arm/src/c5471/) + (2) ARM/DM320 (arch/arm/src/dm320/) (2) ARM/LPC214x (arch/arm/src/lpc214x/) (4) pjrc-8052 / MCS51 (arch/pjrc-8051/) (2) z80 (arch/z80/) @@ -275,11 +275,16 @@ o ARM (arch/arm/) present, each interrupt executes on top of the user stack allocation making each user stack allocation larger than needed. Status: Open - Priority: Medim + Priority: Medium o ARM/C5471 (arch/arm/src/c5471/) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + Description: UART re-configuration is untested and conditionally compiled out. + Status: Open + Priority: Medium. ttyS1 is not configured, but not used; ttyS0 is configured + by the bootloader + o ARM/DM320 (arch/arm/src/dm320/) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -289,7 +294,12 @@ o ARM/DM320 (arch/arm/src/dm320/) the stack seems to fix the problem (might also be the bootloader overwriting memory) Status: Open - Priority: Mediam + Priority: Medium + + Description: UART re-configuration is untested and conditionally compiled out. + Status: Open + Priority: Medium. ttyS1 is not configured, but not used; ttyS0 is configured + by the bootloader o ARM/LPC214x (arch/arm/src/lpc214x/) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/arch/arm/src/c5471/c5471_serial.c b/arch/arm/src/c5471/c5471_serial.c index 9ff5b5be9f..375bacd814 100644 --- a/arch/arm/src/c5471/c5471_serial.c +++ b/arch/arm/src/c5471/c5471_serial.c @@ -409,16 +409,18 @@ static int up_setup(struct uart_dev_s *dev) up_disablebreaks(priv); - priv->regs.fcr = (priv->regs.fcr & 0xffffffcf) | (val & 0x30); + /* Set the RX and TX trigger levels to the minimum */ + + priv->regs.fcr = (priv->regs.fcr & 0xffffffcf) | UART_FCR_FTL; up_serialout(priv, UART_RFCR_OFFS, priv->regs.fcr); - priv->regs.fcr = (priv->regs.fcr & 0xffffff3f) | (val & 0xc0); + priv->regs.fcr = (priv->regs.fcr & 0xffffff3f) | UART_FCR_FTL; up_serialout(priv, UART_RFCR_OFFS, priv->regs.fcr); up_setrate(priv, priv->baud); priv->regs.lcr &= 0xffffffe0; /* clear original field, and... */ - priv->regs.lcr |= (uint32)mode; /* Set new bits in that field. */ + priv->regs.lcr |= (uint32)cval; /* Set new bits in that field. */ up_serialout(priv, UART_LCR_OFFS, priv->regs.lcr); #ifdef CONFIG_UART_HWFLOWCONTROL diff --git a/arch/arm/src/common/up_internal.h b/arch/arm/src/common/up_internal.h index a2be035ff8..4d84f2cdd4 100644 --- a/arch/arm/src/common/up_internal.h +++ b/arch/arm/src/common/up_internal.h @@ -52,7 +52,7 @@ #undef CONFIG_SUPPRESS_INTERRUPTS /* Do not enable interrupts */ #undef CONFIG_SUPPRESS_TIMER_INTS /* No timer */ #undef CONFIG_SUPPRESS_SERIAL_INTS /* Console will poll */ -#undef CONFIG_SUPPRESS_UART_CONFIG /* Do not reconfig UART */ +#define CONFIG_SUPPRESS_UART_CONFIG 1 /* Do not reconfig UART */ #undef CONFIG_DUMP_ON_EXIT /* Dump task state on exit */ /**************************************************************************** diff --git a/arch/arm/src/dm320/dm320_serial.c b/arch/arm/src/dm320/dm320_serial.c index 4f90fd5d31..be32d269bc 100644 --- a/arch/arm/src/dm320/dm320_serial.c +++ b/arch/arm/src/dm320/dm320_serial.c @@ -292,13 +292,13 @@ static int up_setup(struct uart_dev_s *dev) /* Clear fifos */ - up_serialout(priv, UART_DM320_RFCR, 0x8000); - up_serialout(priv, UART_DM320_TFCR, 0x8000); + up_serialout(priv, UART_RFCR, 0x8000); + up_serialout(priv, UART_TFCR, 0x8000); /* Set rx and tx triggers */ - up_serialout(priv, UART_DM320_RFCR, UART_RFCR_RTL_1); - up_serialout(priv, UART_DM320_TFCR, UART_TFCR_TTL_16); + up_serialout(priv, UART_RFCR, UART_RFCR_RTL_1); + up_serialout(priv, UART_TFCR, UART_TFCR_TTL_16); /* Set up the MSR */ @@ -336,7 +336,7 @@ static int up_setup(struct uart_dev_s *dev) /* Set up the BRSR */ - switch (dev->baud) + switch (priv->baud) { case 2400: brsr = UART_BAUD_2400; @@ -380,7 +380,7 @@ static int up_setup(struct uart_dev_s *dev) /* Setup the new UART configuration */ up_serialout(priv,UART_MSR, priv->msr); - up_serialout(priv, UART_DM320_BRSR, brsr); + up_serialout(priv, UART_BRSR, brsr); up_enablebreaks(priv, FALSE); #endif return OK; diff --git a/arch/c5471/src/up_internal.h b/arch/c5471/src/up_internal.h index c032fa5434..fc3333bf95 100644 --- a/arch/c5471/src/up_internal.h +++ b/arch/c5471/src/up_internal.h @@ -60,7 +60,7 @@ #undef CONFIG_SUPPRESS_INTERRUPTS /* Do not enable interrupts */ #undef CONFIG_SUPPRESS_TIMER_INTS /* No timer */ #undef CONFIG_SUPPRESS_SERIAL_INTS /* Console will poll */ -#undef CONFIG_SUPPRESS_UART_CONFIG /* Do not reconfig UART */ +#define CONFIG_SUPPRESS_UART_CONFIG 1 /* Do not reconfig UART */ #undef CONFIG_DUMP_ON_EXIT /* Dump task state on exit */ /************************************************************ diff --git a/arch/c5471/src/up_serial.c b/arch/c5471/src/up_serial.c index 3cba4a2d88..7b2b9a24eb 100644 --- a/arch/c5471/src/up_serial.c +++ b/arch/c5471/src/up_serial.c @@ -406,16 +406,18 @@ static int up_setup(struct uart_dev_s *dev) up_disablebreaks(priv); - priv->regs.fcr = (priv->regs.fcr & 0xffffffcf) | (val & 0x30); + /* Set the RX and TX trigger levels to the minimum */ + + priv->regs.fcr = (priv->regs.fcr & 0xffffffcf) | UART_FCR_FTL; up_serialout(priv, UART_RFCR_OFFS, priv->regs.fcr); - priv->regs.fcr = (priv->regs.fcr & 0xffffff3f) | (val & 0xc0); + priv->regs.fcr = (priv->regs.fcr & 0xffffff3f) | UART_FCR_FTL; up_serialout(priv, UART_RFCR_OFFS, priv->regs.fcr); up_setrate(priv, priv->baud); priv->regs.lcr &= 0xffffffe0; /* clear original field, and... */ - priv->regs.lcr |= (uint32)mode; /* Set new bits in that field. */ + priv->regs.lcr |= (uint32)cval; /* Set new bits in that field. */ up_serialout(priv, UART_LCR_OFFS, priv->regs.lcr); #ifdef CONFIG_UART_HWFLOWCONTROL diff --git a/arch/dm320/src/up_internal.h b/arch/dm320/src/up_internal.h index 6360d552bc..16112d9808 100644 --- a/arch/dm320/src/up_internal.h +++ b/arch/dm320/src/up_internal.h @@ -52,7 +52,7 @@ #undef CONFIG_SUPPRESS_INTERRUPTS /* Do not enable interrupts */ #undef CONFIG_SUPPRESS_TIMER_INTS /* No timer */ #undef CONFIG_SUPPRESS_SERIAL_INTS /* Console will poll */ -#undef CONFIG_SUPPRESS_UART_CONFIG /* Do not reconfig UART */ +#define CONFIG_SUPPRESS_UART_CONFIG 1 /* Do not reconfig UART */ #define CONFIG_DUMP_ON_EXIT 1 /* Dump task state on exit */ /************************************************************ diff --git a/arch/dm320/src/up_serial.c b/arch/dm320/src/up_serial.c index 3d7c098373..bf6560f1c8 100644 --- a/arch/dm320/src/up_serial.c +++ b/arch/dm320/src/up_serial.c @@ -287,13 +287,13 @@ static int up_setup(struct uart_dev_s *dev) /* Clear fifos */ - up_serialout(priv, UART_DM320_RFCR, 0x8000); - up_serialout(priv, UART_DM320_TFCR, 0x8000); + up_serialout(priv, UART_RFCR, 0x8000); + up_serialout(priv, UART_TFCR, 0x8000); /* Set rx and tx triggers */ - up_serialout(priv, UART_DM320_RFCR, UART_RFCR_RTL_1); - up_serialout(priv, UART_DM320_TFCR, UART_TFCR_TTL_16); + up_serialout(priv, UART_RFCR, UART_RFCR_RTL_1); + up_serialout(priv, UART_TFCR, UART_TFCR_TTL_16); /* Set up the MSR */ @@ -331,7 +331,7 @@ static int up_setup(struct uart_dev_s *dev) /* Set up the BRSR */ - switch (dev->baud) + switch (priv->baud) { case 2400: brsr = UART_BAUD_2400; @@ -375,7 +375,7 @@ static int up_setup(struct uart_dev_s *dev) /* Setup the new UART configuration */ up_serialout(priv,UART_MSR, priv->msr); - up_serialout(priv, UART_DM320_BRSR, brsr); + up_serialout(priv, UART_BRSR, brsr); up_enablebreaks(priv, FALSE); #endif return OK;