From 5e0734a661f11ee23ebb8f555bff0f8ffaaec932 Mon Sep 17 00:00:00 2001 From: patacongo Date: Mon, 9 Jan 2012 21:34:58 +0000 Subject: [PATCH] Finish PWM pulse count configuration git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4287 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/src/stm32/stm32_pwm.c | 8 ++++---- arch/mips/src/pic32mx/pic32mx-usbdev.c | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c index c55ab23c5d..7be44642d9 100644 --- a/arch/arm/src/stm32/stm32_pwm.c +++ b/arch/arm/src/stm32/stm32_pwm.c @@ -169,7 +169,7 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv); #if defined(CONFIG_STM32_TIM1_PWM) static int pwm_tim1interrupt(int irq, void *context); #endif -#if defined(CONFIG_STM32_TIM1_PWM) +#if defined(CONFIG_STM32_TIM8_PWM) static int pwm_tim8interrupt(int irq, void *context); #endif #endif @@ -906,12 +906,12 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv) { /* Verify that this is an update interrupt. Nothing else is expected. */ - pwmllvdbg("Update interrupt: %04x\n", pwm_getreg(STM32_GTIM_SR_OFFSET)); - DEBUGASSERT((pwm_getreg(STM32_GTIM_SR_OFFSET) & ATIM_SR_UIF) != 0); + pwmllvdbg("Update interrupt: %04x\n", pwm_getreg(priv, STM32_GTIM_SR_OFFSET)); + DEBUGASSERT((pwm_getreg(priv, STM32_GTIM_SR_OFFSET) & ATIM_SR_UIF) != 0); /* Disable further interrupts and stop the timer */ - (void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv) + (void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv); /* Then perform the callback into the upper half driver */ diff --git a/arch/mips/src/pic32mx/pic32mx-usbdev.c b/arch/mips/src/pic32mx/pic32mx-usbdev.c index 6028a6a27f..65a7c9162f 100644 --- a/arch/mips/src/pic32mx/pic32mx-usbdev.c +++ b/arch/mips/src/pic32mx/pic32mx-usbdev.c @@ -2163,7 +2163,7 @@ static int pic32mx_interrupt(int irq, void *context) usbir = pic32mx_getreg(PIC32MX_USB_IR) & pic32mx_getreg(PIC32MX_USB_IE); otgir = pic32mx_getreg(PIC32MX_USBOTG_IR) & pic32mx_getreg(PIC32MX_USBOTG_IE); - usbtrace(TRACE_INTENTRY(PIC32MX_TRACEINTID_INTERRUPT), usbir|otgir); + usbtrace(TRACE_INTENTRY(PIC32MX_TRACEINTID_INTERRUPT), usbir | otgir); #ifdef CONFIG_USBOTG /* Session Request Protocol (SRP) Time Out Check */ @@ -2396,7 +2396,7 @@ static int pic32mx_interrupt(int irq, void *context) interrupt_exit: up_clrpend_irq(PIC32MX_IRQSRC_USB); - usbtrace(TRACE_INTEXIT(PIC32MX_TRACEINTID_INTERRUPT), usbir | usbotg); + usbtrace(TRACE_INTEXIT(PIC32MX_TRACEINTID_INTERRUPT), usbir | otgir); return OK; }