arch/arm/src/samd5e5: Bring in untested SPI and I2C drivers from SAMD2L2.

This commit is contained in:
Gregory Nutt 2018-07-29 07:43:21 -06:00
parent 9a24e7b724
commit 5e4c63ed58
6 changed files with 3619 additions and 42 deletions

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@ -480,9 +480,9 @@ choice
depends on SAMD5E5_SERCOM0
config SAMD5E5_SERCOM0_ISI2C
bool "I2C"
bool "I2C Master"
select I2C
select SAMD5E5_HAVE_I2C
select SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SERCOM0_ISSPI
bool "SPI"
@ -500,9 +500,9 @@ choice
depends on SAMD5E5_SERCOM1
config SAMD5E5_SERCOM1_ISI2C
bool "I2C"
bool "I2C Master"
select I2C
select SAMD5E5_HAVE_I2C
select SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SERCOM1_ISSPI
bool "SPI"
@ -520,9 +520,9 @@ choice
depends on SAMD5E5_SERCOM2
config SAMD5E5_SERCOM2_ISI2C
bool "I2C"
bool "I2C Master"
select I2C
select SAMD5E5_HAVE_I2C
select SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SERCOM2_ISSPI
bool "SPI"
@ -540,9 +540,9 @@ choice
depends on SAMD5E5_SERCOM3
config SAMD5E5_SERCOM3_ISI2C
bool "I2C"
bool "I2C Master"
select I2C
select SAMD5E5_HAVE_I2C
select SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SERCOM3_ISSPI
bool "SPI"
@ -560,9 +560,9 @@ choice
depends on SAMD5E5_SERCOM4
config SAMD5E5_SERCOM4_ISI2C
bool "I2C"
bool "I2C Master"
select I2C
select SAMD5E5_HAVE_I2C
select SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SERCOM4_ISSPI
bool "SPI"
@ -580,9 +580,9 @@ choice
depends on SAMD5E5_SERCOM5
config SAMD5E5_SERCOM5_ISI2C
bool "I2C"
bool "I2C Master"
select I2C
select SAMD5E5_HAVE_I2C
select SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SERCOM5_ISSPI
bool "SPI"
@ -600,9 +600,9 @@ choice
depends on SAMD5E5_SERCOM6
config SAMD5E5_SERCOM6_ISI2C
bool "I2C"
bool "I2C Master"
select I2C
select SAMD5E5_HAVE_I2C
select SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SERCOM6_ISSPI
bool "SPI"
@ -620,9 +620,9 @@ choice
depends on SAMD5E5_SERCOM7
config SAMD5E5_SERCOM7_ISI2C
bool "I2C"
bool "I2C Master"
select I2C
select SAMD5E5_HAVE_I2C
select SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SERCOM7_ISSPI
bool "SPI"
@ -636,10 +636,11 @@ endchoice
config SAMD5E5_HAVE_SPI
bool
default n
select SPI
menu "SPI options"
depends on SAMD5E5_HAVE_SPI
depends on SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_SPI_DMA
bool "SPI DMA"
@ -657,12 +658,13 @@ config SAMD5E5_SPI_REGDEBUG
endmenu # SPI options
config SAMD5E5_HAVE_I2C
config SAMD5E5_HAVE_I2C_MASTER
bool
default n
select I2C
menu "I2C options"
depends on SAMD5E5_HAVE_I2C
menu "I2C master options"
depends on SAMD5E5_HAVE_I2C_MASTER
config SAMD5E5_I2C_REGDEBUG
bool "I2C register-Level Debug"

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@ -128,6 +128,14 @@ ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
CHIP_CSRCS += sam_idle.c
endif
ifeq ($(CONFIG_SAMD5E5_HAVE_SPI),y)
CHIP_CSRCS += sam_spi.c
endif
ifeq ($(CONFIG_SAMD5E5_HAVE_I2C_MASTER),y)
CHIP_CSRCS += sam_i2c_master.c
endif
ifeq ($(CONFIG_SAMD5E5_WDT),y)
CHIP_CSRCS += sam_wdt.c
endif

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@ -298,63 +298,63 @@
/* Are any SERCOM peripherals are configured as I2C peripherals? */
#define SAMD5E5_HAVE_I2C0 1
#define SAMD5E5_HAVE_I2C1 1
#define SAMD5E5_HAVE_I2C2 1
#define SAMD5E5_HAVE_I2C3 1
#define SAMD5E5_HAVE_I2C4 1
#define SAMD5E5_HAVE_I2C5 1
#define SAMD5E5_HAVE_I2C6 1
#define SAMD5E5_HAVE_I2C7 1
#define SAMD5E5_HAVE_I2C0_MASTER 1
#define SAMD5E5_HAVE_I2C1_MASTER 1
#define SAMD5E5_HAVE_I2C2_MASTER 1
#define SAMD5E5_HAVE_I2C3_MASTER 1
#define SAMD5E5_HAVE_I2C4_MASTER 1
#define SAMD5E5_HAVE_I2C5_MASTER 1
#define SAMD5E5_HAVE_I2C6_MASTER 1
#define SAMD5E5_HAVE_I2C7_MASTER 1
#if !defined(CONFIG_SAMD5E5_SERCOM0) || !defined(CONFIG_SAMD5E5_SERCOM0_ISI2C)
# undef SAMD5E5_HAVE_I2C0
# undef SAMD5E5_HAVE_I2C0_MASTER
# undef CONFIG_SAMD5E5_SERCOM0_ISI2C
#endif
#if !defined(CONFIG_SAMD5E5_SERCOM1) || !defined(CONFIG_SAMD5E5_SERCOM1_ISI2C)
# undef SAMD5E5_HAVE_I2C1
# undef SAMD5E5_HAVE_I2C1_MASTER
# undef CONFIG_SAMD5E5_SERCOM1_ISI2C
#endif
#if !defined(CONFIG_SAMD5E5_SERCOM2) || !defined(CONFIG_SAMD5E5_SERCOM2_ISI2C)
# undef SAMD5E5_HAVE_I2C2
# undef SAMD5E5_HAVE_I2C2_MASTER
# undef CONFIG_SAMD5E5_SERCOM2_ISI2C
#endif
#if !defined(CONFIG_SAMD5E5_SERCOM3) || !defined(CONFIG_SAMD5E5_SERCOM3_ISI2C)
# undef SAMD5E5_HAVE_I2C3
# undef SAMD5E5_HAVE_I2C3_MASTER
# undef CONFIG_SAMD5E5_SERCOM3_ISI2C
#endif
#if !defined(CONFIG_SAMD5E5_SERCOM4) || !defined(CONFIG_SAMD5E5_SERCOM4_ISI2C)
# undef SAMD5E5_HAVE_I2C4
# undef SAMD5E5_HAVE_I2C4_MASTER
# undef CONFIG_SAMD5E5_SERCOM4_ISI2C
#endif
#if !defined(CONFIG_SAMD5E5_SERCOM5) || !defined(CONFIG_SAMD5E5_SERCOM5_ISI2C)
# undef SAMD5E5_HAVE_I2C5
# undef SAMD5E5_HAVE_I2C5_MASTER
# undef CONFIG_SAMD5E5_SERCOM5_ISI2C
#endif
#if !defined(CONFIG_SAMD5E5_SERCOM6) || !defined(CONFIG_SAMD5E5_SERCOM6_ISI2C)
# undef SAMD5E5_HAVE_I2C6
# undef SAMD5E5_HAVE_I2C6_MASTER
# undef CONFIG_SAMD5E5_SERCOM6_ISI2C
#endif
#if !defined(CONFIG_SAMD5E5_SERCOM7) || !defined(CONFIG_SAMD5E5_SERCOM7_ISI2C)
# undef SAMD5E5_HAVE_I2C7
# undef SAMD5E5_HAVE_I2C7_MASTER
# undef CONFIG_SAMD5E5_SERCOM7_ISI2C
#endif
/* Are any SERCOMs configured for I2C? */
#undef SAMD5E5_HAVE_I2C
#if defined(SAMD5E5_HAVE_I2C0) || defined(SAMD5E5_HAVE_I2C1) || \
defined(SAMD5E5_HAVE_I2C2) || defined(SAMD5E5_HAVE_I2C3) || \
defined(SAMD5E5_HAVE_I2C4) || defined(SAMD5E5_HAVE_I2C5) || \
defined(SAMD5E5_HAVE_I2C6) || defined(SAMD5E5_HAVE_I2C7)
# define SAMD5E5_HAVE_I2C 1
#undef SAMD5E5_HAVE_I2C_MASTER
#if defined(SAMD5E5_HAVE_I2C0_MASTER) || defined(SAMD5E5_HAVE_I2C1_MASTER) || \
defined(SAMD5E5_HAVE_I2C2_MASTER) || defined(SAMD5E5_HAVE_I2C3_MASTER) || \
defined(SAMD5E5_HAVE_I2C4_MASTER) || defined(SAMD5E5_HAVE_I2C5_MASTER) || \
defined(SAMD5E5_HAVE_I2C6_MASTER) || defined(SAMD5E5_HAVE_I2C7_MASTER)
# define SAMD5E5_HAVE_I2C_MASTER 1
#endif
/************************************************************************************

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@ -0,0 +1,310 @@
/****************************************************************************
* arch/arm/src/samd5e5/sam_spi.h
*
* Copyright (C) 2018Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMD5E5_SAM_SPI_H
#define __ARCH_ARM_SRC_SAMD5E5_SAM_SPI_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include "chip/sam_spi.h"
#ifdef SAMD5E5_HAVE_SPI
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline Functions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
struct spi_dev_s; /* Forward reference */
/****************************************************************************
* Name: sam_spibus_initialize
*
* Description:
* Initialize the selected SPI port
*
* Input Parameters:
* port - SPI "port" number (i.e., SERCOM number)
*
* Returned Value:
* Valid SPI device structure reference on success; a NULL on failure
*
****************************************************************************/
struct spi_dev_s *sam_spibus_initialize(int port);
/****************************************************************************
* Name: sam_spi[n]select, sam_spi[n]status, and sam_spi[n]cmddata
*
* Description:
* These external functions must be provided by board-specific logic. They
* include:
*
* o sam_spi[n]select is a functions to manage the board-specific chip
* selects
* o sam_spi[n]status and sam_spi[n]cmddata: Implementations of the status
* and cmddata methods of the SPI interface defined by struct spi_ops_
* (see include/nuttx/spi/spi.h). All other methods including
* sam_spibus_initialize()) are provided by common SAMD/L logic.
*
* Where [n] is the SERCOM number for the SPI module.
*
* To use this common SPI logic on your board:
*
* 1. Provide logic in sam_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide sam_spi[n]select() and sam_spi[n]status() functions in your
* board-specific logic. These functions will perform chip selection
* and status operations using GPIOs in the way your board is configured.
* 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
* sam_spi[n]cmddata() functions in your board-specific logic. This
* function will perform cmd/data selection operations using GPIOs in
* the way your board is configured.
* 3. Add a call to sam_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by sam_spibus_initialize() may then be used to bind
* the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
/****************************************************************************
* Name: sam_spi[n]select
*
* Description:
* PIO chip select pins may be programmed by the board specific logic in
* one of two different ways. First, the pins may be programmed as SPI
* peripherals. In that case, the pins are completely controlled by the
* SPI driver. This method still needs to be provided, but it may be only
* a stub.
*
* An alternative way to program the PIO chip select pins is as a normal
* GPIO output. In that case, the automatic control of the CS pins is
* bypassed and this function must provide control of the chip select.
* NOTE: In this case, the GPIO output pin does *not* have to be the
* same as the NPCS pin normal associated with the chip select number.
*
* Input Parameters:
* dev - SPI device info
* devid - Identifies the (logical) device
* selected - TRUE:Select the device, FALSE:De-select the device
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef SAMD5E5_HAVE_SPI0
void sam_spi0select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMD5E5_HAVE_SPI1
void sam_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMD5E5_HAVE_SPI2
void sam_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMD5E5_HAVE_SPI3
void sam_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMD5E5_HAVE_SPI4
void sam_spi4select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMD5E5_HAVE_SPI5
void sam_spi5select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMD5E5_HAVE_SPI6
void sam_spi6select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
#ifdef SAMD5E5_HAVE_SPI7
void sam_spi7select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected);
#endif
/****************************************************************************
* Name: sam_spi[n]status
*
* Description:
* Return status information associated with the SPI device.
*
* Input Parameters:
* dev - SPI device info
* devid - Identifies the (logical) device
*
* Returned Value:
* Bit-encoded SPI status (see include/nuttx/spi/spi.h.
*
****************************************************************************/
#ifdef SAMD5E5_HAVE_SPI0
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMD5E5_HAVE_SPI1
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMD5E5_HAVE_SPI2
uint8_t sam_spi2status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMD5E5_HAVE_SPI3
uint8_t sam_spi3status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMD5E5_HAVE_SPI4
uint8_t sam_spi4status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMD5E5_HAVE_SPI5
uint8_t sam_spi5status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMD5E5_HAVE_SPI6
uint8_t sam_spi6status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
#ifdef SAMD5E5_HAVE_SPI7
uint8_t sam_spi7status(FAR struct spi_dev_s *dev, uint32_t devid);
#endif
/****************************************************************************
* Name: sam_spi[n]cmddata
*
* Description:
* Some SPI devices require an additional control to determine if the SPI
* data being sent is a command or is data. If CONFIG_SPI_CMDDATA then
* this function will be called to different be command and data transfers.
*
* This is often needed, for example, by LCD drivers. Some LCD hardware
* may be configured to use 9-bit data transfers with the 9th bit
* indicating command or data. That same hardware may be configurable,
* instead, to use 8-bit data but to require an additional, board-
* specific GPIO control to distinguish command and data. This function
* would be needed in that latter case.
*
* Input Parameters:
* dev - SPI device info
* devid - Identifies the (logical) device
*
* Returned Value:
* Zero on success; a negated errno on failure.
*
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef SAMD5E5_HAVE_SPI0
int sam_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMD5E5_HAVE_SPI1
int sam_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMD5E5_HAVE_SPI2
int sam_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMD5E5_HAVE_SPI3
int sam_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMD5E5_HAVE_SPI4
int sam_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMD5E5_HAVE_SPI5
int sam_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMD5E5_HAVE_SPI6
int sam_spi6cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef SAMD5E5_HAVE_SPI7
int sam_spi7cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* SAMD5E5_HAVE_SPI */
#endif /* __ARCH_ARM_SRC_SAMD5E5_SAM_SPI_H */