Corrections for LPC178x UART baud calculation
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5698 42af7a65-404d-4744-a932-0658087f49c3
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@ -139,15 +139,27 @@
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* BAUD = PCLK / (16 * DL), or
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* DL = PCLK / BAUD / 16
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*
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* Where:
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* Where for the LPC176x the PCLK is determined by the UART-specific divisor in
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* PCLKSEL0 or PCLKSEL1:
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*
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* PCLK = CCLK / divisor
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*
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* And for the LPC178x, the PCLK is determined by the global divisor setting in
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* the PLKSEL register.
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*
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* Ignoring the fractional divider for now. (If you want to extend this driver
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* to support the fractional divider, see lpc43xx_uart.c. The LPC43xx uses
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* the same peripheral and that logic could easily leveraged here).
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*
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* Check divisor == 1. This works if the upper limit is met:
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*/
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#ifdef LPC178x
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/* Use the global PCLK frequency */
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# define CONSOLE_NUMERATOR BOARD_PCLK_FREQUENCY
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#else
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/* Calculate and optimal PCLKSEL0/1 divisor.
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* First, check divisor == 1. This works if the upper limit is met:
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*
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* DL < 0xffff, or
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* PCLK / BAUD / 16 < 0xffff, or
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@ -211,6 +223,7 @@
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# define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK8
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# define CONSOLE_NUMERATOR (LPC17_CCLK / 8)
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# endif
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#endif /* LPC178x */
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/* Then this is the value to use for the DLM and DLL registers */
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@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/lpc17xx/lpc17_serial.c
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*
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* Copyright (C) 2010-2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2010-2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -91,7 +91,9 @@ struct up_dev_s
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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#ifdef LPC176x
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uint8_t cclkdiv; /* Divisor needed to get PCLK from CCLK */
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#endif
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bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
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};
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@ -554,7 +556,17 @@ static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
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* PCLK = CCLK / divisor
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* BAUD = PCLK / (16 * DL)
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*
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* Ignoring the fractional divider for now.
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* Ignoring the fractional divider for now. (If you want to extend this driver
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* to support the fractional divider, see lpc43xx_uart.c. The LPC43xx uses
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* the same peripheral and that logic could easily leveraged here).
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*
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* For the LPC176x the PCLK is determined by the UART-specific divisor in
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* PCLKSEL0 or PCLKSEL1:
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*
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* PCLK = CCLK / divisor
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*
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* For the LPC178x, the PCLK is determined by the global divisor setting in
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* the PLKSEL register (and, in that case, this function is not needed).
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*
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* NOTE: This is an inline function. If a typical optimization level is used and
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* a constant is provided for the desired frequency, then most of the following
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@ -562,6 +574,7 @@ static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
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*
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************************************************************************************/
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#ifdef LPC176x
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static inline uint32_t lpc17_uartcclkdiv(uint32_t baud)
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{
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/* Ignoring the fractional divider, the BAUD is given by:
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@ -569,11 +582,17 @@ static inline uint32_t lpc17_uartcclkdiv(uint32_t baud)
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* BAUD = PCLK / (16 * DL), or
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* DL = PCLK / BAUD / 16
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*
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* Where:
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* Where for the LPC176x the PCLK is determined by the UART-specific divisor in
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* PCLKSEL0 or PCLKSEL1:
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*
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* PCLK = CCLK / divisor.
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* PCLK = CCLK / divisor
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*
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* Check divisor == 1. This works if the upper limit is met
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* And for the LPC178x, the PCLK is determined by the global divisor setting in
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* the PLKSEL register (and, in that case, this function is not needed).
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*/
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/* Calculate and optimal PCLKSEL0/1 divisor.
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* First, check divisor == 1. This works if the upper limit is met:
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*
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* DL < 0xffff, or
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* PCLK / BAUD / 16 < 0xffff, or
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@ -641,6 +660,7 @@ static inline uint32_t lpc17_uartcclkdiv(uint32_t baud)
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return SYSCON_PCLKSEL_CCLK8;
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}
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}
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#endif /* LPC176x */
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/************************************************************************************
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* Name: lpc17_uart0config, uart1config, uart2config, and uart3config
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@ -661,7 +681,7 @@ static inline uint32_t lpc17_uartcclkdiv(uint32_t baud)
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************************************************************************************/
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#ifdef CONFIG_LPC17_UART0
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static inline void lpc17_uart0config(uint32_t clkdiv)
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static inline void lpc17_uart0config(void)
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{
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uint32_t regval;
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irqstate_t flags;
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@ -675,10 +695,12 @@ static inline void lpc17_uart0config(uint32_t clkdiv)
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/* Step 2: Enable clocking on UART */
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#ifdef LPC176x
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regval = getreg32(LPC17_SYSCON_PCLKSEL0);
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regval &= ~SYSCON_PCLKSEL0_UART0_MASK;
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regval |= (clkdiv << SYSCON_PCLKSEL0_UART0_SHIFT);
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regval |= ((uint32_t)g_uart0priv.cclkdiv << SYSCON_PCLKSEL0_UART0_SHIFT);
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putreg32(regval, LPC17_SYSCON_PCLKSEL0);
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#endif
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/* Step 3: Configure I/O pins */
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@ -689,7 +711,7 @@ static inline void lpc17_uart0config(uint32_t clkdiv)
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#endif
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#ifdef CONFIG_LPC17_UART1
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static inline void lpc17_uart1config(uint32_t clkdiv)
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static inline void lpc17_uart1config(void)
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{
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uint32_t regval;
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irqstate_t flags;
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@ -703,10 +725,12 @@ static inline void lpc17_uart1config(uint32_t clkdiv)
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/* Step 2: Enable clocking on UART */
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#ifdef LPC176x
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regval = getreg32(LPC17_SYSCON_PCLKSEL0);
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regval &= ~SYSCON_PCLKSEL0_UART1_MASK;
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regval |= (clkdiv << SYSCON_PCLKSEL0_UART1_SHIFT);
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regval |= ((uint32_t)g_uart1priv.cclkdiv << SYSCON_PCLKSEL0_UART1_SHIFT);
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putreg32(regval, LPC17_SYSCON_PCLKSEL0);
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#endif
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/* Step 3: Configure I/O pins */
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@ -727,7 +751,7 @@ static inline void lpc17_uart1config(uint32_t clkdiv)
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#endif
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#ifdef CONFIG_LPC17_UART2
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static inline void lpc17_uart2config(uint32_t clkdiv)
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static inline void lpc17_uart2config(void)
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{
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uint32_t regval;
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irqstate_t flags;
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@ -741,10 +765,12 @@ static inline void lpc17_uart2config(uint32_t clkdiv)
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/* Step 2: Enable clocking on UART */
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#ifdef LPC176x
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regval = getreg32(LPC17_SYSCON_PCLKSEL1);
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regval &= ~SYSCON_PCLKSEL1_UART2_MASK;
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regval |= (clkdiv << SYSCON_PCLKSEL1_UART2_SHIFT);
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regval |= ((uint32_t)g_uart2priv.cclkdiv << SYSCON_PCLKSEL1_UART2_SHIFT);
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putreg32(regval, LPC17_SYSCON_PCLKSEL1);
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#endif
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/* Step 3: Configure I/O pins */
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@ -755,7 +781,7 @@ static inline void lpc17_uart2config(uint32_t clkdiv)
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#endif
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#ifdef CONFIG_LPC17_UART3
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static inline void lpc17_uart3config(uint32_t clkdiv)
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static inline void lpc17_uart3config(void)
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{
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uint32_t regval;
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irqstate_t flags;
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@ -769,10 +795,12 @@ static inline void lpc17_uart3config(uint32_t clkdiv)
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/* Step 2: Enable clocking on UART */
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#ifdef LPC176x
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regval = getreg32(LPC17_SYSCON_PCLKSEL1);
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regval &= ~SYSCON_PCLKSEL1_UART3_MASK;
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regval |= (clkdiv << SYSCON_PCLKSEL1_UART3_SHIFT);
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regval |= ((uint32_t)g_uart3priv.cclkdiv << SYSCON_PCLKSEL1_UART3_SHIFT);
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putreg32(regval, LPC17_SYSCON_PCLKSEL1);
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#endif
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/* Step 3: Configure I/O pins */
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@ -797,6 +825,7 @@ static inline void lpc17_uart3config(uint32_t clkdiv)
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*
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************************************************************************************/
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#ifdef LPC176x
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static inline uint32_t lpc17_uartdl(uint32_t baud, uint8_t divcode)
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{
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uint32_t num;
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@ -823,6 +852,12 @@ static inline uint32_t lpc17_uartdl(uint32_t baud, uint8_t divcode)
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return num / (baud << 4);
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}
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#else
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static inline uint32_t lpc17_uartdl(uint32_t baud)
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{
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return (uint32_t)BOARD_PCLK / (baud << 4);
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}
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#endif
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/****************************************************************************
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* Private Functions
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@ -889,7 +924,11 @@ static int up_setup(struct uart_dev_s *dev)
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/* Set the BAUD divisor */
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#ifdef LPC176x
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dl = lpc17_uartdl(priv->baud, priv->cclkdiv);
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#else
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dl = lpc17_uartdl(priv->baud);
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#endif
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up_serialout(priv, LPC17_UART_DLM_OFFSET, dl >> 8);
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up_serialout(priv, LPC17_UART_DLL_OFFSET, dl & 0xff);
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@ -1203,14 +1242,24 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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priv->baud = cfgetispeed(termiosp);
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/* Re-calculate the optimal CCLK divisor for the new baud */
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#ifdef LPC176x
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priv->cclkdiv = lpc17_uartcclkdiv(priv->baud);
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#endif
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/* DLAB open latch */
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/* REVISIT: Shouldn't we just call up_setup() to do all of the following? */
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lcr = getreg32(priv->uartbase + LPC17_UART_LCR_OFFSET);
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up_serialout(priv, LPC17_UART_LCR_OFFSET, (lcr | UART_LCR_DLAB));
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/* Set the BAUD divisor */
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#ifdef LPC176x
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dl = lpc17_uartdl(priv->baud, priv->cclkdiv);
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#else
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dl = lpc17_uartdl(priv->baud);
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#endif
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up_serialout(priv, LPC17_UART_DLM_OFFSET, dl >> 8);
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up_serialout(priv, LPC17_UART_DLL_OFFSET, dl & 0xff);
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@ -1388,33 +1437,42 @@ void up_earlyserialinit(void)
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/* Configure all UARTs (except the CONSOLE UART) and disable interrupts */
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#ifdef CONFIG_LPC17_UART0
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#ifdef LPC176x
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g_uart0priv.cclkdiv = lpc17_uartcclkdiv(CONFIG_UART0_BAUD);
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#endif
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#ifndef CONFIG_UART0_SERIAL_CONSOLE
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lpc17_uart0config(g_uart0priv.cclkdiv);
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lpc17_uart0config();
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#endif
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up_disableuartint(&g_uart0priv, NULL);
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#endif
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#ifdef CONFIG_LPC17_UART1
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#ifdef LPC176x
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g_uart1priv.cclkdiv = lpc17_uartcclkdiv(CONFIG_UART1_BAUD);
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#endif
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#ifndef CONFIG_UART1_SERIAL_CONSOLE
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lpc17_uart1config(g_uart1priv.cclkdiv);
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lpc17_uart1config();
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#else
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#endif
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up_disableuartint(&g_uart1priv, NULL);
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#endif
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#ifdef CONFIG_LPC17_UART2
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#ifdef LPC176x
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g_uart2priv.cclkdiv = lpc17_uartcclkdiv(CONFIG_UART2_BAUD);
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#endif
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#ifndef CONFIG_UART2_SERIAL_CONSOLE
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lpc17_uart2config(g_uart2priv.cclkdiv);
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lpc17_uart2config();
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#endif
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up_disableuartint(&g_uart2priv, NULL);
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#endif
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#ifdef CONFIG_LPC17_UART3
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#ifdef LPC176x
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g_uart3priv.cclkdiv = lpc17_uartcclkdiv(CONFIG_UART3_BAUD);
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#endif
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#ifndef CONFIG_UART3_SERIAL_CONSOLE
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lpc17_uart3config(g_uart3priv.cclkdiv);
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lpc17_uart3config();
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#endif
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up_disableuartint(&g_uart3priv, NULL);
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#endif
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