Use USART TX state consistently
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3720 42af7a65-404d-4744-a932-0658087f49c3
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@ -1518,9 +1518,9 @@
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<td>
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<p>
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<b>SoC Robotics ATMega128</b>.
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This port of NuttX to the Amber Web Server from SoC Robotics
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(http://www.soc-robotics.com/index.htm) partially complete. The Amber Web Server is
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based on an Atmel ATMega128.
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This port of NuttX to the Amber Web Server from <a href="http://www.soc-robotics.com/index.htm">SoC Robotics</a>
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is partially completed.
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The Amber Web Server is based on an Atmel ATMega128.
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</p>
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<ul>
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<p>
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@ -1550,10 +1550,7 @@
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<b>STATUS:</b>
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The basic port was release in NuttX-6.5. This basic port consists only of
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a "Hello, World!!" example that demonstrates initialization of the OS,
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creation of a simple task, and serial console output. A complete OS
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test configuration is also available, but this would have to be scaled
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down quite a bit before it could be executed in the tiny AT90USB SRAM
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memory.
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creation of a simple task, and serial console output.
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</p>
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</ul>
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</td>
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@ -1568,15 +1565,17 @@
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<p>
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<b>PJRC Teensy++ 2.0 AT9USB1286</b>.
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This is a port of NuttX to the PJRC Teensy++ 2.0 board.
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This board is developed by http://pjrc.com/teensy/.
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This board is developed by <a href="http://pjrc.com/teensy/">PJRC</a>.
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The Teensy++ 2.0 is based on an Atmel AT90USB1286 MCU.
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</p>
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<ul>
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<p>
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<b>STATUS:</b>
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Work on the Teensy board is just beginning as of this writing.
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However, because of the great similarity to the Micropendous board,
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this port should be completed with only a small additional effort.
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The basic port was release in NuttX-6.5. This basic port consists of
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a "Hello, World!!" example that demonstrates initialization of the OS,
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creation of a simple task, and serial console output as well as a
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simplified NuttShell (NSH) configuration (see the
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<a href="http://www.nuttx.org/NuttShell.html">NSH User Guide</a>).
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</p>
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</ul>
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</td>
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@ -100,6 +100,7 @@ static bool usart1_rxavailable(struct uart_dev_s *dev);
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static void usart1_send(struct uart_dev_s *dev, int ch);
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static void usart1_txint(struct uart_dev_s *dev, bool enable);
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static bool usart1_txready(struct uart_dev_s *dev);
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static bool usart1_txempty(struct uart_dev_s *dev);
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/****************************************************************************
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* Private Variables
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@ -118,7 +119,7 @@ struct uart_ops_s g_uart1_ops =
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.send = usart1_send,
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.txint = usart1_txint,
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.txready = usart1_txready,
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.txempty = usart1_txready,
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.txempty = usart1_txempty,
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};
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/* I/O buffers */
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@ -168,9 +169,12 @@ static void usart1_restoreusartint(uint8_t imr)
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static inline void usart1_disableusartint(uint8_t *imr)
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{
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uint8_t regval = UCSR1B;
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uint8_t regval;
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regval = UCSR1B;
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*imr = regval;
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regval &= ~((1 << RXCIE1) | (1 << TXCIE1) | (1 << UDRIE1));
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UCSR1B = regval;
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}
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/****************************************************************************
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@ -308,9 +312,11 @@ static int usart1_txinterrupt(int irq, void *context)
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{
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uint8_t ucsr1a = UCSR1A;
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/* Handle outgoing, transmit bytes */
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/* Handle outgoing, transmit bytes when the transmit data buffer is empty.
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* (There may still be data in the shift register).
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*/
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if ((ucsr1a & (1 << TXC1)) != 0)
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if ((ucsr1a & (1 << UDRE1)) != 0)
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{
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/* Transmit data regiser empty ... process outgoing bytes */
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@ -361,7 +367,7 @@ static int usart1_ioctl(struct file *filep, int cmd, unsigned long arg)
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static int usart1_receive(struct uart_dev_s *dev, FAR unsigned int *status)
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{
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/* Return status information */
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/* Return status information (error bits will be cleared after reading UDR1) */
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if (status)
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{
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@ -471,6 +477,7 @@ static void usart1_txint(struct uart_dev_s *dev, bool enable)
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UCSR1B &= ~((1 << UDRIE1) | (1 << TXCIE1));
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}
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irqrestore(flags);
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}
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@ -487,6 +494,20 @@ static bool usart1_txready(struct uart_dev_s *dev)
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return (UCSR1A & (1 << UDRE1)) != 0;
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}
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/****************************************************************************
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* Name: usart1_txempty
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*
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* Description:
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* Return true if the tranmsit data register and shift register are both
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* empty
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*
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****************************************************************************/
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static bool usart1_txempty(struct uart_dev_s *dev)
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{
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return (UCSR1A & (1 << TXC1)) != 0;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -121,6 +121,7 @@ static bool usart0_rxavailable(struct uart_dev_s *dev);
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static void usart0_send(struct uart_dev_s *dev, int ch);
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static void usart0_txint(struct uart_dev_s *dev, bool enable);
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static bool usart0_txready(struct uart_dev_s *dev);
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static bool usart0_txempty(struct uart_dev_s *dev);
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#endif
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#ifdef CONFIG_AVR_USART1
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@ -137,6 +138,7 @@ static bool usart1_rxavailable(struct uart_dev_s *dev);
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static void usart1_send(struct uart_dev_s *dev, int ch);
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static void usart1_txint(struct uart_dev_s *dev, bool enable);
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static bool usart1_txready(struct uart_dev_s *dev);
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static bool usart1_txempty(struct uart_dev_s *dev);
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#endif
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/****************************************************************************
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@ -159,7 +161,7 @@ struct uart_ops_s g_usart0_ops =
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.send = usart0_send,
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.txint = usart0_txint,
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.txready = usart0_txready,
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.txempty = usart0_txready,
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.txempty = usart0_txempty,
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};
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/* USART0 I/O buffers */
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@ -201,7 +203,7 @@ struct uart_ops_s g_usart1_ops =
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.send = usart1_send,
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.txint = usart1_txint,
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.txready = usart1_txready,
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.txempty = usart1_txready,
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.txempty = usart1_txempty,
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};
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/* USART 1 I/O buffers */
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@ -268,18 +270,24 @@ static void usart1_restoreusartint(uint8_t imr)
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#ifdef CONFIG_AVR_USART0
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static inline void usart0_disableusartint(uint8_t *imr)
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{
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uint8_t regval = UCSR0B;
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uint8_t regval;
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regval = UCSR0B;
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*imr = regval;
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regval &= ~((1 << RXCIE0) | (1 << TXCIE0) | (1 << UDRIE0));
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UCSR0B = regval;
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}
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#endif
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#ifdef CONFIG_AVR_USART1
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static inline void usart1_disableusartint(uint8_t *imr)
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{
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uint8_t regval = UCSR1B;
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uint8_t regval;
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regval = UCSR1B;
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*imr = regval;
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regval &= ~((1 << RXCIE1) | (1 << TXCIE1) | (1 << UDRIE1));
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UCSR0B = regval;
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}
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#endif
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@ -505,9 +513,11 @@ static int usart0_txinterrupt(int irq, void *context)
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{
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uint8_t ucsr0a = UCSR0A;
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/* Handle outgoing, transmit bytes */
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/* Handle outgoing, transmit bytes when the transmit data buffer is empty.
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* (There may still be data in the shift register).
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*/
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if ((ucsr0a & (1 << TXC0)) != 0)
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if ((ucsr0a & (1 << UDRE0)) != 0)
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{
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/* Transmit data regiser empty ... process outgoing bytes */
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@ -523,9 +533,11 @@ static int usart1_txinterrupt(int irq, void *context)
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{
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uint8_t ucsr1a = UCSR1A;
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/* Handle outgoing, transmit bytes */
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/* Handle outgoing, transmit bytes when the transmit data buffer is empty.
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* (There may still be data in the shift register).
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*/
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if ((ucsr1a & (1 << TXC1)) != 0)
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if ((ucsr1a & (1 << UDRE1)) != 0)
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{
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/* Transmit data regiser empty ... process outgoing bytes */
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@ -773,6 +785,7 @@ static void usart0_txint(struct uart_dev_s *dev, bool enable)
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UCSR0B &= ~((1 << UDRIE0) | (1 << TXCIE0));
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}
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irqrestore(flags);
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}
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#endif
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@ -814,6 +827,7 @@ static void usart1_txint(struct uart_dev_s *dev, bool enable)
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UCSR1B &= ~((1 << UDRIE1) | (1 << TXCIE1));
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}
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irqrestore(flags);
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}
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#endif
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@ -840,6 +854,29 @@ static bool usart1_txready(struct uart_dev_s *dev)
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}
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#endif
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/****************************************************************************
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* Name: usart0/1_txempty
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*
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* Description:
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* Return true if the tranmsit data register and shift reqister are both
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* empty
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*
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****************************************************************************/
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#ifdef CONFIG_AVR_USART0
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static bool usart0_txempty(struct uart_dev_s *dev)
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{
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return (UCSR0A & (1 << TXC0)) != 0;
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}
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#endif
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#ifdef CONFIG_AVR_USART1
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static bool usart1_txempty(struct uart_dev_s *dev)
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{
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return (UCSR1A & (1 << TXC1)) != 0;
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}
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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