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Changes from review of commit e851a24329

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This commit is contained in:
Gregory Nutt 2017-08-02 08:26:08 -06:00
parent a6fa3b311d
commit 5f2d4b8f84
33 changed files with 540 additions and 611 deletions
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2
arch/arm/include/lc823450/chip.h
View File

@ -34,7 +34,6 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_LC823450_CHIP_H
#define __ARCH_ARM_INCLUDE_LC823450_CHIP_H
@ -48,7 +47,6 @@
* Pre-processor Definitions
****************************************************************************/
/* NVIC priority levels *****************************************************/
#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */

5
arch/arm/include/lc823450/clk.h
View File

@ -37,7 +37,6 @@
#ifndef __ARCH_ARM_INCLUDE_LC823450_CLK_H
#define __ARCH_ARM_INCLUDE_LC823450_CLK_H
/****************************************************************************
* Included Files
****************************************************************************/
@ -80,10 +79,6 @@ enum clock_e
};
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/

14
arch/arm/include/lc823450/irq.h
View File

@ -34,8 +34,8 @@
*
****************************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/irq.h
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_LC823450_IRQ_H
@ -49,10 +49,9 @@
#include <nuttx/irq.h>
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
* bits in the NVIC. This does, however, waste several words of memory in the IRQ
* to handle mapping tables.
@ -61,8 +60,8 @@
/* Processor Exceptions (vectors 0-15) */
#define LC823450_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define LC823450_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define LC823450_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
#define LC823450_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */
@ -70,7 +69,7 @@
#define LC823450_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
#define LC823450_IRQ_SVCALL (11) /* Vector 11: SVC call */
#define LC823450_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
/* Vector 13: Reserved */
/* Vector 13: Reserved */
#define LC823450_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define LC823450_IRQ_SYSTICK (15) /* Vector 15: System tick */
@ -88,6 +87,7 @@
*
* External interrupts (vectors >= 16)
*/
#define LC823450_IRQ_CTXM3_00 (LC823450_IRQ_INTERRUPTS+0) /* 16: CortexM3_00 interrupt */
#define LC823450_IRQ_CTXM3_01 (LC823450_IRQ_INTERRUPTS+1) /* 17: CortexM3_01 interrupt */
#define LC823450_IRQ_CTXM3_02 (LC823450_IRQ_INTERRUPTS+2) /* 18: CortexM3_02 interrupt */

1
arch/arm/src/lc823450/Make.defs
View File

@ -47,7 +47,6 @@ CMN_UCSRCS =
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS += vfork.S
CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c

1
arch/arm/src/lc823450/chip.h
View File

@ -44,7 +44,6 @@
#include <sys/types.h>
#include <arch/lc823450/chip.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/

10
arch/arm/src/lc823450/lc823450_clockconfig.c
View File

@ -68,21 +68,12 @@
# define HCLKDIV 3 /* AHB = system / (HCLKIDV + 1) */
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
unsigned int XT1OSC_CLK;
/****************************************************************************
* Public Functions
****************************************************************************/
@ -196,6 +187,7 @@ void lc823450_clockconfig()
/* To check basic clock by PHI pin.
* Don't forget to change GPIO09 pinmux.
*/
val = getreg32(FCLKCNT);
val |= (1 << 26);
putreg32(val, FCLKCNT);

15
arch/arm/src/lc823450/lc823450_clockconfig.h
View File

@ -42,12 +42,10 @@
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LC823450_OSCSYS_REGBASE 0x40040000
#define OSCCNT (LC823450_OSCSYS_REGBASE + 0x00)
@ -89,14 +87,14 @@
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
@ -105,15 +103,14 @@ extern "C" {
* Public Functions
****************************************************************************/
EXTERN uint32_t lc823450_get_systemfreq(void);
uint32_t lc823450_get_systemfreq(void);
#ifndef CONFIG_DVFS
EXTERN uint32_t lc823450_get_apb(void);
uint32_t lc823450_get_apb(void);
#endif
EXTERN uint32_t lc823450_get_ahb(void);
EXTERN void lc823450_clockconfig(void);
uint32_t lc823450_get_ahb(void);
void lc823450_clockconfig(void);
#if defined(__cplusplus)
}

17
arch/arm/src/lc823450/lc823450_cpuidlestack.c
View File

@ -34,8 +34,6 @@
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -47,25 +45,10 @@
#include "up_arch.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_idlestack
*

12
arch/arm/src/lc823450/lc823450_cpuindex.c
View File

@ -34,7 +34,6 @@
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -45,7 +44,6 @@
#include "up_arch.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@ -54,20 +52,10 @@
#define CORE_COREID (LC823450_CORE_BASE + 0x0)
#define CORE_COREID_ID (0x1 << 0)
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_index
*

13
arch/arm/src/lc823450/lc823450_cpupause.c
View File

@ -34,7 +34,6 @@
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -56,23 +55,16 @@
#include "up_internal.h"
#include "lc823450_intc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if 0
#define DPRINTF(fmt, args...) llinfo(fmt, ##args)
#else
#define DPRINTF(fmt, args...) do {} while (0)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
@ -99,8 +91,6 @@ volatile spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS];
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_pausereq
*
@ -203,7 +193,6 @@ int up_cpu_paused(int cpu)
return OK;
}
/****************************************************************************
* Name: lc823450_pause_handler
*
@ -223,6 +212,7 @@ int lc823450_pause_handler(int irq, void *c, FAR void *arg)
int cpu = up_cpu_index();
/* Clear : Pause IRQ */
if (irq == LC823450_IRQ_CTXM3_01)
{
DPRINTF("CPU0 -> CPU1\n");
@ -247,7 +237,6 @@ int lc823450_pause_handler(int irq, void *c, FAR void *arg)
return OK;
}
/****************************************************************************
* Name: up_cpu_pause
*

10
arch/arm/src/lc823450/lc823450_cpustart.c
View File

@ -60,12 +60,10 @@
#include "lc823450_syscontrol.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if 0
#define DPRINTF(fmt, args...) llinfo(fmt, ##args)
#else
@ -75,29 +73,24 @@
#define CPU1_VECTOR_RESETV 0x00000000
#define CPU1_VECTOR_ISTACK 0x00000004
/****************************************************************************
* Private Data
****************************************************************************/
static uint32_t cpu1_vector_table[];
/****************************************************************************
* Public Data
****************************************************************************/
extern volatile spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS];
/****************************************************************************
* Private Functions
****************************************************************************/
extern int lc823450_pause_handler(int irq, void *c, FAR void *arg);
/****************************************************************************
* Name: cpu1_boot
*
@ -110,7 +103,6 @@ extern int lc823450_pause_handler(int irq, void *c, FAR void *arg);
*
****************************************************************************/
static void cpu1_boot(void)
{
int cpu = up_cpu_index();
@ -139,12 +131,10 @@ static void cpu1_boot(void)
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_start
*

28
arch/arm/src/lc823450/lc823450_dma.c
View File

@ -56,7 +56,6 @@
#include "lc823450_syscontrol.h"
#include <arch/chip/clk.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@ -119,7 +118,6 @@ struct lc823450_dmach_s
uint32_t llist;
};
struct lc823450_dma_s
{
sem_t exclsem; /* For exclusive access to the DMA channel list */
@ -132,10 +130,6 @@ struct lc823450_dma_s
static int phydmastart(struct lc823450_phydmach_s *pdmach);
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
@ -171,6 +165,7 @@ static int dma_interrupt_core(void *context)
if (dmach->callback)
dmach->callback((DMA_HANDLE)dmach, dmach->arg, 0);
}
up_disable_clk(LC823450_CLOCK_DMA);
phydmastart(pdmach);
@ -202,7 +197,7 @@ static int dma_interrupt(int irq, FAR void *context, FAR void *arg)
}
if (err & (1 << i))
{
_err("ERR %d\n", i);
dmaerr("ERROR %d\n", i);
}
}
@ -233,13 +228,16 @@ static int phydmastart(struct lc823450_phydmach_s *pdmach)
leave_critical_section(flags);
return 0;
}
dmach = (struct lc823450_dmach_s *)q_ent;
trnum = MIN(dmach->nxfrs, LC823450_DMA_MAX_TRANSSIZE);
pdmach->inprogress = 1;
up_enable_clk(LC823450_CLOCK_DMA);
/* start DMA */
putreg32(dmach->srcaddr, DMACSRCADDR(dmach->chn));
putreg32(dmach->destaddr, DMACDSTADDR(dmach->chn));
@ -294,7 +292,6 @@ static int phydmastart(struct lc823450_phydmach_s *pdmach)
return 0;
}
#ifdef DMA_TEST
int test_buf1[4096];
int test_buf2[4096];
@ -316,6 +313,7 @@ void lc823450_dma_test()
test_buf1[i] = i;
test_buf2[i] = 0;
}
DMA_HANDLE hdma;
hdma = lc823450_dmachannel(DMA_CHANNEL_VIRTUAL);
lc823450_dmasetup(hdma, LC823450_DMA_SRCWIDTH_WORD |
@ -355,10 +353,12 @@ void up_dmainitialize(void)
up_enable_irq(LC823450_IRQ_DMAC);
/* Clock & Reset */
modifyreg32(MCLKCNTBASIC, 0, MCLKCNTBASIC_DMAC_CLKEN);
modifyreg32(MRSTCNTBASIC, 0, MRSTCNTBASIC_DMAC_RSTB);
/* DMAC enable */
modifyreg32(DMACCONFIG, 0, DMACCONFIG_EN);
#ifdef DMA_TEST
@ -366,6 +366,7 @@ void up_dmainitialize(void)
#endif
/* clock disable */
modifyreg32(MCLKCNTBASIC, MCLKCNTBASIC_DMAC_CLKEN, 0);
}
@ -403,6 +404,7 @@ void lc823450_dmarequest(DMA_HANDLE handle, uint8_t dmarequest)
int req_line;
/* search for free request line */
for (req_line = 0; req_line < 16; req_line++)
{
if ((g_dma.reqline_use & (1 << req_line)) == 0)
@ -414,13 +416,16 @@ void lc823450_dmarequest(DMA_HANDLE handle, uint8_t dmarequest)
DEBUGASSERT(req_line != 16);
up_enable_clk(LC823450_CLOCK_DMA);
/* DREQ Select */
val = getreg32(DREQ0_3 + (req_line / 4) * 4);
val &= ~(0xff << ((req_line % 4) * 8));
val |= dmarequest << ((req_line % 4) * 8);
putreg32(val, (DREQ0_3 + (req_line / 4) * 4));
/* source or dest peri request ? */
val = getreg32(DMACCFG(dmach->chn));
switch (dmarequest)
{
@ -447,9 +452,10 @@ void lc823450_dmarequest(DMA_HANDLE handle, uint8_t dmarequest)
val |= DMACCFG_FLOWCTRL_M2P_DMA;
break;
default:
_err("NOT IMP\n");
dmaerr("ERROR: Not implemetned\n");
DEBUGASSERT(0);
}
putreg32(val, DMACCFG(dmach->chn));
up_disable_clk(LC823450_CLOCK_DMA);
@ -595,7 +601,6 @@ int lc823450_dmaremain(DMA_HANDLE handle)
return getreg32(DMACCTL(dmach->chn)) & 0xfff;
}
/****************************************************************************
* Name: lc823450_dmastart
****************************************************************************/
@ -607,8 +612,8 @@ int lc823450_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
DEBUGASSERT(dmach);
/* select physical channel */
flags = enter_critical_section();
sq_addfirst(&dmach->q_ent, &g_dma.phydmach[dmach->chn].req_q);
@ -617,6 +622,7 @@ int lc823450_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
dmach->arg = arg;
/* Kick DMAC, if not active */
if (!g_dma.phydmach[dmach->chn].inprogress)
{
phydmastart(&g_dma.phydmach[dmach->chn]);

35
arch/arm/src/lc823450/lc823450_dma.h
View File

@ -73,8 +73,8 @@
#define LC823450_DMA_TRANSSIZE_MASK (0xfff << 0)
#define LC823450_DMA_MAX_TRANSSIZE 0xff0
/* HighPriority */
#define DMA_CHANNEL_SIOTX 0
#define DMA_CHANNEL_UART1RX 1
#define DMA_CHANNEL_UART1TX 2
@ -127,7 +127,8 @@ typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
@ -136,22 +137,22 @@ extern "C" {
* Public Functions
****************************************************************************/
EXTERN void lc823450_dmaconfigure(uint8_t dmarequest, bool alternate);
EXTERN DMA_HANDLE lc823450_dmachannel(int ch);
EXTERN void lc823450_dmafree(DMA_HANDLE handle);
EXTERN void lc823450_dmarequest(DMA_HANDLE handle, uint8_t dmarequest);
EXTERN int lc823450_dmasetup(DMA_HANDLE handle, uint32_t control,
uint32_t srcaddr, uint32_t destaddr, size_t nxfrs);
EXTERN int lc823450_dmallsetup(DMA_HANDLE handle, uint32_t control,
uint32_t srcaddr, uint32_t destaddr,
size_t nxfrs, uint32_t llist);
EXTERN void lc823450_dmareauest_dir(DMA_HANDLE handle, uint8_t dmarequest,
int m2p);
void lc823450_dmaconfigure(uint8_t dmarequest, bool alternate);
DMA_HANDLE lc823450_dmachannel(int ch);
void lc823450_dmafree(DMA_HANDLE handle);
void lc823450_dmarequest(DMA_HANDLE handle, uint8_t dmarequest);
int lc823450_dmasetup(DMA_HANDLE handle, uint32_t control,
uint32_t srcaddr, uint32_t destaddr, size_t nxfrs);
int lc823450_dmallsetup(DMA_HANDLE handle, uint32_t control,
uint32_t srcaddr, uint32_t destaddr,
size_t nxfrs, uint32_t llist);
void lc823450_dmareauest_dir(DMA_HANDLE handle, uint8_t dmarequest,
int m2p);
EXTERN int lc823450_dmastart(DMA_HANDLE handle, dma_callback_t callback,
void *arg);
EXTERN void lc823450_dmastop(DMA_HANDLE handle);
EXTERN int lc823450_dmaremain(DMA_HANDLE handle);
int lc823450_dmastart(DMA_HANDLE handle, dma_callback_t callback,
void *arg);
void lc823450_dmastop(DMA_HANDLE handle);
int lc823450_dmaremain(DMA_HANDLE handle);
#undef EXTERN

28
arch/arm/src/lc823450/lc823450_gpio.c
View File

@ -35,7 +35,6 @@
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -59,12 +58,10 @@
* Pre-processor Definitions
****************************************************************************/
#define PORTX_OFFSET 0x00001000
#define PORTX_DRC_OFFSET 0x0
#define PORTX_DAT_OFFSET 0x4
/****************************************************************************
* Private Data
****************************************************************************/
@ -78,10 +75,6 @@ static FAR struct ioex_dev_s *g_ioex_dev;
static FAR struct vgpio_ops_s *vgpio_ops[GPIO_VIRTUAL_NUM];
#endif /* CONFIG_LC823450_VGPIO */
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@ -126,7 +119,6 @@ static uintptr_t lc823450_get_gpio_pull(unsigned int port)
return regaddr;
}
/****************************************************************************
* Name: lc823450_configinput
*
@ -164,10 +156,8 @@ static inline void lc823450_configpull(uint16_t gpiocfg,
}
putreg32(regval, regaddr);
}
/****************************************************************************
* Name: lc823450_configinput
*
@ -206,7 +196,8 @@ static inline void lc823450_configinput(uint32_t port, uint32_t pin)
*
****************************************************************************/
static inline void lc823450_configoutput(uint16_t gpiocfg, uint32_t port, uint32_t pin)
static inline void lc823450_configoutput(uint16_t gpiocfg, uint32_t port,
uint32_t pin)
{
uintptr_t regaddr;
uint32_t regval;
@ -230,7 +221,6 @@ static inline void lc823450_configoutput(uint16_t gpiocfg, uint32_t port, uint32
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: lc823450_gpio_mux
*
@ -260,11 +250,10 @@ int lc823450_gpio_mux(uint16_t gpiocfg)
{
ret = -1;
}
return ret;
}
/****************************************************************************
* Name: lc823450_gpio_config
*
@ -301,6 +290,7 @@ int lc823450_gpio_config(uint16_t gpiocfg)
flags = enter_critical_section();
/* pull up/down specified */
if (gpiocfg & GPIO_PUPD_MASK)
{
lc823450_configpull(gpiocfg, port, pin);
@ -317,7 +307,7 @@ int lc823450_gpio_config(uint16_t gpiocfg)
break;
default :
_err("ERROR: Unrecognized pin mode: %04x\n", gpiocfg);
gpioerr("ERROR: Unrecognized pin mode: %04x\n", gpiocfg);
ret = -EINVAL;
break;
}
@ -360,7 +350,7 @@ int lc823450_gpio_config(uint16_t gpiocfg)
ret = g_ioex_dev->ops->config(g_ioex_dev, pin, dir, pupd);
if (ret != 0)
{
dbg("Failed to configure I/O expanded port\n");
gpioerr("ERROR: Failed to configure I/O expanded port\n");
}
g_ioex_dev->ops->write(g_ioex_dev, pin, GPIO_IS_ONE(gpiocfg));
@ -399,6 +389,7 @@ void lc823450_gpio_write(uint16_t gpiocfg, bool value)
{
vgpio_ops[pin]->write(pin, value);
}
return;
}
#endif /* CONFIG_LC823450_VGPIO */
@ -423,6 +414,7 @@ void lc823450_gpio_write(uint16_t gpiocfg, bool value)
{
regval &= ~(1 << pin);
}
putreg32(regval, regaddr);
leave_critical_section(flags);
@ -462,6 +454,7 @@ bool lc823450_gpio_read(uint16_t gpiocfg)
{
return vgpio_ops[pin]->read(pin);
}
return 0;
}
#endif /* CONFIG_LC823450_VGPIO */
@ -505,9 +498,10 @@ int lc823450_gpio_initialize(void)
g_ioex_dev = up_ioexinitialize(1);
if (!g_ioex_dev)
{
dbg("%s: Failed to initialize ioex driver\n", __func__);
gpioerr("ERROR: Failed to initialize ioex driver\n");
return -EIO;
}
return OK;
}
#endif /* CONFIG_IOEX */

4
arch/arm/src/lc823450/lc823450_gpio.h
View File

@ -44,12 +44,10 @@
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Max number of GPIO ports and the maximum number of pins per port */
#ifdef CONFIG_IOEX
@ -61,7 +59,6 @@
#define NUM_GPIO_PINS 16
/* Input/Output mode
*
* 1111 1100 0000 0000
@ -125,7 +122,6 @@
# define GPIO_PULLDOWN (2 << GPIO_PUPD_SHIFT) /* Pull-down */
# define GPIO_FLOAT (3 << GPIO_PUPD_SHIFT) /* No pull-up, pull-down */
/* GPIO Port Number:
*
* 1111 1100 0000 0000

88
arch/arm/src/lc823450/lc823450_i2c.c
View File

@ -39,7 +39,6 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
@ -48,6 +47,7 @@
#include <stdint.h>
#include <stdbool.h>
#include <semaphore.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <stddef.h>
@ -94,17 +94,6 @@
#define GPIO_I2C1_SCL (GPIO_PORT2 | GPIO_PINB | GPIO_MODE_OUTPUT | GPIO_VALUE_ZERO)
#define GPIO_I2C1_SDA (GPIO_PORT2 | GPIO_PINC | GPIO_MODE_OUTPUT | GPIO_VALUE_ZERO)
#ifdef CONFIG_DEBUG_I2C
# define i2cdbg dbg
# define i2cvdbg vdbg
# define i2cllvdbg llvdbg
#else
# define i2cdbg(x...)
# define i2cvdbg(x...)
# define i2cllvdbg(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -128,7 +117,6 @@ struct lc823450_i2c_config_s
uint32_t base; /* I2C base address */
uint32_t en_bit; /* I2C controller enable bit (clock/reset) */
#ifndef CONFIG_I2C_POLLED
int (*isr)(int, void *, void *); /* Interrupt handler */
int irq; /* IRQ number */
#endif
};
@ -157,7 +145,6 @@ struct lc823450_i2c_priv_s
bool timedout; /* If true, I2C transfer timed-out */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
@ -166,7 +153,6 @@ static inline void lc823450_i2c_sem_wait(FAR struct lc823450_i2c_priv_s *priv);
static inline void lc823450_i2c_sem_post(FAR struct lc823450_i2c_priv_s *priv);
static inline int lc823450_i2c_sem_waitdone(FAR struct lc823450_i2c_priv_s *priv);
#ifndef CONFIG_I2C_POLLED
static inline void lc823450_i2c_enableirq(FAR struct lc823450_i2c_priv_s *priv);
static inline void lc823450_i2c_disableirq(FAR struct lc823450_i2c_priv_s *priv);
@ -179,14 +165,9 @@ static inline void lc823450_i2c_sendstop(FAR struct lc823450_i2c_priv_s *priv);
static inline uint32_t lc823450_i2c_readdata(FAR struct lc823450_i2c_priv_s *priv);
static void lc823450_i2c_starttransfer(FAR struct lc823450_i2c_priv_s *priv);
static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv);
static int lc823450_i2c_poll(FAR struct lc823450_i2c_priv_s *priv);
#ifndef CONFIG_I2C_POLLED
#ifdef CONFIG_LC823450_I2C0
static int lc823450_i2c0_isr(int irq, FAR void *context, FAR void *arg);
#endif
#ifdef CONFIG_LC823450_I2C1
static int lc823450_i2c1_isr(int irq, FAR void *context, FAR void *arg);
#endif
static int lc823450_i2c_isr(int irq, FAR void *context, FAR void *arg);
#endif
static int lc823450_i2c_init(FAR struct lc823450_i2c_priv_s *priv, int port);
@ -198,12 +179,10 @@ static int lc823450_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_ms
static int lc823450_i2c_reset(FAR struct i2c_master_s *priv);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* I2C interface */
struct i2c_ops_s lc823450_i2c_ops =
@ -214,14 +193,12 @@ struct i2c_ops_s lc823450_i2c_ops =
#endif
};
#ifdef CONFIG_LC823450_I2C0
static const struct lc823450_i2c_config_s lc823450_i2c0_config =
{
.base = LC823450_I2C0_REGBASE,
.en_bit = MCLKCNTAPB_I2C0_CLKEN, /* Same as MRSTCNTAPB_I2C0_RSTB */
#ifndef CONFIG_I2C_POLLED
.isr = lc823450_i2c0_isr,
.irq = LC823450_IRQ_I2C0,
#endif /* CONFIG_I2C_POLLED */
};
@ -248,7 +225,6 @@ static const struct lc823450_i2c_config_s lc823450_i2c1_config =
.base = LC823450_I2C1_REGBASE,
.en_bit = MCLKCNTAPB_I2C1_CLKEN, /* Same as MRSTCNTAPB_I2C1_RSTB */
#ifndef CONFIG_I2C_POLLED
.isr = lc823450_i2c1_isr,
.irq = LC823450_IRQ_I2C1,
#endif /* CONFIG_I2C_POLLED */
};
@ -269,7 +245,6 @@ static struct lc823450_i2c_priv_s lc823450_i2c1_priv =
};
#endif /* CONFIG_LC823450_I2C1 */
/****************************************************************************
* Private Functions
****************************************************************************/
@ -393,16 +368,15 @@ static inline int lc823450_i2c_sem_waitdone(FAR struct lc823450_i2c_priv_s *priv
* reports that it is done.
*/
lc823450_i2c_isr(priv);
lc823450_i2c_poll(priv);
/* Calculate the elapsed time */
elapsed = clock_systimer() - start;
}
while (priv->irqstate != IRQSTATE_DONE && elapsed < timeout);
i2cvdbg("irqstate: %d elapsed: %d threshold: %d status: %08x\n",
i2cinfo("irqstate: %d elapsed: %d threshold: %d status: %08x\n",
priv->irqstate, elapsed, timeout);
/* Set the interrupt state back to IDLE */
@ -632,14 +606,14 @@ static void lc823450_i2c_starttransfer(FAR struct lc823450_i2c_priv_s *priv)
}
/****************************************************************************
* Name: lc823450_i2c_isr
* Name: lc823450_i2c_poll
*
* Description:
* Common Interrupt Service Routine
*
****************************************************************************/
static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
static int lc823450_i2c_poll(FAR struct lc823450_i2c_priv_s *priv)
{
bool ack;
@ -696,7 +670,7 @@ static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
priv->msgv++;
priv->msgc--;
i2cllvdbg("WSTART (dcnt=%d flags=%xh msgc=%d)\n", priv->dcnt, priv->flags, priv->msgc);
i2cinfo("WSTART (dcnt=%d flags=%xh msgc=%d)\n", priv->dcnt, priv->flags, priv->msgc);
lc823450_i2c_starttransfer(priv);
}
@ -710,7 +684,7 @@ static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
{
priv->ptr++;
priv->dcnt--;
i2cllvdbg("WSEND (dcnt=%d)\n", priv->dcnt);
i2cinfo("WSEND (dcnt=%d)\n", priv->dcnt);
lc823450_i2c_starttransfer(priv);
}
@ -724,7 +698,7 @@ static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
*priv->ptr++ = lc823450_i2c_readdata(priv);
priv->dcnt--;
i2cllvdbg("WRECV (dcnt=%d)\n", priv->dcnt);
i2cinfo("WRECV (dcnt=%d)\n", priv->dcnt);
lc823450_i2c_starttransfer(priv);
}
@ -732,7 +706,7 @@ static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
{
/* Wait until STOP condition is requested. */
i2cllvdbg("WSTOP\n");
i2cinfo("WSTOP\n");
lc823450_i2c_clrstop(priv);
@ -751,19 +725,19 @@ static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
{
/* The current message is complete */
i2cllvdbg("message transferred\n");
i2cinfo("message transferred\n");
if (priv->msgc > 0)
{
/* There are other messages remaining. */
i2cllvdbg("other message remaining (msgc=%d)\n", priv->msgc);
i2cinfo("other message remaining (msgc=%d)\n", priv->msgc);
if (priv->msgv->flags & I2C_M_NORESTART)
{
/* In this case, we don't have to restart using START condition. */
i2cllvdbg("no re-START condition\n");
i2cinfo("no re-START condition\n");
if (priv->msgv->length > 0)
{
@ -783,7 +757,7 @@ static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
* between current message and next message, restart is necessary.
*/
i2cllvdbg("re-START condition\n");
i2cinfo("re-START condition\n");
/* Reset I2C bus by softreset. There is not description of the reset,
* but in order to recover I2C bus busy, it must be done.
@ -813,7 +787,7 @@ static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
* are transferred.
*/
i2cllvdbg("STOP condition\n");
i2cinfo("STOP condition\n");
lc823450_i2c_sendstop(priv);
@ -834,16 +808,13 @@ static int lc823450_i2c_isr(FAR struct lc823450_i2c_priv_s *priv)
****************************************************************************/
#ifndef CONFIG_I2C_POLLED
#ifdef CONFIG_LC823450_I2C0
static int lc823450_i2c0_isr(int irq, FAR void *context, FAR void *arg)
{
return lc823450_i2c_isr(&lc823450_i2c0_priv);
}
#endif
#ifdef CONFIG_LC823450_I2C1
static int lc823450_i2c1_isr(int irq, FAR void *context, FAR void *arg)
{
return lc823450_i2c_isr(&lc823450_i2c1_priv);
FAR struct lc823450_i2c_priv_s *priv =
(FAR struct lc823450_i2c_priv_s *)arg;
DEBUGASSERT(priv != NULL);
return lc823450_i2c_poll(priv);
}
#endif
#endif
@ -865,7 +836,7 @@ static int lc823450_i2c_init(FAR struct lc823450_i2c_priv_s *priv, int port)
/* Attach ISRs */
#ifndef CONFIG_I2C_POLLED
irq_attach(priv->config->irq, priv->config->isr, NULL);
irq_attach(priv->config->irq, lc823450_i2c_isr, priv);
up_enable_irq(priv->config->irq);
#endif
@ -965,6 +936,7 @@ static int lc823450_i2c_deinit(FAR struct lc823450_i2c_priv_s *priv, int port)
modifyreg32(MRSTCNTAPB, priv->config->en_bit, 0);
/* Disable and detach interrupts */
#ifndef CONFIG_I2C_POLLED
up_disable_irq(priv->config->irq);
irq_detach(priv->config->irq);
@ -977,7 +949,6 @@ static int lc823450_i2c_deinit(FAR struct lc823450_i2c_priv_s *priv, int port)
* Device Driver Operations
****************************************************************************/
/****************************************************************************
* Name: lc823450_i2c_transfer
*
@ -986,14 +957,14 @@ static int lc823450_i2c_deinit(FAR struct lc823450_i2c_priv_s *priv, int port)
*
****************************************************************************/
static int lc823450_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs,
int count)
static int lc823450_i2c_transfer(FAR struct i2c_master_s *dev,
FAR struct i2c_msg_s *msgs, int count)
{
FAR struct lc823450_i2c_priv_s *priv = (struct lc823450_i2c_priv_s *)dev;
if (!msgs || count == 0)
{
i2cdbg("invalid param, %p %d\n", msgs, count);
i2cerr("ERROR: invalid param, %p %d\n", msgs, count);
return -EINVAL;
}
@ -1021,9 +992,10 @@ static int lc823450_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_ms
#endif
/* Check I2C bus state */
if (lc823450_i2c_checkbusy(priv))
{
_err("### ERROR I2C bus busy (dev=%02xh)\n", msgs->addr);
i2cerr("ERROR: I2C bus busy (dev=%02xh)\n", msgs->addr);
ret = -EBUSY;
goto exit;
}
@ -1077,7 +1049,7 @@ static int lc823450_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_ms
}
#ifndef CONFIG_IPL2
_err("### ERROR I2C timed out (dev=%xh)\n", msgs->addr);
i2cerr("ERROR: I2C timed out (dev=%xh)\n", msgs->addr);
#endif
}
@ -1100,7 +1072,6 @@ exit:
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -1221,7 +1192,6 @@ int lc823450_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
return OK;
}
/****************************************************************************
* Name: lc823450_i2cbus_changetimeout
****************************************************************************/

5
arch/arm/src/lc823450/lc823450_i2c.h
View File

@ -89,19 +89,18 @@
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions
****************************************************************************/

8
arch/arm/src/lc823450/lc823450_idle.c
View File

@ -34,7 +34,6 @@
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -52,10 +51,6 @@
# include "lc823450_dvfs.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
@ -65,7 +60,6 @@ static int32_t g_in_sleep;
static uint64_t g_sleep_t0;
#endif /* CONFIG_LC823450_SLEEP_MODE */
/****************************************************************************
* Private Functions
****************************************************************************/
@ -88,7 +82,6 @@ static uint64_t up_get_current_time(void)
}
#endif /* CONFIG_LC823450_SLEEP_MODE */
/****************************************************************************
* Public Functions
****************************************************************************/
@ -139,7 +132,6 @@ void up_idle(void)
/* Sleep until an interrupt occurs to save power */
asm("WFI");
#endif
}

14
arch/arm/src/lc823450/lc823450_intc.h
View File

@ -34,7 +34,6 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_INTC_H
#define __ARCH_ARM_SRC_LC823450_LC823450_INTC_H
@ -46,7 +45,6 @@
* Pre-processor Definitions
****************************************************************************/
#define LC823450_INTC_REGBASE 0x40003000
#define IPIREG (LC823450_INTC_REGBASE + 0x000)
@ -80,36 +78,28 @@
#define INTC_REG(base,port) ((base) + 4 * (port))
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#if defined(__cplusplus)
}
#endif

84
arch/arm/src/lc823450/lc823450_irq.c
View File

@ -35,7 +35,6 @@
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -64,7 +63,6 @@
* Pre-processor Definitions
****************************************************************************/
/* Get a 32-bit version of the default priority */
#define DEFPRIORITY32 \
@ -94,7 +92,6 @@ volatile uint32_t *g_current_regs[CONFIG_SMP_NCPUS];
volatile uint32_t *g_current_regs[1];
#endif
/****************************************************************************
* Private Data
****************************************************************************/
@ -103,14 +100,12 @@ volatile uint32_t *g_current_regs[1];
static struct lc823450_irq_ops *virq_ops[LC823450_IRQ_NVIRTUALIRQS];
#endif /* CONFIG_LC823450_VIRQ */
/****************************************************************************
* Public Data
****************************************************************************/
volatile uint32_t *current_regs;
/****************************************************************************
* Private Functions
****************************************************************************/
@ -123,40 +118,40 @@ volatile uint32_t *current_regs;
*
****************************************************************************/
#if defined(CONFIG_DEBUG_IRQ)
#if defined(CONFIG_DEBUG_IRQ_INFO)
static void lc823450_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = enter_critical_section();
_info("NVIC (%s, irq=%d):\n", msg, irq);
_info(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
_info(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
_info(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
_info(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
_info(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
_info(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
_info(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
_info(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
_info(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
irqinfo(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
irqinfo(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
irqinfo(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
irqinfo(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
leave_critical_section(flags);
}
#else
@ -178,7 +173,7 @@ static void lc823450_dumpnvic(const char *msg, int irq)
static int lc823450_nmi(int irq, FAR void *context, FAR void *arg)
{
(void)enter_critical_section();
_info("PANIC!!! NMI received\n");
irqinfo("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@ -186,7 +181,7 @@ static int lc823450_nmi(int irq, FAR void *context, FAR void *arg)
static int lc823450_busfault(int irq, FAR void *context, FAR void *arg)
{
(void)enter_critical_section();
_info("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
irqinfo("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@ -194,7 +189,7 @@ static int lc823450_busfault(int irq, FAR void *context, FAR void *arg)
static int lc823450_usagefault(int irq, FAR void *context, FAR void *arg)
{
(void)enter_critical_section();
_info("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
irqinfo("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@ -202,7 +197,7 @@ static int lc823450_usagefault(int irq, FAR void *context, FAR void *arg)
static int lc823450_pendsv(int irq, FAR void *context, FAR void *arg)
{
(void)enter_critical_section();
_info("PANIC!!! PendSV received\n");
irqinfo("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
@ -210,7 +205,7 @@ static int lc823450_pendsv(int irq, FAR void *context, FAR void *arg)
static int lc823450_dbgmonitor(int irq, FAR void *context, FAR void *arg)
{
(void)enter_critical_section();
_info("PANIC!!! Debug Monitor receieved\n");
irqinfo("PANIC!!! Debug Monitor receieved\n");
PANIC();
return 0;
}
@ -218,7 +213,7 @@ static int lc823450_dbgmonitor(int irq, FAR void *context, FAR void *arg)
static int lc823450_reserved(int irq, FAR void *context, FAR void *arg)
{
(void)enter_critical_section();
_info("PANIC!!! Reserved interrupt\n");
irqinfo("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@ -517,7 +512,7 @@ void up_irqinitialize(void)
/* Set the priority of the SVCall interrupt */
#ifdef CONFIG_ARCH_IRQPRIO
/* up_prioritize_irq(LC823450_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
/* up_prioritize_irq(LC823450_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
#endif
#ifdef CONFIG_ARMV7M_USEBASEPRI
lc823450_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
@ -582,11 +577,13 @@ void up_disable_irq(int irq)
irq < LC823450_IRQ_VIRTUAL + LC823450_IRQ_NVIRTUALIRQS)
{
struct lc823450_irq_ops *ops;
ops = virq_ops[irq - LC823450_IRQ_VIRTUAL];
if (ops && ops->disable)
{
ops->disable(irq);
}
return;
}
#endif /* CONFIG_LC823450_VIRQ */
@ -636,14 +633,16 @@ void up_enable_irq(int irq)
#ifdef CONFIG_LC823450_VIRQ
if (irq >= LC823450_IRQ_VIRTUAL &&
irq < LC823450_IRQ_VIRTUAL + LC823450_IRQ_NVIRTUALIRQS)
irq < LC823450_IRQ_VIRTUAL + LC823450_IRQ_NVIRTUALIRQS)
{
struct lc823450_irq_ops *ops;
ops = virq_ops[irq - LC823450_IRQ_VIRTUAL];
if (ops && ops->enable)
{
ops->enable(irq);
}
return;
}
#endif /* CONFIG_LC823450_VIRQ */
@ -768,14 +767,16 @@ int lc823450_irq_srctype(int irq, enum lc823450_srctype_e srctype)
#ifdef CONFIG_LC823450_VIRQ
if (irq >= LC823450_IRQ_VIRTUAL &&
irq < LC823450_IRQ_VIRTUAL + LC823450_IRQ_NVIRTUALIRQS)
irq < LC823450_IRQ_VIRTUAL + LC823450_IRQ_NVIRTUALIRQS)
{
struct lc823450_irq_ops *ops;
ops = virq_ops[irq - LC823450_IRQ_VIRTUAL];
if (ops && ops->srctype)
{
return ops->srctype(irq, srctype);
}
return OK;
}
#endif /* CONFIG_LC823450_VIRQ */
@ -803,7 +804,6 @@ int lc823450_irq_srctype(int irq, enum lc823450_srctype_e srctype)
return OK;
}
/****************************************************************************
* Name: lc823450_irq_register
*

30
arch/arm/src/lc823450/lc823450_lowputc.c
View File

@ -55,9 +55,11 @@
/**************************************************************************
* Pre-processor Definitions
**************************************************************************/
/* Configuration **********************************************************/
/* Select UART parameters for the selected console */
#define CTL_CLK XT1OSC_CLK
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
@ -92,14 +94,17 @@
#endif
/* UDIV settings */
#define UART_UDIV_N 16
#define UART_UDIV_VALUE ((UART_UDIV_N - 1) << 0)
/* UBR settings */
#define UART_UBR_VALUE \
(65536 - (CTL_CLK / (UART_UDIV_N * LC823450_CONSOLE_BAUD)))
/* UMD settings */
#if LC823450_CONSOLE_BITS == 8
# define UART_UMD_BIT_VALUE UART_UMD_CL
#else
@ -123,27 +128,6 @@
#define UART_UMD_VALUE \
(UART_UMD_BIT_VALUE | UART_UMD_2STOP_VALUE | UART_UMD_PARITY_VALUE)
/**************************************************************************
* Private Types
**************************************************************************/
/**************************************************************************
* Private Function Prototypes
**************************************************************************/
/**************************************************************************
* Public Data
**************************************************************************/
/**************************************************************************
* Private Data
**************************************************************************/
/**************************************************************************
* Private Functions
**************************************************************************/
/**************************************************************************
* Public Functions
**************************************************************************/
@ -161,7 +145,9 @@ void up_lowputc(char ch)
#ifdef CONFIG_DEV_CONSOLE_SWITCH
if (g_console_disable)
return;
{
return;
}
#endif
/* Wait until the TX FIFO is empty */

6
arch/arm/src/lc823450/lc823450_lowputc.h
View File

@ -51,12 +51,12 @@
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Name: lc823450_lowsetup
*
@ -65,7 +65,7 @@ extern "C" {
*
************************************************************************************/
EXTERN void lc823450_lowsetup(void);
void lc823450_lowsetup(void);
#undef EXTERN
#if defined(__cplusplus)

40
arch/arm/src/lc823450/lc823450_rtc.c
View File

@ -34,7 +34,6 @@
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -109,7 +108,6 @@
#define RTC_VDET_VDET 0x01
#define RTC_RTCINTCNT (RTC_REGBASE + 0x070)
/****************************************************************************
* Private Types
****************************************************************************/
@ -123,7 +121,6 @@ struct rtc_default
};
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
@ -132,7 +129,6 @@ struct rtc_default
static void rtc_pmnotify(struct pm_callback_s *cb, enum pm_state_e pmstate);
#endif /* CONFIG_RTC_SAVE_DEFAULT */
/****************************************************************************
* Private Data
****************************************************************************/
@ -158,7 +154,6 @@ static int cboot = 1;
volatile bool g_rtc_enabled = false;
/****************************************************************************
* Private Functions
****************************************************************************/
@ -177,7 +172,6 @@ static void tm_divider(struct tm *tm, int divn, int divm)
}
#endif /* CONFIG_RTC_DIV */
/****************************************************************************
* Name: rtc_pmnotify
****************************************************************************/
@ -201,6 +195,7 @@ static void rtc_pmnotify(struct pm_callback_s *cb, enum pm_state_e pmstate)
{
break;
}
(void)up_rtc_getdatetime(&tm);
up_rtc_set_default_datetime(&tm);
break;
@ -212,7 +207,6 @@ static void rtc_pmnotify(struct pm_callback_s *cb, enum pm_state_e pmstate)
}
#endif /* CONFIG_RTC_SAVE_DEFAULT */
/****************************************************************************
* Name: rtc_interrupt
*
@ -234,14 +228,14 @@ static int rtc_interrupt(int irq, void *context, FAR void *arg)
struct tm tm;
up_rtc_getdatetime(&tm);
_info("RTCSTAT = 0x%02x (%04d/%02d/%02d %02d:%02d:%02d)\n",
getreg8(RTC_RTCSTAT),
tm.tm_year + 1900,
tm.tm_mon + 1,
tm.tm_mday,
tm.tm_hour,
tm.tm_min,
tm.tm_sec);
rtcinfo("RTCSTAT = 0x%02x (%04d/%02d/%02d %02d:%02d:%02d)\n",
getreg8(RTC_RTCSTAT),
tm.tm_year + 1900,
tm.tm_mon + 1,
tm.tm_mday,
tm.tm_hour,
tm.tm_min,
tm.tm_sec);
/* Disable IRQ */
@ -284,7 +278,6 @@ static int rtc_interrupt(int irq, void *context, FAR void *arg)
*
****************************************************************************/
static int up_rtc_getdatetime_main(FAR struct tm *tp)
{
#ifdef CONFIG_RTC_DIV
@ -331,18 +324,16 @@ static int up_rtc_getdatetime_main(FAR struct tm *tp)
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_rtcinitialize
*
* Description:
* Initialize the hardware RTC per the selected configuration. This function is
* called once during the OS initialization sequence
* Initialize the hardware RTC per the selected configuration. This
* function is called once during the OS initialization sequence
*
* Input Parameters:
* None
@ -352,7 +343,6 @@ static int up_rtc_getdatetime_main(FAR struct tm *tp)
*
****************************************************************************/
int up_rtc_initialize(void)
{
/* RTC clock / reset */
@ -393,7 +383,7 @@ int up_rtc_initialize(void)
if (!(getreg8(RTC_VDET) & RTC_VDET_VDET))
{
_info("VDET Detect\n");
rtcinfo("VDET Detect\n");
putreg8(0, RTC_PTN32BIT0);
putreg8(0, RTC_PTN32BIT1);
putreg8(0, RTC_PTN32BIT2);
@ -416,7 +406,6 @@ int up_rtc_initialize(void)
putreg32(0, RTC_VDET);
}
if (getreg8(RTC_PTN32BIT0) != RTC_PTN32BIT0_VAL ||
getreg8(RTC_PTN32BIT1) != RTC_PTN32BIT1_VAL ||
getreg8(RTC_PTN32BIT2) != RTC_PTN32BIT2_VAL ||
@ -459,7 +448,6 @@ int up_rtc_initialize(void)
return OK;
}
int up_rtc_getdatetime(FAR struct tm *tp)
{
struct tm tm1, tm2;
@ -677,7 +665,6 @@ int up_rtc_getrawtime(FAR struct timespec *ts)
return 0;
}
#ifdef CONFIG_RTC_SAVE_DEFAULT
/****************************************************************************
@ -721,6 +708,7 @@ int up_rtc_get_default_datetime(struct tm *tp)
llerr("error: %d\n");
return -1;
}
(void)bchlib_read(handle, (void *)&rtc_def,
CONFIG_RTC_SAVE_SECTOR_OFFSET * 512, sizeof(rtc_def));
bchlib_teardown(handle);
@ -728,6 +716,7 @@ int up_rtc_get_default_datetime(struct tm *tp)
{
return -ENOENT;
}
*tp = rtc_def.tm;
return 0;
}
@ -748,6 +737,7 @@ void up_rtc_clear_default(void)
llerr("error: %d\n");
return;
}
memset(&rtc_def, 0, sizeof(rtc_def));
(void)bchlib_write(handle, (void *)&rtc_def,
CONFIG_RTC_SAVE_SECTOR_OFFSET * 512, sizeof(rtc_def));

229
arch/arm/src/lc823450/lc823450_serial.c
View File

@ -164,7 +164,6 @@ int g_console_disable;
#define MIN(a, b) ((a) > (b) ? b : a)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -276,11 +275,13 @@ static struct up_dev_s g_uart0priv =
static uart_dev_t g_uart0port =
{
.recv = {
.recv =
{
.size = CONFIG_UART0_RXBUFSIZE,
.buffer = g_uart0rxbuffer,
},
.xmit = {
.xmit =
{
.size = CONFIG_UART0_TXBUFSIZE,
.buffer = g_uart0txbuffer,
},
@ -304,11 +305,13 @@ static struct up_dev_s g_uart1priv =
static uart_dev_t g_uart1port =
{
.recv = {
.recv =
{
.size = CONFIG_UART1_RXBUFSIZE,
.buffer = g_uart1rxbuffer,
},
.xmit = {
.xmit =
{
.size = CONFIG_UART1_TXBUFSIZE,
.buffer = g_uart1txbuffer,
},
@ -332,11 +335,13 @@ static struct up_dev_s g_uart2priv =
static uart_dev_t g_uart2port =
{
.recv = {
.recv =
{
.size = CONFIG_UART2_RXBUFSIZE,
.buffer = g_uart2rxbuffer,
},
.xmit = {
.xmit =
{
.size = CONFIG_UART2_TXBUFSIZE,
.buffer = g_uart2txbuffer,
},
@ -380,8 +385,10 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint32_t *im)
{
/* Return the current interrupt mask value */
if (im)
*im = priv->im;
if (im != NULL)
{
*im = priv->im;
}
/* Disable all interrupts */
@ -419,6 +426,7 @@ static inline void up_waittxnotfull(struct up_dev_s *priv)
break;
}
up_udelay(1);
}
@ -457,13 +465,16 @@ static int up_setup(struct uart_dev_s *dev)
* REGVAL = 65536 - (ControllerCLK / (UDIV(7~15) + 1) * baudrate)
*/
/* search best divider setting */
for (i = 7; i <= 15; i++)
{
tmp_reg = 65536 - (CTL_CLK / ((i + 1) * priv->baud));
if (tmp_reg >= 65536)
continue;
{
continue;
}
real_baud = CTL_CLK / ((i + 1) * (65536 - tmp_reg));
if (min_diff > abs(real_baud - priv->baud))
{
@ -471,9 +482,10 @@ static int up_setup(struct uart_dev_s *dev)
udiv = i;
}
}
if (udiv < 0)
{
_err("ERR: baud = %d\n", priv->baud);
serr("ERROR: baud = %d\n", priv->baud);
return -EINVAL;
}
@ -495,11 +507,10 @@ static int up_setup(struct uart_dev_s *dev)
ctl |= UART_UMD_CL;
break;
default:
_err("ERR: bits = %d\n", priv->bits);
serr("ERROR: bits = %d\n", priv->bits);
return -EINVAL;
}
ctl &= ~(UART_UMD_PS0 | UART_UMD_PS1);
switch (priv->parity)
{
@ -512,23 +523,32 @@ static int up_setup(struct uart_dev_s *dev)
ctl |= UART_UMD_PS1;
break;
default:
_err("ERR: bits = %d\n", priv->bits);
serr("ERROR: bits = %d\n", priv->bits);
return -EINVAL;
}
ctl &= ~UART_UMD_STL;
if (priv->stopbits2)
ctl |= UART_UMD_STL;
{
ctl |= UART_UMD_STL;
}
if (priv->cts)
ctl |= UART_UMD_CTSEN;
{
ctl |= UART_UMD_CTSEN;
}
else
ctl &= ~UART_UMD_CTSEN;
{
ctl &= ~UART_UMD_CTSEN;
}
if (priv->rts)
ctl |= UART_UMD_RTSEN;
{
ctl |= UART_UMD_RTSEN;
}
else
ctl &= ~UART_UMD_RTSEN;
ctl &= ~UART_UMD_RTSEN;
}
up_serialout(priv, UART_UMD, ctl);
@ -597,7 +617,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, up_interrupt, NULL);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -606,6 +626,7 @@ static int up_attach(struct uart_dev_s *dev)
up_enable_irq(priv->irq);
}
return ret;
}
@ -641,38 +662,14 @@ static void up_detach(struct uart_dev_s *dev)
static int up_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev = NULL;
struct uart_dev_s *dev;
struct up_dev_s *priv;
uint32_t mis;
#ifdef CONFIG_LC823450_UART0
if (g_uart0priv.irq == irq)
{
dev = &g_uart0port;
}
else
#endif
#ifdef CONFIG_LC823450_UART1
if (g_uart1priv.irq == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_LC823450_UART2
if (g_uart2priv.irq == irq)
{
dev = &g_uart2port;
}
else
#endif
{
PANIC();
}
dev = (struct uart_dev_s *)arg;
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Get the masked UART status and clear the pending interrupts. */
mis = up_serialin(priv, UART_UISR);
@ -681,25 +678,38 @@ static int up_interrupt(int irq, void *context, FAR void *arg)
/* Rx buffer not empty ... process incoming bytes */
if (mis & UART_UISR_UARTRF)
uart_recvchars(dev);
{
uart_recvchars(dev);
}
if (mis & UART_UISR_ROWE)
priv->rowe++;
{
priv->rowe++;
}
if (mis & UART_UISR_PE)
priv->pe++;
{
priv->pe++;
}
if (mis & UART_UISR_FE)
priv->fe++;
{
priv->fe++;
}
if (mis & UART_UISR_RXOWE)
priv->rxowe++;
{
priv->rxowe++;
}
/* Handle outgoing, transmit bytes */
/* Tx FIFO not full ... process outgoing bytes */
if (mis & UART_UISR_UARTTF)
uart_xmitchars(dev);
{
uart_xmitchars(dev);
}
up_serialout(priv, UART_UISR, mis);
@ -728,9 +738,13 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
struct up_dev_s *user = (struct up_dev_s *)arg;
if (!user)
ret = -EINVAL;
{
ret = -EINVAL;
}
else
memcpy(user, dev, sizeof(struct up_dev_s));
{
memcpy(user, dev, sizeof(struct up_dev_s));
}
}
break;
#endif
@ -779,9 +793,13 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
/* Perform some sanity checks before accepting any changes */
if (termiosp->c_cflag & PARENB)
priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2;
{
priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2;
}
else
priv->parity = 0;
{
priv->parity = 0;
}
priv->stopbits2 = (termiosp->c_cflag & CSTOPB) != 0;
#ifdef CONFIG_SERIAL_OFLOWCONTROL
@ -803,7 +821,6 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
priv->baud = cfgetispeed(termiosp);
up_setup(dev);
}
break;
@ -822,8 +839,6 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
}
#endif
/****************************************************************************
* Name: up_receive
*
@ -871,7 +886,9 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
#endif
}
else
priv->im &= ~UART_UIEN_UARTRF_IEN;
{
priv->im &= ~UART_UIEN_UARTRF_IEN;
}
up_serialout(priv, UART_UIEN, priv->im);
}
@ -890,7 +907,9 @@ static bool up_rxavailable(struct uart_dev_s *dev)
#ifdef CONFIG_DEV_CONSOLE_SWITCH
if (g_console_disable && dev == &CONSOLE_DEV)
return false;
{
return false;
}
#endif /* CONFIG_DEV_CONSOLE_SWITCH */
return ((up_serialin(priv, UART_USR) & UART_USR_RXEMP) == 0);
@ -910,7 +929,9 @@ static void up_send(struct uart_dev_s *dev, int ch)
#ifdef CONFIG_DEV_CONSOLE_SWITCH
if (g_console_disable && dev == &CONSOLE_DEV)
return;
{
return;
}
#endif /* CONFIG_DEV_CONSOLE_SWITCH */
up_serialout(priv, UART_USTF, (uint32_t)ch);
@ -954,6 +975,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
else
{
/* Disable the TX interrupt */
priv->im &= ~UART_UIEN_UARTTF_IEN;
up_serialout(priv, UART_UIEN, priv->im);
}
@ -974,7 +996,9 @@ static bool up_txready(struct uart_dev_s *dev)
#ifdef CONFIG_DEV_CONSOLE_SWITCH
if (g_console_disable && dev == &CONSOLE_DEV)
return true;
{
return true;
}
#endif /* CONFIG_DEV_CONSOLE_SWITCH */
return ((up_serialin(priv, UART_USR) & UART_USR_TXFULL) == 0);
@ -994,7 +1018,9 @@ static bool up_txempty(struct uart_dev_s *dev)
#ifdef CONFIG_DEV_CONSOLE_SWITCH
if (g_console_disable && dev == &CONSOLE_DEV)
return 0;
{
return 0;
}
#endif /* CONFIG_DEV_CONSOLE_SWITCH */
return ((up_serialin(priv, UART_USR) & UART_USR_TXEMP) != 0);
@ -1005,6 +1031,7 @@ static bool up_txempty(struct uart_dev_s *dev)
/****************************************************************************
* Name: up_hs_attach
****************************************************************************/
static int up_hs_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
@ -1023,6 +1050,7 @@ static int up_hs_attach(struct uart_dev_s *dev)
/****************************************************************************
* Name: up_hs_detach
****************************************************************************/
static void up_hs_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
@ -1038,6 +1066,7 @@ static void up_hs_detach(struct uart_dev_s *dev)
/****************************************************************************
* Name: uart_dma_callback
****************************************************************************/
static void uart_dma_callback(DMA_HANDLE hdma, void *arg, int result)
{
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
@ -1050,12 +1079,17 @@ static void uart_dma_callback(DMA_HANDLE hdma, void *arg, int result)
/****************************************************************************
* Name: uart_rxdma_callback
****************************************************************************/
static void uart_rxdma_callback(DMA_HANDLE hdma, void *arg, int result)
static void uart_rxdma_callback(DMA_HANDLE hdma, void *arg, int result)
{
if (hs_dmaact == HS_DMAACT_ACT1)
hs_dmaact = HS_DMAACT_STOP2;
{
hs_dmaact = HS_DMAACT_STOP2;
}
else
hs_dmaact = HS_DMAACT_STOP1;
{
hs_dmaact = HS_DMAACT_STOP1;
}
hsuart_wdtimer();
up_hs_dmasetup();
@ -1064,21 +1098,25 @@ static void uart_rxdma_callback(DMA_HANDLE hdma, void *arg, int result)
/****************************************************************************
* Name: up_hs_dmasetup
****************************************************************************/
static void up_hs_dmasetup()
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
switch (hs_dmaact)
{
case HS_DMAACT_ACT1:
case HS_DMAACT_ACT2:
break;
case HS_DMAACT_STOP1:
if (g_uart1port.recv.tail > 0 &&
g_uart1port.recv.tail < CONFIG_UART1_RXBUFSIZE / 2)
break;
{
break;
}
lc823450_dmasetup(g_uart1priv.hrxdma,
LC823450_DMA_SRCWIDTH_BYTE |
@ -1090,11 +1128,14 @@ static void up_hs_dmasetup()
lc823450_dmastart(g_uart1priv.hrxdma, uart_rxdma_callback, NULL);
hs_dmaact = HS_DMAACT_ACT1;
break;
break;
case HS_DMAACT_STOP2:
if (g_uart1port.recv.tail > CONFIG_UART1_RXBUFSIZE / 2)
break;
{
break;
}
lc823450_dmasetup(g_uart1priv.hrxdma,
LC823450_DMA_SRCWIDTH_BYTE |
LC823450_DMA_DSTWIDTH_BYTE |
@ -1107,12 +1148,14 @@ static void up_hs_dmasetup()
hs_dmaact = HS_DMAACT_ACT2;
break;
};
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
* Name: up_hs_receive
****************************************************************************/
static int up_hs_receive(struct uart_dev_s *dev, char *buf, int buflen)
{
int len = 0;
@ -1123,10 +1166,11 @@ static int up_hs_receive(struct uart_dev_s *dev, char *buf, int buflen)
;
len = MIN(dmalen, buflen);
flags = irqsave();
flags = enter_critical_section();
if (len + dev->recv.tail > dev->recv.size)
{
int len2;
len2 = dev->recv.size - dev->recv.tail;
memcpy(buf, dev->recv.buffer + dev->recv.tail, len2);
memcpy(buf + len2, dev->recv.buffer, len - len2);
@ -1137,14 +1181,16 @@ static int up_hs_receive(struct uart_dev_s *dev, char *buf, int buflen)
memcpy(buf, dev->recv.buffer + dev->recv.tail, len);
dev->recv.tail += len;
}
up_hs_dmasetup();
irqrestore(flags);
up_hs_dmasetup();
leave_critical_section(flags);
return len;
}
/****************************************************************************
* Name: up_hs_send
****************************************************************************/
static int up_hs_send(struct uart_dev_s *dev, const char *buf, int buflen)
{
int len;
@ -1155,6 +1201,7 @@ retry:
sem_wait(&priv->txdma_wait);
/* If buflen <= FIFO space, write it by PIO. */
if (buflen <=
UART_FIFO_SIZE - UART_USFS_TXFF_LV(up_serialin(priv, UART_USFS)))
{
@ -1164,6 +1211,7 @@ retry:
sem_post(&priv->txdma_wait);
return buflen;
}
len = MIN(buflen, LC823450_DMA_MAX_TRANSSIZE);
len = MIN(len, dev->xmit.size);
@ -1177,6 +1225,7 @@ retry:
lc823450_dmastart(priv->htxdma, uart_dma_callback, dev);
/* BT stack may not handle to short write */
if (len != buflen)
{
buflen -= len;
@ -1209,6 +1258,7 @@ void up_earlyserialinit(void)
*/
/* workaround: force clock enable */
#if defined(CONFIG_LC823450_UART0)
modifyreg32(MCLKCNTAPB, 0, MCLKCNTAPB_UART0_CLKEN | MCLKCNTAPB_UART0IF_CLKEN);
modifyreg32(MRSTCNTAPB, 0, MRSTCNTAPB_UART0_RSTB);
@ -1364,6 +1414,7 @@ void up_console_disable(int disable)
modifyreg32(MCLKCNTAPB, clkmask, 0);
/* remux to gpio */
lc823450_gpio_mux(GPIO_PORT5 | GPIO_PIN6 | GPIO_PULLDOWN | GPIO_MUX0);
lc823450_gpio_mux(GPIO_PORT5 | GPIO_PIN7 | GPIO_PULLDOWN | GPIO_MUX0);
}
@ -1372,6 +1423,7 @@ void up_console_disable(int disable)
llinfo("enable console\n");
/* remux to uart */
lc823450_gpio_mux(GPIO_PORT5 | GPIO_PIN6 | GPIO_PULLDOWN | GPIO_MUX3);
lc823450_gpio_mux(GPIO_PORT5 | GPIO_PIN7 | GPIO_PULLDOWN | GPIO_MUX3);
@ -1386,12 +1438,15 @@ void up_console_disable(int disable)
/****************************************************************************
* Name: hsuart_wdtimer
****************************************************************************/
void hsuart_wdtimer(void)
{
int newhead = 0;
if (!hs_recstart)
return;
{
return;
}
switch (hs_dmaact)
{
@ -1412,10 +1467,14 @@ void hsuart_wdtimer(void)
if (g_uart1port.recv.head != newhead)
{
if (newhead == CONFIG_UART1_RXBUFSIZE)
newhead = 0;
{
newhead = 0;
}
if (g_uart1port.recv.tail == CONFIG_UART1_RXBUFSIZE)
g_uart1port.recv.tail = 0;
{
g_uart1port.recv.tail = 0;
}
g_uart1port.recv.head = newhead;
uart_datareceived(&g_uart1port);
@ -1425,6 +1484,7 @@ void hsuart_wdtimer(void)
/****************************************************************************
* Name: up_hs_get_rbufsize
****************************************************************************/
int up_hsuart_get_rbufsize(struct uart_dev_s *dev)
{
irqstate_t flags;
@ -1432,9 +1492,14 @@ int up_hsuart_get_rbufsize(struct uart_dev_s *dev)
flags = enter_critical_section();
if (dev->recv.tail <= dev->recv.head)
ret = dev->recv.head - dev->recv.tail;
{
ret = dev->recv.head - dev->recv.tail;
}
else
ret = dev->recv.size - dev->recv.tail + dev->recv.head;
{
ret = dev->recv.size - dev->recv.tail + dev->recv.head;
}
leave_critical_section(flags);
return ret;
}

17
arch/arm/src/lc823450/lc823450_serial.h
View File

@ -37,6 +37,10 @@
#ifndef __ARCH_ARM_SRC_LC823450_LC823450_SERIAL_H
#define __ARCH_ARM_SRC_LC823450_LC823450_SERIAL_H
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#define LC823450_UART0_REGBASE 0x4008b000
#define LC823450_UART1_REGBASE 0x4008c000
#define LC823450_UART2_REGBASE 0x4008d000
@ -90,9 +94,20 @@
#define UART_USFS_TXFF_LV(v) (((v) >> 8 ) & 0x1f)
#define UART_USFS_RXFF_LV(v) (((v) >> 0 ) & 0x1f)
/************************************************************************************
* Public Data
************************************************************************************/
#ifdef CONFIG_DEV_CONSOLE_SWITCH
extern int g_console_disable;
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#ifdef CONFIG_DEV_CONSOLE_SWITCH
void up_console_disable(int disable);
extern int g_console_disable;
#endif
#ifdef CONFIG_HSUART

26
arch/arm/src/lc823450/lc823450_spi.c
View File

@ -61,13 +61,17 @@
#include "lc823450_spi.h"
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_SPI_EXCHANGE
# error "SPI_EXCHANGE is not supported"
#endif
#ifndef MIN
# define MIN(a, b) ((a) > (b) ? b : a)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -137,10 +141,6 @@ static struct lc823450_spidev_s g_spidev =
.spidev = { &g_spiops },
};
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@ -208,7 +208,8 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
break;
}
}
_info("Frequency %d -> %d\n", frequency, sysclk / (4 * (256 - div)));
spiinfo("Frequency %d -> %d\n", frequency, sysclk / (4 * (256 - div)));
actual = sysclk / (4 * (256 - div));
putreg32(div, LC823450_SPI_BRG);
@ -310,11 +311,12 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
#endif
}
#ifdef CONFIG_LC823450_SPI_DMA
/****************************************************************************
* Name: spi_dma_callback
*
****************************************************************************/
#ifdef CONFIG_LC823450_SPI_DMA
static void spi_dma_callback(DMA_HANDLE hdma, void *arg, int result)
{
sem_t *waitsem = (sem_t *)arg;
@ -337,6 +339,7 @@ static void spi_dma_callback(DMA_HANDLE hdma, void *arg, int result)
* response
*
****************************************************************************/
#ifdef CONFIG_LC823450_SPI_DMA
static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
{
@ -382,15 +385,12 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
****************************************************************************/
#ifndef CONFIG_SPI_EXCHANGE
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords)
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
size_t nwords)
{
FAR struct lc823450_spidev_s *priv = (FAR struct lc823450_spidev_s *)dev;
#ifdef CONFIG_LC823450_SPI_DMA
#ifndef MIN
#define MIN(a, b) ((a) > (b) ? b : a)
#endif
/* TODO: 16bit */
while (nwords)
@ -424,6 +424,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
while ((getreg32(LC823450_SPI_SSR) & SPI_SSR_TFF) != 0)
;
/* Wait for Shift reg empty */
while ((getreg32(LC823450_SPI_SSR) & SPI_SSR_SHRF) != 0)
@ -525,7 +526,6 @@ FAR struct spi_dev_s *lc823450_spibus_initialize(int port)
if ((getreg32(MCLKCNTAPB) & MCLKCNTAPB_SPI_CLKEN) == 0)
{
/* SPI: clock / reset */
modifyreg32(MCLKCNTAPB, 0, MCLKCNTAPB_SPI_CLKEN);

14
arch/arm/src/lc823450/lc823450_spi.h
View File

@ -40,7 +40,6 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/spi/spi.h>
@ -161,7 +160,8 @@
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
@ -170,13 +170,13 @@ extern "C" {
* Public Functions
****************************************************************************/
EXTERN FAR struct spi_dev_s *lc823450_spibus_initialize(int bus);
EXTERN void lc823450_spiinitialize(void);
EXTERN void lc823450_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
EXTERN uint8_t lc823450_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
FAR struct spi_dev_s *lc823450_spibus_initialize(int bus);
void lc823450_spiinitialize(void);
void lc823450_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
uint8_t lc823450_spistatus(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
EXTERN int lc823450_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
int lc823450_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#undef EXTERN

32
arch/arm/src/lc823450/lc823450_start.c
View File

@ -49,11 +49,12 @@
#include <stdio.h>
#include <nuttx/init.h>
#include <nuttx/arch.h>
#include <nuttx/mtd/mtd.h>
#ifdef CONFIG_LASTKMSG
# include <nuttx/lastkmsg.h>
#endif /* CONFIG_LASTKMSG */
#include <nuttx/arch.h>
#include <nuttx/mtd/mtd.h>
#include "up_arch.h"
#include "up_internal.h"
@ -81,20 +82,14 @@
# include "lc823450_sdram.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
int icx_boot_reason;
extern uint32_t _stext_sram, _etext_sram, _ftext, _svect;
/****************************************************************************
* Private Function prototypes
****************************************************************************/
@ -215,6 +210,7 @@ void __start(void)
}
/* run as interrupt context, before scheduler running */
CURRENT_REGS = (uint32_t *)1;
#ifdef CONFIG_LASTKMSG_LOWOUTS
@ -236,13 +232,11 @@ void __start(void)
#ifdef CONFIG_SPIFLASH_BOOT
/* Copy any necessary code sections from FLASH to RAM. The correct
* destination in SRAM is geive by _sramfuncs and _eramfuncs. The
* destination in SRAM is given by _sramfuncs and _eramfuncs. The
* temporary location is in flash after the data initalization code
* at _framfuncs.
*/
extern uint32_t _stext_sram, _etext_sram, _ftext, _svect;
/* copt text & vectors */
for (src = &_ftext, dest = &_stext_sram; dest < &_etext_sram; )
@ -266,14 +260,13 @@ void __start(void)
#endif /* CONFIG_SPIFLASH_BOOT */
/* Mutex enable */
modifyreg32(MRSTCNTBASIC, 0, MRSTCNTBASIC_MUTEX_RSTB);
modifyreg32(MRSTCNTBASIC, 0, MRSTCNTBASIC_MUTEX_RSTB);
/* Configure the uart so that we can get debug output as soon as possible */
lc823450_clockconfig();
lc823450_lowsetup();
showprogress('A');
@ -334,29 +327,31 @@ void __start(void)
showprogress('F');
#ifndef CONFIG_IPL2
_info("icx_boot_reason = 0x%x\n", icx_boot_reason);
sinfo("icx_boot_reason = 0x%x\n", icx_boot_reason);
#endif /* CONFIG_IPL2 */
#ifdef CONFIG_POWERBUTTON_LDOWN
if (icx_boot_reason & ICX_BOOT_REASON_POWERBUTTON)
{
int t = 1000;
while (--t && up_board_powerkey())
{
up_udelay(10 * 1000);
}
_info("t = %d\n", t);
sinfo("t = %d\n", t);
if (t)
{
up_board_poweren(0);
up_udelay(1000 * 1000);
_info("VBUS connected ?\n");
sinfo("VBUS connected ?\n");
/* VBUS is connected after powerup by key.
* Resume PowerOn sequence. (cancel shutdown)
*/
up_board_poweren(1);
}
}
@ -370,6 +365,7 @@ void __start(void)
(void)get_cpu_ver();
/* run as interrupt context, before scheduler running */
CURRENT_REGS = NULL;
#ifdef CONFIG_DEBUG_STACK

23
arch/arm/src/lc823450/lc823450_syscontrol.c
View File

@ -55,11 +55,6 @@
#include "lc823450_syscontrol.h"
#include <arch/chip/clk.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
@ -72,10 +67,6 @@ static struct clk_st lc823450_clocks[] = LC823450_CLOCKS;
uint8_t cpu_ver;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@ -92,23 +83,22 @@ uint32_t get_cpu_ver(void)
switch (reg)
{
case MODEM_MAV_ES1:
_info("ES1 \n");
sinfo("ES1 \n");
break;
case MODEM_MAV_ES2:
_info("ES2 \n");
sinfo("ES2 \n");
ret = 1;
break;
default:
_info("??? \n");
sinfo("??? \n");
break;
}
cpu_ver = ret;
return ret;
}
/****************************************************************************
* Name: mod_stby_regs
*
@ -143,11 +133,10 @@ void mod_stby_regs(uint32_t enabits, uint32_t disbits)
modifyreg32(ISOCNT, 0, enabits);
}
/* _info("ISOCNT=0x%x, LSISTBY=0x%x \n", getreg32(ISOCNT), getreg32(LSISTBY)); */
/* sinfo("ISOCNT=0x%x, LSISTBY=0x%x \n", getreg32(ISOCNT), getreg32(LSISTBY)); */
}
#endif /* CONFIG_LC823450_LSISTBY */
/****************************************************************************
* Name: up_enable_clk
****************************************************************************/
@ -172,7 +161,6 @@ void up_enable_clk(enum clock_e clk)
* Name: up_disable_clk
****************************************************************************/
void up_disable_clk(enum clock_e clk)
{
irqstate_t flags;
@ -203,9 +191,10 @@ void up_disable_clk(enum clock_e clk)
void lc823450_clock_dump(void)
{
int i;
for (i = 0; i < LC823450_CLOCK_NUM; i++)
{
_info("%s:%d\n", lc823450_clocks[i].name,
sinfo("%s:%d\n", lc823450_clocks[i].name,
lc823450_clocks[i].count);
}
}

13
arch/arm/src/lc823450/lc823450_testset.c
View File

@ -34,7 +34,6 @@
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -46,7 +45,6 @@
#include "up_arch.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@ -54,21 +52,10 @@
#define LC823450_MUTEX_REG_BASE 0x40005000
#define MUTEX_REG_MUTEX0 (LC823450_MUTEX_REG_BASE + 0x00)
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_testset
*

300
arch/arm/src/lc823450/lc823450_timerisr.c
View File

@ -42,6 +42,7 @@
#include <nuttx/config.h>
#include <stdint.h>
#include <stddef.h>
#include <time.h>
#include <debug.h>
#include <nuttx/arch.h>
@ -68,8 +69,8 @@
#define SYSTICK_RELOAD ((lc823450_get_systemfreq() / CLK_TCK) - 1)
/* TIMER_PIN will be used to check the interval */
#define TIMER_PIN (GPIO_PORT5|GPIO_PIN7)
/* #define CHECK_INTERVAL */
@ -108,6 +109,30 @@
# define rMT30CNT (LC823450_MTM3_REGBASE + LC823450_MTM_0CNT)
#endif /* CONFIG_PROFILE */
/****************************************************************************
* Private Types
****************************************************************************/
#ifdef CONFIG_HRT_TIMER
struct hrt_s
{
dq_entry_t ent;
sem_t sem;
int usec;
};
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
#ifdef CONFIG_HRT_TIMER
static dq_queue_t hrt_timer_queue;
static void hrt_queue_refresh(void);
static void hrt_usleep_setup(void);
static int hrt_interrupt(int irq, FAR void *context, FAR void *arg);
static void hrt_usleep_add(struct hrt_s *phrt);
#endif
/****************************************************************************
* Private Data
@ -116,6 +141,9 @@
#ifdef CHECK_INTERVAL
static bool _timer_val = true;
#endif
#ifdef CONFIG_PROFILE
static int dbg;
#endif
/****************************************************************************
* Public Data
@ -127,101 +155,19 @@ int profile_ptr;
int profile_en;
#endif /* CONFIG_PROFILE */
/****************************************************************************
* Private Types
****************************************************************************/
#ifdef CONFIG_HRT_TIMER
extern int g_taskid_init;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
* Name: hrt_queue_refresh
****************************************************************************/
/****************************************************************************
* Name: up_proftimerisr
****************************************************************************/
#ifdef CONFIG_PROFILE
static int dbg;
int up_proftimerisr(int irq, uint32_t *regs, FAR void *arg)
{
putreg32(1 << 1, rMT30STS);
if (profile_en)
{
if (profile_ptr != CONFIG_PROFILE_SAMPLES)
{
ASSERT(current_regs);
profile_data[profile_ptr++] = current_regs[REG_R15];
}
else
{
profile_en = 0;
_info("PROFILING DONE\n");
}
}
return 0;
}
#endif /* CONFIG_PROFILE */
/****************************************************************************
* Name: up_timerisr
****************************************************************************/
int up_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Process timer interrupt */
#ifdef CONFIG_DVFS
extern void lc823450_dvfs_tick_callback(void);
lc823450_dvfs_tick_callback();
#endif
#ifdef CONFIG_LC823450_MTM0_TICK
/* Clear the interrupt (BEVT) */
putreg32(1 << 1, rMT00STS);
#endif
sched_process_timer();
#ifdef CONFIG_LCA_SOUNDSKIP_CHECK
extern void lca_check_soundskip(void);
lca_check_soundskip();
#endif
#ifdef CHECK_INTERVAL
_timer_val = !_timer_val;
lc823450_gpio_write(TIMER_PIN, _timer_val);
#endif
#ifdef CONFIG_HSUART
hsuart_wdtimer();
#endif /* CONFIG_HSUART */
return 0;
}
#ifdef CONFIG_HRT_TIMER
#include <stddef.h>
struct hrt_s
{
dq_entry_t ent;
sem_t sem;
int usec;
};
static dq_queue_t hrt_timer_queue;
static void hrt_queue_refresh(void);
static void hrt_usleep_setup(void);
static int hrt_interrupt(int irq, FAR void *context, FAR void *arg);
static void hrt_usleep_add(struct hrt_s *phrt);
static void hrt_queue_refresh(void)
{
int elapsed;
@ -240,6 +186,7 @@ static void hrt_queue_refresh(void)
cont:
/* serch for expired */
for (pent = hrt_timer_queue.head; pent; pent = dq_next(pent))
{
tmp = container_of(pent, struct hrt_s, ent);
@ -257,7 +204,13 @@ cont:
leave_critical_section(flags);
}
#endif
/****************************************************************************
* Name: hrt_queue_refresh
****************************************************************************/
#ifdef CONFIG_HRT_TIMER
static void hrt_usleep_setup(void)
{
uint32_t count;
@ -298,7 +251,13 @@ static void hrt_usleep_setup(void)
putreg32(1, rMT2OPR);
leave_critical_section(flags);
}
#endif
/****************************************************************************
* Name: hrt_interrupt
****************************************************************************/
#ifdef CONFIG_HRT_TIMER
static int hrt_interrupt(int irq, FAR void *context, FAR void *arg)
{
/* Disable MTM2-Ch0 */
@ -350,10 +309,80 @@ static void hrt_usleep_add(struct hrt_s *phrt)
hrt_usleep_setup();
}
#endif
extern int g_taskid_init;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_proftimerisr
****************************************************************************/
#ifdef CONFIG_PROFILE
int up_proftimerisr(int irq, uint32_t *regs, FAR void *arg)
{
putreg32(1 << 1, rMT30STS);
if (profile_en)
{
if (profile_ptr != CONFIG_PROFILE_SAMPLES)
{
ASSERT(current_regs);
profile_data[profile_ptr++] = current_regs[REG_R15];
}
else
{
profile_en = 0;
tmrinfo("PROFILING DONE\n");
}
}
return 0;
}
#endif /* CONFIG_PROFILE */
/****************************************************************************
* Name: up_timerisr
****************************************************************************/
int up_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Process timer interrupt */
#ifdef CONFIG_DVFS
extern void lc823450_dvfs_tick_callback(void);
lc823450_dvfs_tick_callback();
#endif
#ifdef CONFIG_LC823450_MTM0_TICK
/* Clear the interrupt (BEVT) */
putreg32(1 << 1, rMT00STS);
#endif
sched_process_timer();
#ifdef CONFIG_LCA_SOUNDSKIP_CHECK
extern void lca_check_soundskip(void);
lca_check_soundskip();
#endif
#ifdef CHECK_INTERVAL
_timer_val = !_timer_val;
lc823450_gpio_write(TIMER_PIN, _timer_val);
#endif
#ifdef CONFIG_HSUART
hsuart_wdtimer();
#endif /* CONFIG_HSUART */
return 0;
}
/****************************************************************************
* Name: up_hrttimer_usleep
****************************************************************************/
#ifdef CONFIG_HRT_TIMER
int up_hrttimer_usleep(unsigned int usec)
{
struct hrt_s hrt;
@ -366,10 +395,53 @@ int up_hrttimer_usleep(unsigned int usec)
return 0;
}
#endif /* CONFIG_HRT_TIMER */
/****************************************************************************
* Name: up_get_timer_fraction
****************************************************************************/
static uint64_t up_get_timer_fraction(void)
{
#ifdef CONFIG_LC823450_MTM0_TICK
uint32_t regval;
uint64_t nsec;
/* read the counter */
regval = getreg32(rMT00CNT);
/* check if the timer interrupt is underway */
if (getreg32(rMT00STS) & 0x2 && regval < (MTM_RELOAD/10))
{
return NSEC_PER_TICK;
}
nsec = ((uint64_t)regval * NSEC_PER_TICK / MTM_RELOAD);
return nsec;
#else
uint32_t cur;
uint64_t nsec;
/* read the counter */
cur = getreg32(NVIC_SYSTICK_CURRENT);
/* check if the systick interrupt is pending or active */
if ((getreg32(0xE000ED04) & (1 << 26) ||
getreg32(0xE000ED24) & (1 << 11))
&& (SYSTICK_RELOAD - cur) < (SYSTICK_RELOAD/10))
{
return NSEC_PER_TICK;
}
nsec = ((uint64_t)(SYSTICK_RELOAD - cur) * NSEC_PER_TICK / SYSTICK_RELOAD);
return nsec;
#endif
}
/****************************************************************************
* Name: arm_timer_initialize
****************************************************************************/
@ -531,54 +603,12 @@ void arm_timer_initialize(void)
#endif
}
static uint64_t up_get_timer_fraction(void)
{
#ifdef CONFIG_LC823450_MTM0_TICK
uint32_t regval;
uint64_t nsec;
/* read the counter */
regval = getreg32(rMT00CNT);
/* check if the timer interrupt is underway */
if (getreg32(rMT00STS) & 0x2 && regval < (MTM_RELOAD/10))
{
return NSEC_PER_TICK;
}
nsec = ((uint64_t)regval * NSEC_PER_TICK / MTM_RELOAD);
return nsec;
#else
uint32_t cur;
uint64_t nsec;
/* read the counter */
cur = getreg32(NVIC_SYSTICK_CURRENT);
/* check if the systick interrupt is pending or active */
if ((getreg32(0xE000ED04) & (1 << 26) ||
getreg32(0xE000ED24) & (1 << 11))
&& (SYSTICK_RELOAD - cur) < (SYSTICK_RELOAD/10))
{
return NSEC_PER_TICK;
}
nsec = ((uint64_t)(SYSTICK_RELOAD - cur) * NSEC_PER_TICK / SYSTICK_RELOAD);
return nsec;
#endif
}
/****************************************************************************
* Name: up_hr_gettime
*
* Description:
* This function is used in clock_gettime() to obtain high resolution time.
*
****************************************************************************/
int up_hr_gettime(FAR struct timespec *tp)
@ -602,7 +632,7 @@ int up_hr_gettime(FAR struct timespec *tp)
leave_critical_section(flags);
_info("elapsed = %lld \n", elapsed);
tmrinfo("elapsed = %lld \n", elapsed);
/* Convert the elapsed time in seconds and nanoseconds. */
@ -614,6 +644,6 @@ int up_hr_gettime(FAR struct timespec *tp)
tp->tv_sec = (time_t)secs;
tp->tv_nsec = (long)nsecs;
_info("Returning tp=(%d,%d)\n", (int)tp->tv_sec, (int)tp->tv_nsec);
tmrinfo("Returning tp=(%d,%d)\n", (int)tp->tv_sec, (int)tp->tv_nsec);
return OK;
}

10
arch/arm/src/lc823450/lc823450_vectors.S
View File

@ -34,7 +34,6 @@
*
****************************************************************************/
/*****************************************************************************
* Included Files
****************************************************************************/
@ -46,14 +45,11 @@
#include "chip.h"
#include "exc_return.h"
/*****************************************************************************
* Configuration
****************************************************************************/
/*****************************************************************************
* Preprocessor Definitions
****************************************************************************/
/* Configuration ********************************************************************/
/* Configuration ************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the
@ -84,7 +80,7 @@
# endif
#endif
/* Memory Map ***********************************************************************/
/* Memory Map ***************************************************************/
/*
* 0x0800:0000 - Beginning of FLASH. Address of vectors (if not using bootloader)
* Mapped to address 0x0000:0000 at boot time.

17
arch/arm/src/lc823450/lc823450_vectors.h
View File

@ -34,22 +34,19 @@
*
****************************************************************************/
/****************************************************************************
* Pre-processor definitions
****************************************************************************/
/* This file is included by lc823450_vectors.S. It provides the macro VECTOR that
* supplies a LC823450 vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/lc823450/irq.h.
* lc823450_vectors.S will defined the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
/* This file is included by lc823450_vectors.S. It provides the macro VECTOR
* that supplies a LC823450 vector in terms of a (lower-case) ISR label and
* an (upper-case) IRQ number as defined in arch/arm/include/lc823450/irq.h.
* lc823450_vectors.S will defined the VECTOR in different ways in order to
* generate the interrupt vectors and handlers in their final form.
*/
/* If the common ARMv7-M vector handling is used, then all it needs is the following
* definition that provides the number of supported vectors.
/* If the common ARMv7-M vector handling is used, then all it needs is the
* following definition that provides the number of supported vectors.
*/
#ifdef CONFIG_ARMV7M_CMNVECTOR