diff --git a/arch/avr/src/at32uc3/at32uc3_clkinit.c b/arch/avr/src/at32uc3/at32uc3_clkinit.c index 8dc1ae4f10..851d662734 100644 --- a/arch/avr/src/at32uc3/at32uc3_clkinit.c +++ b/arch/avr/src/at32uc3/at32uc3_clkinit.c @@ -108,8 +108,8 @@ static inline void up_enableosc32(void) /* Enable the 32-kHz clock */ regval = getreg32(AVR32_PM_OSCCTRL32); - regval &= ~PM_OSCCTRL_STARTUP_MASK; - regval |= PM_OSCCTRL32_EN|(AVR32_OSC32STARTUP << PM_OSCCTRL_STARTUP_SHIFT); + regval &= ~PM_OSCCTRL32_STARTUP_MASK; + regval |= PM_OSCCTRL32_EN|(AVR32_OSC32STARTUP << PM_OSCCTRL32_STARTUP_SHIFT); putreg32(regval, AVR32_PM_OSCCTRL32); } @@ -220,7 +220,7 @@ static inline void up_enableosc1(void) **************************************************************************/ #ifdef AVR32_CLOCK_PLL0 -static inline void up_enableosc1(void) +static inline void up_enablepll0(void) { /* Setup PLL0 */ @@ -270,7 +270,7 @@ static inline void up_enableosc1(void) **************************************************************************/ #ifdef AVR32_CLOCK_PLL1 -static inline void up_enableosc1(void) +static inline void up_enablepll1(void) { /* Setup PLL1 */ diff --git a/arch/avr/src/at32uc3/at32uc3_pm.h b/arch/avr/src/at32uc3/at32uc3_pm.h index 786cf1d680..3658768773 100644 --- a/arch/avr/src/at32uc3/at32uc3_pm.h +++ b/arch/avr/src/at32uc3/at32uc3_pm.h @@ -208,7 +208,7 @@ #define PM_OSCCTRL32_MODE_MASK (7 << PM_OSCCTRL32_MODE_SHIFT) # define PM_OSCCTRL32_MODE_EXT (0 << PM_OSCCTRL32_MODE_SHIFT) /* External clock */ # define PM_OSCCTRL32_MODE_XTAL (1 << PM_OSCCTRL32_MODE_SHIFT) /* Crystal */ -#define PM_OSCCTRL32_STARTUPSHIFT (16) /* Bits 16-18: Oscillator Startup Time */ +#define PM_OSCCTRL32_STARTUP_SHIFT (16) /* Bits 16-18: Oscillator Startup Time */ #define PM_OSCCTRL32_STARTUP_MASK (7 << PM_OSCCTRL32_STARTUP_SHIFT) # define PM_OSCCTRL32_STARTUP_0 (0 << PM_OSCCTRL32_STARTUP_SHIFT) /* Num RCOsc cycles */ # define PM_OSCCTRL32_STARTUP_128 (1 << PM_OSCCTRL32_STARTUP_SHIFT) /* " " " " " " */