Merge remote-tracking branch 'upstream/master'
This commit is contained in:
pnb
commit
5f9d23290a
@ -54,13 +54,33 @@
|
||||
* channels. Channel 95 does not have a dedicated vector and shall not be used.
|
||||
*/
|
||||
|
||||
#define TMS570_IRQ_PHANTOM 0 /* The first is the "phantom" interrupt */
|
||||
#define TMS570_IRQ_NCHANNELS 95 /* The "phantom" vector is followed by 95 real
|
||||
* interrupt channels */
|
||||
#define TMS570_VECT_PHANTOM 0 /* The first is the "phantom" interrupt */
|
||||
|
||||
/* Total number of IRQ numbers */
|
||||
/* Default channel assignments are MCU-dependent */
|
||||
|
||||
#define NR_IRQS (95) /* Zero corresponds to channel 0, vector 1 */
|
||||
#if defined(CONFIG_ARCH_CHIP_TMS570LS0232PZ)
|
||||
# error No IRQ definitions for the TMS570LS0232PZ
|
||||
#elif defined(CONFIG_ARCH_CHIP_TMS570LS0332PZ)
|
||||
# include <arch/tms570/tms570ls04x03x_irq.h>
|
||||
#elif defined(CONFIG_ARCH_CHIP_TMS570LS0432PZ)
|
||||
# include <arch/tms570/tms570ls04x03x_irq.h>
|
||||
#elif defined(CONFIG_ARCH_CHIP_TMS570LS0714PZ)
|
||||
# error No IRQ definitions for the TMS570LS0714PZ
|
||||
#elif defined(CONFIG_ARCH_CHIP_TMS570LS0714PGE)
|
||||
# error No IRQ definitions for the TMS570LS0714PGE
|
||||
#elif defined(CONFIG_ARCH_CHIP_TMS570LS0714ZWT)
|
||||
# error No IRQ definitions for the TMS570LS0714ZWT
|
||||
#elif defined(CONFIG_ARCH_CHIP_TMS570LS1227ZWT)
|
||||
# error No IRQ definitions for the TMS570LS1227ZWT
|
||||
#else
|
||||
# error "Unrecognized Hercules chip"
|
||||
#endif
|
||||
|
||||
/* Total number of IRQ numbers. Excluds the phantom vector. Zero corresponds to
|
||||
* channel 0, vector 1.
|
||||
*/
|
||||
|
||||
#define NR_IRQS (TMS570_IRQ_NCHANNELS)
|
||||
|
||||
/****************************************************************************************
|
||||
* Public Types
|
||||
|
||||
129
arch/arm/include/tms570/tms570ls04x03x_irq.h
Normal file
129
arch/arm/include/tms570/tms570ls04x03x_irq.h
Normal file
@ -0,0 +1,129 @@
|
||||
/****************************************************************************************
|
||||
* arch/arm/include/tms570/tms570ls04x03x_irq.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************************/
|
||||
|
||||
/* This file should never be included directed but, rather, only indirectly through
|
||||
* nuttx/irq.h
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_TMS570_TMS570LS04X03X_IRQ_H
|
||||
#define __ARCH_ARM_INCLUDE_TMS570_TMS570LS04X03X_IRQ_H
|
||||
|
||||
/****************************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/****************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************************/
|
||||
/* The interrupt vector table only has 96 entries, one phantom vector and 95 interrupt
|
||||
* channels. Channel 95 does not have a dedicated vector and shall not be used.
|
||||
*/
|
||||
|
||||
#define TMS570_IRQ_NCHANNELS 95 /* The "phantom" vector is followed by 95 real
|
||||
* interrupt channels */
|
||||
|
||||
/* Default request to channel assignments. Undefined requests are reserved */
|
||||
|
||||
#define TMS570_REQ_ESMHIGH 0 /* ESM High level interrupt (NMI) */
|
||||
#define TMS570_REQ_RTICMP0 2 /* RTI compare interrupt 0 */
|
||||
#define TMS570_REQ_RTICMP1 3 /* RTI compare interrupt 1 */
|
||||
#define TMS570_REQ_RTICMP2 4 /* RTI compare interrupt 2 */
|
||||
#define TMS570_REQ_RTICMP3 5 /* RTI compare interrupt 3 */
|
||||
#define TMS570_REQ_RTIOVF0 6 /* RTI overflow interrupt 0 */
|
||||
#define TMS570_REQ_RTIOVF1 7 /* RTI overflow interrupt 1 */
|
||||
#define TMS570_REQ_GIOA 9 /* GIO interrupt A */
|
||||
#define TMS570_REQ_N2HET_0 10 /* N2HET level 0 interrupt */
|
||||
#define TMS570_REQ_HTU_0 11 /* HTU level 0 interrupt */
|
||||
#define TMS570_REQ_MIBSPI1_0 12 /* MIBSPI1 level 0 interrupt */
|
||||
#define TMS570_REQ_SCI_0 13 /* SCI/LIN level 0 interrupt */
|
||||
#define TMS570_REQ_MIBADCEV 14 /* MIBADC event group interrupt */
|
||||
#define TMS570_REQ_MIBADSW1 15 /* MIBADC sw group 1 interrupt */
|
||||
#define TMS570_REQ_DCAN1_0 16 /* DCAN1 level 0 interrupt */
|
||||
#define TMS570_REQ_SPI2_0 17 /* SPI2 level 0 interrupt */
|
||||
#define TMS570_REQ_ESMLO 20 /* ESM Low level interrupt */
|
||||
#define TMS570_REQ_SYSTEM 21 /* Software interrupt (SSI) */
|
||||
#define TMS570_REQ_CPU 22 /* PMU interrupt */
|
||||
#define TMS570_REQ_GIOB 23 /* GIO interrupt B */
|
||||
#define TMS570_REQ_N2HET_1 24 /* N2HET level 1 interrupt */
|
||||
#define TMS570_REQ_HTU_1 25 /* HTU level 1 interrupt */
|
||||
#define TMS570_REQ_MIBSPI1_1 26 /* MIBSPI1 level 1 interrupt */
|
||||
#define TMS570_REQ_SCI_1 27 /* SCI/LIN level 1 interrupt */
|
||||
#define TMS570_REQ_MIBADCSW2 28 /* MIBADC sw group 2 interrupt */
|
||||
#define TMS570_REQ_DCAN1_1 29 /* DCAN1 level 1 interrupt */
|
||||
#define TMS570_REQ_SPI2_1 30 /* SPI2 level 1 interrupt */
|
||||
#define TMS570_REQ_MIBADCMC 31 /* MIBADC magnitude compare interrupt */
|
||||
#define TMS570_REQ_DCAN2_0 35 /* DCAN2 level 0 interrupt */
|
||||
#define TMS570_REQ_SPI3_0 37 /* SPI3 level 0 interrupt */
|
||||
#define TMS570_REQ_SPI3_1 38 /* SPI3 level 1 interrupt */
|
||||
#define TMS570_REQ_DCAN2_1 42 /* DCAN2 level 1 interrupt */
|
||||
#define TMS570_REQ_FMC 61 /* FSM_DONE interrupt */
|
||||
#define TMS570_REQ_HWAGH 80 /* WA_INT_REQ_H */
|
||||
#define TMS570_REQ_DCC 82 /* DCC done interrupt */
|
||||
#define TMS570_REQ_EQEP 84 /* eQEP Interrupt */
|
||||
#define TMS570_REQ_PBIST 85 /* PBIST Done Interrupt */
|
||||
#define TMS570_REQ_HWAGL 88 /* HWA_INT_REQ_L */
|
||||
|
||||
/****************************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/****************************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_TMS570_TMS570LS04X03X_IRQ_H */
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/************************************************************************************
|
||||
/*****************************************************************************
|
||||
* arch/arm/src/armv7-m/mpu.h
|
||||
*
|
||||
* Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
|
||||
@ -31,14 +31,14 @@
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_ARMV7M_MPU_H
|
||||
#define __ARCH_ARM_SRC_ARMV7M_MPU_H
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
@ -46,14 +46,15 @@
|
||||
# include <sys/types.h>
|
||||
# include <stdint.h>
|
||||
# include <stdbool.h>
|
||||
# include <assert.h>
|
||||
# include <debug.h>
|
||||
|
||||
# include "up_arch.h"
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/* MPU Register Addresses */
|
||||
|
||||
@ -86,14 +87,16 @@
|
||||
|
||||
/* MPU Region Number Register Bit Definitions */
|
||||
|
||||
#if CONFIG_ARM_MPU_NREGIONS <= 8
|
||||
# define MPU_RNR_MASK (0x00000007)
|
||||
#elif CONFIG_ARM_MPU_NREGIONS <= 16
|
||||
# define MPU_RNR_MASK (0x0000000f)
|
||||
#elif CONFIG_ARM_MPU_NREGIONS <= 32
|
||||
# define MPU_RNR_MASK (0x0000001f)
|
||||
#else
|
||||
# error "FIXME: Unsupported number of MPU regions"
|
||||
#if defined(CONFIG_ARM_MPU_NREGIONS)
|
||||
# if CONFIG_ARM_MPU_NREGIONS <= 8
|
||||
# define MPU_RNR_MASK (0x00000007)
|
||||
# elif CONFIG_ARM_MPU_NREGIONS <= 16
|
||||
# define MPU_RNR_MASK (0x0000000f)
|
||||
# elif CONFIG_ARM_MPU_NREGIONS <= 32
|
||||
# define MPU_RNR_MASK (0x0000001f)
|
||||
# else
|
||||
# error "FIXME: Unsupported number of MPU regions"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/* MPU Region Base Address Register Bit Definitions */
|
||||
@ -136,9 +139,9 @@
|
||||
# define MPU_RASR_AP_RORO (6 << MPU_RASR_AP_SHIFT) /* P:RO U:RO */
|
||||
# define MPU_RASR_XN (1 << 28) /* Bit 28: Instruction access disable */
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#undef EXTERN
|
||||
@ -202,9 +205,9 @@ uint8_t mpu_log2regionfloor(size_t size);
|
||||
|
||||
uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: mpu_showtype
|
||||
@ -255,6 +258,7 @@ static inline void mpu_control(bool enable, bool hfnmiena, bool privdefena)
|
||||
putreg32(regval, MPU_CTRL);
|
||||
}
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Name: mpu_priv_stronglyordered
|
||||
*
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* arch/arm/src/armv7-r/mpu.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
@ -31,14 +31,14 @@
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_ARMV7R_MPU_H
|
||||
#define __ARCH_ARM_SRC_ARMV7R_MPU_H
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
@ -52,9 +52,9 @@
|
||||
# include "cp15.h"
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/* MPU Type Register Bit Definitions */
|
||||
|
||||
@ -106,19 +106,21 @@
|
||||
|
||||
/* MPU Region Number Register */
|
||||
|
||||
#if CONFIG_ARM_MPU_NREGIONS <= 8
|
||||
# define MPU_RGNR_MASK (0x00000007)
|
||||
#elif CONFIG_ARM_MPU_NREGIONS <= 16
|
||||
# define MPU_RGNR_MASK (0x0000000f)
|
||||
#elif CONFIG_ARM_MPU_NREGIONS <= 32
|
||||
# define MPU_RGNR_MASK (0x0000001f)
|
||||
#else
|
||||
#if defined(CONFIG_ARM_MPU_NREGIONS)
|
||||
# if CONFIG_ARM_MPU_NREGIONS <= 8
|
||||
# define MPU_RGNR_MASK (0x00000007)
|
||||
# elif CONFIG_ARM_MPU_NREGIONS <= 16
|
||||
# define MPU_RGNR_MASK (0x0000000f)
|
||||
# elif CONFIG_ARM_MPU_NREGIONS <= 32
|
||||
# define MPU_RGNR_MASK (0x0000001f)
|
||||
# else
|
||||
# error "FIXME: Unsupported number of MPU regions"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#undef EXTERN
|
||||
@ -182,9 +184,9 @@ uint8_t mpu_log2regionfloor(size_t size);
|
||||
|
||||
uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: mpu_get_mpuir
|
||||
|
||||
@ -49,12 +49,6 @@
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* arch/arm/src/armv7-a/l2cc_pl310.h includes this file and expects it to provide the
|
||||
* address of the L2CC-PL310 implementation.
|
||||
*/
|
||||
|
||||
#define L2CC_VBASE SAM_L2CC_VSECTION
|
||||
|
||||
/* Cache line sizes (in bytes)for the SAVA5Dx */
|
||||
|
||||
#define ARMV7A_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||
|
||||
203
arch/arm/src/tms570/chip/tms570_rti.h
Normal file
203
arch/arm/src/tms570/chip/tms570_rti.h
Normal file
@ -0,0 +1,203 @@
|
||||
/****************************************************************************************************
|
||||
* arch/arm/src/tms570/chip/tms570_rti.h
|
||||
* Real Time Interrupt (RTI) Module Register Definitions
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* References:
|
||||
*
|
||||
* TMS570LS04x/03x 16/32-Bit RISC Flash Microcontroller, Technical Reference Manual, Texas
|
||||
* Instruments, Literature Number: SPNU517A, September 2013
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TMS570_CHIP_TMS570_RTI_H
|
||||
#define __ARCH_ARM_SRC_TMS570_CHIP_TMS570_RTI_H
|
||||
|
||||
/****************************************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include "chip/tms570_memorymap.h"
|
||||
|
||||
/****************************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************************************/
|
||||
|
||||
/* Register Offsets *********************************************************************************/
|
||||
|
||||
#define TMS570_RTI_GCTRL_OFFSET 0x0000 /* RTI Global Control Register */
|
||||
/* 0x0004 RTITBCTRL Reserved. Do NOT use. */
|
||||
#define TMS570_RTI_CAPCTRL_OFFSET 0x0008 /* RTI Capture Control Register */
|
||||
#define TMS570_RTI_COMPCTRL_OFFSET 0x000c /* RTI Compare Control Register */
|
||||
#define TMS570_RTI_FRC0_OFFSET 0x0010 /* RTI Free Running Counter 0 Register */
|
||||
#define TMS570_RTI_UC0_OFFSET 0x0014 /* RTI Up Counter 0 Register */
|
||||
#define TMS570_RTI_CPUC0_OFFSET 0x0018 /* RTI Compare Up Counter 0 Register */
|
||||
#define TMS570_RTI_CAFRC0_OFFSET 0x0020 /* RTI Capture Free Running Counter 0 Register */
|
||||
#define TMS570_RTI_CAUC0_OFFSET 0x0024 /* RTI Capture Up Counter 0 Register */
|
||||
#define TMS570_RTI_FRC1_OFFSET 0x0030 /* RTI Free Running Counter 1 Register */
|
||||
#define TMS570_RTI_UC1_OFFSET 0x0034 /* RTI Up Counter 1 Register */
|
||||
#define TMS570_RTI_CPUC1_OFFSET 0x0038 /* RTI Compare Up Counter 1 Register */
|
||||
#define TMS570_RTI_CAFRC1_OFFSET 0x0040 /* RTI Capture Free Running Counter 1 Register */
|
||||
#define TMS570_RTI_CAUC1_OFFSET 0x0044 /* RTI Capture Up Counter 1 Register */
|
||||
#define TMS570_RTI_COMP0_OFFSET 0x0050 /* RTI Compare 0 Register Section */
|
||||
#define TMS570_RTI_UDCP0_OFFSET 0x0054 /* RTI Update Compare 0 Register */
|
||||
#define TMS570_RTI_COMP1_OFFSET 0x0058 /* RTI Compare 1 Register */
|
||||
#define TMS570_RTI_UDCP1_OFFSET 0x005c /* RTI Update Compare 1 Register */
|
||||
#define TMS570_RTI_COMP2_OFFSET 0x0060 /* RTI Compare 2 Register */
|
||||
#define TMS570_RTI_UDCP2_OFFSET 0x0064 /* RTI Update Compare 2 Register */
|
||||
#define TMS570_RTI_COMP3_OFFSET 0x0068 /* RTI Compare 3 Register */
|
||||
#define TMS570_RTI_UDCP3_OFFSET 0x006c /* RTI Update Compare 3 Register */
|
||||
/* 0x0070 RTITBLCOMP Reserved. Do NOT use. */
|
||||
/* 0x0074 RTITBHCOMP Reserved. Do NOT use. */
|
||||
#define TMS570_RTI_SETINTENA_OFFSET 0x0080 /* RTI Set Interrupt Enable Register */
|
||||
#define TMS570_RTI_CLEARINTENA_OFFSET 0x0084 /* RTI Clear Interrupt Enable Register */
|
||||
#define TMS570_RTI_INTFLAG_OFFSET 0x0088 /* RTI Interrupt Flag Register */
|
||||
#define TMS570_RTI_DWDCTRL_OFFSET 0x0090 /* Digital Watchdog Control Register */
|
||||
#define TMS570_RTI_DWDPRLD_OFFSET 0x0094 /* Digital Watchdog Preload Register */
|
||||
#define TMS570_RTI_WDSTATUS_OFFSET 0x0098 /* Watchdog Status Register */
|
||||
#define TMS570_RTI_WDKEY_OFFSET 0x009c /* RTI Watchdog Key Register */
|
||||
#define TMS570_RTI_DWDCNTR_OFFSET 0x00a0 /* RTI Digital Watchdog Down Counter Register */
|
||||
#define TMS570_RTI_WWDRXNCTRL_OFFSET 0x00a4 /* Digital Windowed Watchdog Reaction Control Register Section */
|
||||
#define TMS570_RTI_WWDSIZECTRL_OFFSET 0x00a8 /* Digital Windowed Watchdog Window Size Control Register */
|
||||
#define TMS570_RTI_INTCLRENABLE_OFFSET 0x00ac /* RTI Compare Interrupt Clear Enable Register */
|
||||
#define TMS570_RTI_COMP0CLR_OFFSET 0x00b0 /* RTI Compare 0 Clear Register */
|
||||
#define TMS570_RTI_COMP1CLR_OFFSET 0x00b4 /* RTI Compare 1 Clear Register */
|
||||
#define TMS570_RTI_COMP2CLR_OFFSET 0x00b8 /* RTI Compare 2 Clear Register */
|
||||
#define TMS570_RTI_COMP3CLR_OFFSET 0x00bc /* RTI Compare 3 Clear Register */
|
||||
|
||||
/* Register Addresses *******************************************************************************/
|
||||
|
||||
#define TMS570_RTI_GCTRL (TMS570_RTIDWWD_BASE+TMS570_RTI_GCTRL_OFFSET)
|
||||
#define TMS570_RTI_CAPCTRL (TMS570_RTIDWWD_BASE+TMS570_RTI_CAPCTRL_OFFSET)
|
||||
#define TMS570_RTI_COMPCTRL (TMS570_RTIDWWD_BASE+TMS570_RTI_COMPCTRL_OFFSET)
|
||||
#define TMS570_RTI_FRC0 (TMS570_RTIDWWD_BASE+TMS570_RTI_FRC0_OFFSET)
|
||||
#define TMS570_RTI_UC0 (TMS570_RTIDWWD_BASE+TMS570_RTI_UC0_OFFSET)
|
||||
#define TMS570_RTI_CPUC0 (TMS570_RTIDWWD_BASE+TMS570_RTI_CPUC0_OFFSET)
|
||||
#define TMS570_RTI_CAFRC0 (TMS570_RTIDWWD_BASE+TMS570_RTI_CAFRC0_OFFSET)
|
||||
#define TMS570_RTI_CAUC0 (TMS570_RTIDWWD_BASE+TMS570_RTI_CAUC0_OFFSET)
|
||||
#define TMS570_RTI_FRC1 (TMS570_RTIDWWD_BASE+TMS570_RTI_FRC1_OFFSET)
|
||||
#define TMS570_RTI_UC1 (TMS570_RTIDWWD_BASE+TMS570_RTI_UC1_OFFSET)
|
||||
#define TMS570_RTI_CPUC1 (TMS570_RTIDWWD_BASE+TMS570_RTI_CPUC1_OFFSET)
|
||||
#define TMS570_RTI_CAFRC1 (TMS570_RTIDWWD_BASE+TMS570_RTI_CAFRC1_OFFSET)
|
||||
#define TMS570_RTI_CAUC1 (TMS570_RTIDWWD_BASE+TMS570_RTI_CAUC1_OFFSET)
|
||||
#define TMS570_RTI_COMP0 (TMS570_RTIDWWD_BASE+TMS570_RTI_COMP0_OFFSET)
|
||||
#define TMS570_RTI_UDCP0 (TMS570_RTIDWWD_BASE+TMS570_RTI_UDCP0_OFFSET)
|
||||
#define TMS570_RTI_COMP1 (TMS570_RTIDWWD_BASE+TMS570_RTI_COMP1_OFFSET)
|
||||
#define TMS570_RTI_UDCP1 (TMS570_RTIDWWD_BASE+TMS570_RTI_UDCP1_OFFSET)
|
||||
#define TMS570_RTI_COMP2 (TMS570_RTIDWWD_BASE+TMS570_RTI_COMP2_OFFSET)
|
||||
#define TMS570_RTI_UDCP2 (TMS570_RTIDWWD_BASE+TMS570_RTI_UDCP2_OFFSET)
|
||||
#define TMS570_RTI_COMP3 (TMS570_RTIDWWD_BASE+TMS570_RTI_COMP3_OFFSET)
|
||||
#define TMS570_RTI_UDCP3 (TMS570_RTIDWWD_BASE+TMS570_RTI_UDCP3_OFFSET)
|
||||
#define TMS570_RTI_SETINTENA (TMS570_RTIDWWD_BASE+TMS570_RTI_SETINTENA_OFFSET)
|
||||
#define TMS570_RTI_CLEARINTENA (TMS570_RTIDWWD_BASE+TMS570_RTI_CLEARINTENA_OFFSET)
|
||||
#define TMS570_RTI_INTFLAG (TMS570_RTIDWWD_BASE+TMS570_RTI_INTFLAG_OFFSET)
|
||||
#define TMS570_RTI_DWDCTRL (TMS570_RTIDWWD_BASE+TMS570_RTI_DWDCTRL_OFFSET)
|
||||
#define TMS570_RTI_DWDPRLD (TMS570_RTIDWWD_BASE+TMS570_RTI_DWDPRLD_OFFSET)
|
||||
#define TMS570_RTI_WDSTATUS (TMS570_RTIDWWD_BASE+TMS570_RTI_WDSTATUS_OFFSET)
|
||||
#define TMS570_RTI_WDKEY (TMS570_RTIDWWD_BASE+TMS570_RTI_WDKEY_OFFSET)
|
||||
#define TMS570_RTI_DWDCNTR (TMS570_RTIDWWD_BASE+TMS570_RTI_DWDCNTR_OFFSET)
|
||||
#define TMS570_RTI_WWDRXNCTRL (TMS570_RTIDWWD_BASE+TMS570_RTI_WWDRXNCTRL_OFFSET)
|
||||
#define TMS570_RTI_WWDSIZECTRL (TMS570_RTIDWWD_BASE+TMS570_RTI_WWDSIZECTRL_OFFSET)
|
||||
#define TMS570_RTI_INTCLRENABLE (TMS570_RTIDWWD_BASE+TMS570_RTI_INTCLRENABLE_OFFSET)
|
||||
#define TMS570_RTI_COMP0CLR (TMS570_RTIDWWD_BASE+TMS570_RTI_COMP0CLR_OFFSET)
|
||||
#define TMS570_RTI_COMP1CLR (TMS570_RTIDWWD_BASE+TMS570_RTI_COMP1CLR_OFFSET)
|
||||
#define TMS570_RTI_COMP2CLR (TMS570_RTIDWWD_BASE+TMS570_RTI_COMP2CLR_OFFSET)
|
||||
#define TMS570_RTI_COMP3CLR (TMS570_RTIDWWD_BASE+TMS570_RTI_COMP3CLR_OFFSET)
|
||||
|
||||
/* Register Bit-Field Definitions *******************************************************************/
|
||||
|
||||
/* RTI Global Control Register */
|
||||
|
||||
#define RTI_GCTRL_CNT0EN (1 << 0) /* Bit 0: Counter 0 enable */
|
||||
#define RTI_GCTRL_CNT1EN (1 << 1) /* Bit 1: Counter 1 enable */
|
||||
#define RTI_GCTRL_COS (1 << 15) /* Bit 15: Continue on suspend */
|
||||
|
||||
/* RTI Capture Control Register */
|
||||
|
||||
#define RTI_CAPCTRL_CAPCNTR0 (1 << 0) /* Bit 0: Capture counter 0 */
|
||||
#define RTI_CAPCTRL_CAPCNTR1 (1 << 1) /* Bit 1: Capture counter 1 */
|
||||
|
||||
/* RTI Compare Control Register */
|
||||
|
||||
#define RTI_COMPCTRL_COMPSEL0 (1 << 0) /* Bit 0: Compare select 0 */
|
||||
#define RTI_COMPCTRL_COMPSEL1 (1 << 4) /* Bit 4: Compare select 1 */
|
||||
#define RTI_COMPCTRL_COMPSEL2 (1 << 8) /* Bit 8: Compare select 2 */
|
||||
#define RTI_COMPCTRL_COMPSEL3 (1 << 12) /* Bit 12: Compare select 3 */
|
||||
|
||||
/* RTI Free Running Counter 0/1 Register (32-bit counter value) */
|
||||
/* RTI Up Counter 0/1 Register (32-bit counter value) */
|
||||
/* RTI Compare Up Counter 0/1 Register (32-bit counter value) */
|
||||
/* RTI Capture Free Running Counter 0/1 Register (32-bit counter value) */
|
||||
/* RTI Capture Up Counter 0/1 Register (32-bit counter value) */
|
||||
/* RTI Compare 0/1/2/3 Register Section (32-bit counter value) */
|
||||
/* RTI Update Compare 0/1/2/3 Register (32-bit counter value) */
|
||||
|
||||
/* RTI Set Interrupt Enable Register, RTI Clear Interrupt Enable Register, and
|
||||
* RTI Interrupt Flag Register
|
||||
*/
|
||||
|
||||
#define RTI_INT0 (1 << 0) /* Bit 0: Compare interrupt 0 */
|
||||
#define RTI_INT1 (1 << 1) /* Bit 1: Compare interrupt 1 */
|
||||
#define RTI_INT2 (1 << 2) /* Bit 2: Compare interrupt 2 */
|
||||
#define RTI_INT3 (1 << 3) /* Bit 3: Compare interrupt 3 */
|
||||
#define RTI_TBINT (1 << 16) /* Bit 16: Timebase interrupt */
|
||||
#define RTI_OVL0INT (1 << 17) /* Bit 17: Free running counter 0 overflow interrupt */
|
||||
#define RTI_OVL1INT (1 << 18) /* Bit 18: Free running counter 1 overflow interrupt */
|
||||
#define RTI_ALLINTS 0x0007000f
|
||||
|
||||
/* Digital Watchdog Control Register */
|
||||
#define RTI_DWDCTRL_
|
||||
/* Digital Watchdog Preload Register */
|
||||
#define RTI_DWDPRLD_
|
||||
/* Watchdog Status Register */
|
||||
#define RTI_WDSTATUS_
|
||||
/* RTI Watchdog Key Register */
|
||||
#define RTI_WDKEY_
|
||||
/* RTI Digital Watchdog Down Counter Register */
|
||||
#define RTI_DWDCNTR_
|
||||
/* Digital Windowed Watchdog Reaction Control Register Section */
|
||||
#define RTI_WWDRXNCTRL_
|
||||
/* Digital Windowed Watchdog Window Size Control Register */
|
||||
#define RTI_WWDSIZECTRL_
|
||||
/* RTI Compare Interrupt Clear Enable Register */
|
||||
#define RTI_INTCLRENABLE_
|
||||
/* RTI Compare 0 Clear Register */
|
||||
#define RTI_COMP0CLR_
|
||||
/* RTI Compare 1 Clear Register */
|
||||
#define RTI_COMP1CLR_
|
||||
/* RTI Compare 2 Clear Register */
|
||||
#define RTI_COMP2CLR_
|
||||
/* RTI Compare 3 Clear Register */
|
||||
#define RTI_COMP3CLR_
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_TMS570_CHIP_TMS570_RTI_H */
|
||||
@ -331,12 +331,4 @@ void arm_boot(void)
|
||||
/* Perform common, low-level chip initialization (might do nothing) */
|
||||
|
||||
tms570_lowsetup();
|
||||
|
||||
#ifdef USE_EARLYSERIALINIT
|
||||
/* Perform early serial initialization if we are going to use the serial
|
||||
* driver.
|
||||
*/
|
||||
|
||||
up_earlyserialinit();
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TMS570_SAM_BOOT_H
|
||||
#define __ARCH_ARM_SRC_TMS570_SAM_BOOT_H
|
||||
#ifndef __ARCH_ARM_SRC_TMS570_TMS570_BOOT_H
|
||||
#define __ARCH_ARM_SRC_TMS570_TMS570_BOOT_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@ -97,7 +97,7 @@ EXTERN const uintptr_t g_idle_topstack;
|
||||
*
|
||||
* Description:
|
||||
* Called at the very beginning of _start. Performs low level initialization
|
||||
* including setup of the console UART. This UART done early so that the serial
|
||||
* including setup of the console SCI. This SCI done early so that the serial
|
||||
* console is available for debugging very early in the boot sequence.
|
||||
*
|
||||
************************************************************************************/
|
||||
@ -118,7 +118,7 @@ void tms570_lowsetup(void);
|
||||
*
|
||||
* - Initialization of board-specific memory resources (e.g., SDRAM)
|
||||
* - Configuration of board specific resources (GPIOs, LEDs, etc).
|
||||
* - Setup of the console UART. This UART done early so that the serial console
|
||||
* - Setup of the console SCI. This SCI done early so that the serial console
|
||||
* is available for debugging very early in the boot sequence.
|
||||
*
|
||||
* Special precautions must be taken if .data/.bss lie in SRAM. in that case,
|
||||
@ -139,4 +139,4 @@ void tms570_board_initialize(void);
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_TMS570_SAM_BOOT_H */
|
||||
#endif /* __ARCH_ARM_SRC_TMS570_TMS570_BOOT_H */
|
||||
|
||||
@ -61,6 +61,50 @@
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef BOARD_VCLK_DIVIDER
|
||||
# error BOARD_VCLK_DIVIDER is not defined
|
||||
#endif
|
||||
|
||||
#if BOARD_VCLK_DIVIDER == 1
|
||||
# define SYS_CLKCNTL_VCLKR SYS_CLKCNTL_VCLKR_DIV1
|
||||
#elif BOARD_VCLK_DIVIDER == 2
|
||||
# define SYS_CLKCNTL_VCLKR SYS_CLKCNTL_VCLKR_DIV2
|
||||
#else
|
||||
# error Invalid value for BOARD_VCLK_DIVIDER
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_VCLK2_DIVIDER
|
||||
# error BOARD_VCLK2_DIVIDER is not defined
|
||||
#endif
|
||||
|
||||
#if BOARD_VCLK2_DIVIDER == 1
|
||||
# define SYS_CLKCNTL_VCLKR2 SYS_CLKCNTL_VCLKR2_DIV1
|
||||
#elif BOARD_VCLK2_DIVIDER == 2
|
||||
# define SYS_CLKCNTL_VCLKR2 SYS_CLKCNTL_VCLKR_DIV2
|
||||
#else
|
||||
# error Invalid value for SYS_CLKCNTL_VCLKR2_DIV2
|
||||
#endif
|
||||
|
||||
#ifndef BOARD_RTICLK_DIVIDER
|
||||
# error BOARD_RTICLK_DIVIDER is not defined
|
||||
#endif
|
||||
|
||||
#if BOARD_RTICLK_DIVIDER == 1
|
||||
# define SYS_RCLKSRC_RTI1DIV SYS_RCLKSRC_RTI1DIV_DIV1
|
||||
#elif BOARD_RTICLK_DIVIDER == 2
|
||||
# define SYS_RCLKSRC_RTI1DIV SYS_RCLKSRC_RTI1DIV_DIV2
|
||||
#elif BOARD_RTICLK_DIVIDER == 4
|
||||
# define SYS_RCLKSRC_RTI1DIV SYS_RCLKSRC_RTI1DIV_DIV4
|
||||
#elif BOARD_RTICLK_DIVIDER == 78
|
||||
# define SYS_RCLKSRC_RTI1DIV SYS_RCLKSRC_RTI1DIV_DIV8
|
||||
#else
|
||||
# error Invalid value for SYS_CLKCNTL_VCLKR2_DIV2
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
@ -434,12 +478,12 @@ static void tms570_clocksrc_configure(void)
|
||||
|
||||
regval = getreg32(TMS570_SYS_CLKCNTL);
|
||||
regval &= ~(SYS_CLKCNTL_VCLKR2_MASK | SYS_CLKCNTL_VCLKR_MASK);
|
||||
regval |= SYS_CLKCNTL_VCLKR2_DIV1 | SYS_CLKCNTL_VCLKR_DIV1;
|
||||
regval |= SYS_CLKCNTL_VCLKR2 | SYS_CLKCNTL_VCLKR;
|
||||
putreg32(regval, TMS570_SYS_CLKCNTL);
|
||||
|
||||
/* Setup RTICLK1 and RTICLK2 clocks */
|
||||
|
||||
regval = SYS_RCLKSRC_RTI1SRC_VCLK | SYS_RCLKSRC_RTI1DIV_DIV2;
|
||||
regval = SYS_RCLKSRC_RTI1SRC_VCLK | SYS_RCLKSRC_RTI1DIV;
|
||||
putreg32(regval, TMS570_SYS_RCLKSRC);
|
||||
|
||||
/* Setup asynchronous peripheral clock sources for AVCLK1 */
|
||||
|
||||
@ -137,6 +137,10 @@ void up_irqinitialize(void)
|
||||
|
||||
putreg32((uint32_t)tms570_error_handler, TMS570_VIM_FBPARERR);
|
||||
|
||||
/* Assign all interrupt requests to the VIM channel of the same value.
|
||||
* NOTE: Nothing need be done. That is the power-on default mapping.
|
||||
*/
|
||||
|
||||
/* Assign all channels to IRQs */
|
||||
|
||||
putreg32(0, TMS570_VIM_FIRQPR0);
|
||||
@ -184,27 +188,6 @@ void up_irqinitialize(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tms570_vim_channel
|
||||
*
|
||||
* Description:
|
||||
* Allocate a VIM channel and assign it to the 'request'.
|
||||
*
|
||||
* Input Parameters:
|
||||
* request - The interrupt request to be mapped to a channel
|
||||
*
|
||||
* Returned Value:
|
||||
* One sucess, the allocated channel number is returned. A negated errno
|
||||
* value is returned on any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int tms570_vim_channel(int request)
|
||||
{
|
||||
#warning Missing logic
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_decodeirq
|
||||
*
|
||||
|
||||
@ -33,8 +33,8 @@
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TMS570_SAM_IRQ_H
|
||||
#define __ARCH_ARM_SRC_TMS570_SAM_IRQ_H
|
||||
#ifndef __ARCH_ARM_SRC_TMS570_TMS570_IRQ_H
|
||||
#define __ARCH_ARM_SRC_TMS570_TMS570_IRQ_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
@ -61,23 +61,6 @@ extern "C"
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tms570_vim_channel
|
||||
*
|
||||
* Description:
|
||||
* Allocate a VIM channel and assign it to the 'request'.
|
||||
*
|
||||
* Input Parameters:
|
||||
* request - The interrupt request to be mapped to a channel
|
||||
*
|
||||
* Returned Value:
|
||||
* One sucess, the allocated channel number is returned. A negated errno
|
||||
* value is returned on any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int tms570_vim_channel(int request);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_enable_fiq
|
||||
*
|
||||
@ -96,4 +79,4 @@ void up_enable_fiq(int channel);
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_TMS570_SAM_IRQ_H */
|
||||
#endif /* __ARCH_ARM_SRC_TMS570_TMS570_IRQ_H */
|
||||
|
||||
291
arch/arm/src/tms570/tms570_lowputc.c
Normal file
291
arch/arm/src/tms570/tms570_lowputc.c
Normal file
@ -0,0 +1,291 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/tms570/tms570_lowputc.c
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Includes some logic from TI sample which has a compatibile three-clause
|
||||
* BSD license and:
|
||||
*
|
||||
* Copyright (c) 2012, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <arch/irq.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "up_internal.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "tms570_config.h"
|
||||
#include "tms570_lowputc.h"
|
||||
|
||||
#include "chip/tms570_sci.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration **********************************************************/
|
||||
|
||||
#ifdef HAVE_SERIAL_CONSOLE
|
||||
|
||||
/* BAUD definitions
|
||||
*
|
||||
* The source clock is selectable and could be one of:
|
||||
*
|
||||
* - The peripheral clock
|
||||
* - A division of the peripheral clock, where the divider is product-
|
||||
* dependent, but generally set to 8
|
||||
* - A processor/peripheral independent clock source fully programmable
|
||||
* provided by PMC (PCK)
|
||||
* - The external clock, available on the SCK pin
|
||||
*
|
||||
* Only the first two options are supported by this driver. The divided
|
||||
* peripheral clock is only used for very low BAUD selections.
|
||||
*/
|
||||
|
||||
#define FAST_SCI_CLOCK BOARD_MCK_FREQUENCY
|
||||
#define SLOW_SCI_CLOCK (BOARD_MCK_FREQUENCY >> 3)
|
||||
|
||||
/* Select SCI parameters for the selected console */
|
||||
|
||||
# if defined(CONFIG_SCI1_SERIAL_CONSOLE)
|
||||
# define TMS570_CONSOLE_BASE TMS570_SCI1_BASE
|
||||
# define TMS570_CONSOLE_BAUD CONFIG_SCI1_BAUD
|
||||
# define TMS570_CONSOLE_BITS CONFIG_SCI1_BITS
|
||||
# define TMS570_CONSOLE_PARITY CONFIG_SCI1_PARITY
|
||||
# define TMS570_CONSOLE_2STOP CONFIG_SCI1_2STOP
|
||||
# elif defined(CONFIG_SCI2_SERIAL_CONSOLE)
|
||||
# define TMS570_CONSOLE_BASE TMS570_SCI2_BASE
|
||||
# define TMS570_CONSOLE_BAUD CONFIG_SCI2_BAUD
|
||||
# define TMS570_CONSOLE_BITS CONFIG_SCI2_BITS
|
||||
# define TMS570_CONSOLE_PARITY CONFIG_SCI2_PARITY
|
||||
# define TMS570_CONSOLE_2STOP CONFIG_SCI2_2STOP
|
||||
# else
|
||||
# error "No CONFIG_SCIn_SERIAL_CONSOLE Setting"
|
||||
# endif
|
||||
|
||||
/* Select the settings for the mode register */
|
||||
|
||||
# if TMS570_CONSOLE_BITS == 5
|
||||
# define MR_CHRL_VALUE SCI_MR_CHRL_5BITS /* 5 bits */
|
||||
# elif TMS570_CONSOLE_BITS == 6
|
||||
# define MR_CHRL_VALUE SCI_MR_CHRL_6BITS /* 6 bits */
|
||||
# elif TMS570_CONSOLE_BITS == 7
|
||||
# define MR_CHRL_VALUE SCI_MR_CHRL_7BITS /* 7 bits */
|
||||
# elif TMS570_CONSOLE_BITS == 8
|
||||
# define MR_CHRL_VALUE SCI_MR_CHRL_8BITS /* 8 bits */
|
||||
# elif TMS570_CONSOLE_BITS == 9 && !defined(CONFIG_SCI1_SERIAL_CONSOLE) && \
|
||||
!defined(CONFIG_SCI2_SERIAL_CONSOLE)
|
||||
# define MR_CHRL_VALUE SCI_MR_MODE9
|
||||
# else
|
||||
# error "Invalid number of bits"
|
||||
# endif
|
||||
|
||||
# if TMS570_CONSOLE_PARITY == 1
|
||||
# define MR_PAR_VALUE SCI_MR_PAR_ODD
|
||||
# elif TMS570_CONSOLE_PARITY == 2
|
||||
# define MR_PAR_VALUE SCI_MR_PAR_EVEN
|
||||
# else
|
||||
# define MR_PAR_VALUE SCI_MR_PAR_NONE
|
||||
# endif
|
||||
|
||||
# if TMS570_CONSOLE_2STOP != 0
|
||||
# define MR_NBSTOP_VALUE SCI_MR_NBSTOP_2
|
||||
# else
|
||||
# define MR_NBSTOP_VALUE SCI_MR_NBSTOP_1
|
||||
# endif
|
||||
|
||||
# define MR_VALUE (SCI_MR_MODE_NORMAL | SCI_MR_USCLKS_MCK | \
|
||||
MR_CHRL_VALUE | MR_PAR_VALUE | MR_NBSTOP_VALUE)
|
||||
|
||||
#endif /* HAVE_SERIAL_CONSOLE */
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_lowputc
|
||||
*
|
||||
* Description:
|
||||
* Output one byte on the serial console
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_lowputc(char ch)
|
||||
{
|
||||
#ifdef HAVE_SERIAL_CONSOLE
|
||||
irqstate_t flags;
|
||||
|
||||
for (; ; )
|
||||
{
|
||||
/* Wait for the transmitter to be available */
|
||||
|
||||
while ((getreg32(TMS570_CONSOLE_BASE + TMS570_SCI_SR_OFFSET) &
|
||||
SCI_INT_TXEMPTY) == 0);
|
||||
|
||||
/* Disable interrupts so that the test and the transmission are
|
||||
* atomic.
|
||||
*/
|
||||
|
||||
flags = irqsave();
|
||||
if ((getreg32(TMS570_CONSOLE_BASE + TMS570_SCI_SR_OFFSET) &
|
||||
SCI_INT_TXEMPTY) != 0)
|
||||
{
|
||||
/* Send the character */
|
||||
|
||||
putreg32((uint32_t)ch, TMS570_CONSOLE_BASE + TMS570_SCI_THR_OFFSET);
|
||||
irqrestore(flags);
|
||||
return;
|
||||
}
|
||||
|
||||
irqrestore(flags);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_putc
|
||||
*
|
||||
* Description:
|
||||
* Provide priority, low-level access to support OS debug writes
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_putc(int ch)
|
||||
{
|
||||
#ifdef HAVE_SERIAL_CONSOLE
|
||||
/* Check for LF */
|
||||
|
||||
if (ch == '\n')
|
||||
{
|
||||
/* Add CR */
|
||||
|
||||
up_lowputc('\r');
|
||||
}
|
||||
|
||||
up_lowputc(ch);
|
||||
#endif
|
||||
return ch;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: tms570_lowsetup
|
||||
*
|
||||
* Description:
|
||||
* This performs basic initialization of the SCI used for the serial
|
||||
* console. Its purpose is to get the console output availabe as soon
|
||||
* as possible.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void tms570_lowsetup(void)
|
||||
{
|
||||
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_SCI_CONFIG)
|
||||
uint64_t divb3;
|
||||
uint32_t intpart;
|
||||
uint32_t fracpart;
|
||||
uint32_t regval;
|
||||
#endif
|
||||
|
||||
/* Configure the console (only) */
|
||||
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_SCI_CONFIG)
|
||||
/* Reset and disable receiver and transmitter */
|
||||
|
||||
putreg32((SCI_CR_RSTRX | SCI_CR_RSTTX | SCI_CR_RXDIS | SCI_CR_TXDIS),
|
||||
TMS570_CONSOLE_BASE + TMS570_SCI_CR_OFFSET);
|
||||
|
||||
/* Disable all interrupts */
|
||||
|
||||
putreg32(0xffffffff, TMS570_CONSOLE_BASE + TMS570_SCI_IDR_OFFSET);
|
||||
|
||||
/* Set up the mode register */
|
||||
|
||||
putreg32(MR_VALUE, TMS570_CONSOLE_BASE + TMS570_SCI_MR_OFFSET);
|
||||
|
||||
/* Configure the console baud:
|
||||
*
|
||||
* Fbaud = SCI_CLOCK / (16 * divisor)
|
||||
* divisor = SCI_CLOCK / (16 * Fbaud)
|
||||
*
|
||||
* NOTE: Oversampling by 8 is not supported. This may limit BAUD rates
|
||||
* for lower SCI clocks.
|
||||
*/
|
||||
|
||||
divb3 = ((FAST_SCI_CLOCK + (TMS570_CONSOLE_BAUD << 3)) << 3) /
|
||||
(TMS570_CONSOLE_BAUD << 4);
|
||||
intpart = (divb3 >> 3);
|
||||
fracpart = (divb3 & 7);
|
||||
|
||||
/* Retain the fast MR peripheral clock UNLESS unless using that clock
|
||||
* would result in an excessively large divider.
|
||||
*
|
||||
* REVISIT: The fractional divider is not used.
|
||||
*/
|
||||
|
||||
if ((intpart & ~SCI_BRGR_CD_MASK) != 0)
|
||||
{
|
||||
/* Use the divided SCI clock */
|
||||
|
||||
divb3 = ((SLOW_SCI_CLOCK + (TMS570_CONSOLE_BAUD << 3)) << 3) /
|
||||
(TMS570_CONSOLE_BAUD << 4);
|
||||
intpart = (divb3 >> 3);
|
||||
fracpart = (divb3 & 7);
|
||||
|
||||
/* Re-select the clock source */
|
||||
|
||||
regval = getreg32(TMS570_CONSOLE_BASE + TMS570_SCI_MR_OFFSET);
|
||||
regval &= ~SCI_MR_USCLKS_MASK;
|
||||
regval |= SCI_MR_USCLKS_MCKDIV;
|
||||
putreg32(regval, TMS570_CONSOLE_BASE + TMS570_SCI_MR_OFFSET);
|
||||
}
|
||||
|
||||
/* Save the BAUD divider (the fractional part is not used for SCIs) */
|
||||
|
||||
regval = SCI_BRGR_CD(intpart) | SCI_BRGR_FP(fracpart);
|
||||
putreg32(regval, TMS570_CONSOLE_BASE + TMS570_SCI_BRGR_OFFSET);
|
||||
|
||||
/* Enable receiver & transmitter */
|
||||
|
||||
putreg32((SCI_CR_RXEN | SCI_CR_TXEN),
|
||||
TMS570_CONSOLE_BASE + TMS570_SCI_CR_OFFSET);
|
||||
#endif
|
||||
}
|
||||
114
arch/arm/src/tms570/tms570_lowputc.h
Normal file
114
arch/arm/src/tms570/tms570_lowputc.h
Normal file
@ -0,0 +1,114 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/tms570/tms570_lowputc.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TMS570_TMS570_LOWPUTC_H
|
||||
#define __ARCH_ARM_SRC_TMS570_TMS570_LOWPUTC_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/compiler.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "up_internal.h"
|
||||
#include "chip.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: tms570_lowsetup
|
||||
*
|
||||
* Description:
|
||||
* Called at the very beginning of _start. Performs low level initialization
|
||||
* including setup of the console SCI. This SCI done early so that the serial
|
||||
* console is available for debugging very early in the boot sequence.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void tms570_lowsetup(void);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: tms570_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* All TMS570 architectures must provide the following entry point. This entry
|
||||
* point is called early in the initialization -- after all memory has been
|
||||
* configured and mapped but before any devices have been initialized.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void tms570_boardinitialize(void);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_TMS570_TMS570_LOWPUTC_H */
|
||||
1043
arch/arm/src/tms570/tms570_serial.c
Normal file
1043
arch/arm/src/tms570/tms570_serial.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -39,10 +39,160 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
|
||||
#include "up_internal.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "chip/tms570_rti.h"
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
/* The input clock to the RTI is the RTICLK. The RTI source is always VCLK
|
||||
* which may be divided down by 2. The correct RTICLK frequency must be
|
||||
* provided by board.h file as BOARD_RTICLK_FREQUENCY.
|
||||
*/
|
||||
|
||||
#ifndef BOARD_RTICLK_FREQUENCY
|
||||
# error BOARD_RTICLK_FREQUENCY not defined
|
||||
#endif
|
||||
|
||||
/* Timing Calculations:
|
||||
*
|
||||
* FRC0CLK = RTICLK / (CPUC0 + 1) Hz
|
||||
* Tcount = 1 / FRC0CLK Seconds
|
||||
* = 1,000,000 / FRC0CLK Microseconds
|
||||
* CMP0 = Period / Tcount
|
||||
* = CONFIG_USEC_PER_TICK * FRC0CLK / 1,000,000
|
||||
* = CONFIG_USEC_PER_TICK * RTICLK / (CPUC0 + 1) / 1,000,000
|
||||
*
|
||||
* For Example:
|
||||
* VCLK = 80,000,000 Hz
|
||||
* RTICLK = VCLK / 2 Hz
|
||||
* = 40,000,000 Hz
|
||||
* CPUC0 = 39
|
||||
* FR0CLK = 1,000,000 Hz
|
||||
* Tcount = 1 Microsecond
|
||||
* CONFIG_USEC_PER_TICK = 10,000 Microseconds
|
||||
* CMP0 = 10,000 * 40,000,000 / 40 / 1,000,000
|
||||
* = 10, 000 = CONFIG_USEC_PER_TICK
|
||||
*/
|
||||
|
||||
#if BOARD_RTICLK_FREQUENCY > 10000000
|
||||
/* Use FR0CLK = 1MHz with CPUC0 at least 9 */
|
||||
|
||||
# define RTI_FRC0CLK (1000000)
|
||||
#elif BOARD_RTICLK_FREQUENCY > 5000000
|
||||
/* Use FR0CLK = 500KHz with CPUC0 at least 9 */
|
||||
|
||||
# define RTI_FRC0CLK (500000)
|
||||
#elif BOARD_RTICLK_FREQUENCY > 1000000
|
||||
/* Use FR0CLK = 100KHz with CPUC0 at least 9 */
|
||||
|
||||
# define RTI_FRC0CLK (100000)
|
||||
#else
|
||||
# error No logic for this value of RTICLK
|
||||
#endif
|
||||
|
||||
/* CPUC0 = RTICLK / FRC0CLK - 1
|
||||
*
|
||||
* NOTES:
|
||||
* - The following calculation performs rounding.
|
||||
*/
|
||||
|
||||
#define RTI_CPUC0 (((BOARD_RTICLK_FREQUENCY + RTI_FRC0CLK / 2) / RTI_FRC0CLK) - 1)
|
||||
|
||||
/* CMP0 = CONFIG_USEC_PER_TICK * FRC0CLK / 1,000,000
|
||||
*
|
||||
* NOTES:
|
||||
* - The following calculation performs rounding.
|
||||
* - The following calculation avoids integer overflow by depending on
|
||||
* FRCLK being a multiple of 100,000
|
||||
*/
|
||||
|
||||
#define RTI_CMP0 ((CONFIG_USEC_PER_TICK * (RTI_FRC0CLK / 100000) + 50) / 100)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_timerisr
|
||||
*
|
||||
* Description:
|
||||
* The timer ISR will perform a variety of services for various portions
|
||||
* of the systems.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_timerisr(int irq, uint32_t *regs)
|
||||
{
|
||||
/* Cleear the RTI Compare 0 interrupts */
|
||||
|
||||
putreg32(RTI_INT0, TMS570_RTI_INTFLAG);
|
||||
|
||||
/* Process timer interrupt */
|
||||
|
||||
sched_process_timer();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_timer_initialize
|
||||
*
|
||||
* Description:
|
||||
* This function is called during start-up to initialize the timer
|
||||
* interrupt.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_timer_initialize(void)
|
||||
{
|
||||
/* Disable all RTI interrupts */
|
||||
|
||||
up_disable_irq(TMS570_REQ_RTICMP0);
|
||||
putreg32(RTI_ALLINTS, TMS570_RTI_CLEARINTENA);
|
||||
|
||||
/* Configure RTICOMP0 register and the RTIUDCP0 Register to initialize with
|
||||
* the calculated compare value.
|
||||
*/
|
||||
|
||||
putreg32(RTI_CMP0, TMS570_RTI_COMP0);
|
||||
putreg32(RTI_CMP0, TMS570_RTI_UDCP0);
|
||||
|
||||
/* Configure the FRC0CLK clock by setting the RTICPUC0 register to the
|
||||
* calculated value.
|
||||
*/
|
||||
|
||||
putreg32(RTI_CMP0, TMS570_RTI_CPUC0);
|
||||
|
||||
/* Initialize the free-running counter and the RTI up-counter */
|
||||
|
||||
putreg32(0, TMS570_RTI_FRC0);
|
||||
putreg32(0, TMS570_RTI_UC0);
|
||||
|
||||
/* Clear any pending interrupts */
|
||||
|
||||
putreg32(RTI_ALLINTS, TMS570_RTI_COMP0);
|
||||
|
||||
/* Enable the RTI Compare 0 interrupts (still disabled at the VIM) */
|
||||
|
||||
putreg32(RTI_INT0, TMS570_RTI_SETINTENA);
|
||||
|
||||
/* Enable counter 0 */
|
||||
|
||||
putreg32(RTI_GCTRL_CNT0EN, TMS570_RTI_GCTRL);
|
||||
|
||||
/* Attach the interrupt handler to the RTI Compare 0 interrupt */
|
||||
|
||||
DEBUGVERIFY(irq_attach(TMS570_REQ_RTICMP0, (xcpt_t)up_timerisr));
|
||||
|
||||
/* Enable RTI compare 0 interrupts at the VIM */
|
||||
|
||||
up_enable_irq(TMS570_REQ_RTICMP0);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user