From 5fa2dc3c5b581c4c0780a215e70f59c74abd3a91 Mon Sep 17 00:00:00 2001 From: raiden00pl Date: Fri, 3 Mar 2023 17:50:28 +0100 Subject: [PATCH] nrf5340-dk/nsh_cpunet: add net core configuration --- boards/arm/nrf53/nrf5340-dk/README.txt | 19 ++++++++ .../nrf5340-dk/configs/nsh_cpunet/defconfig | 44 +++++++++++++++++++ boards/arm/nrf53/nrf5340-dk/include/board.h | 23 ++++++++-- boards/arm/nrf53/nrf5340-dk/src/Makefile | 4 ++ .../nrf53/nrf5340-dk/src/nrf53_cpunet_boot.c | 44 +++++++++++++++++++ 5 files changed, 130 insertions(+), 4 deletions(-) create mode 100644 boards/arm/nrf53/nrf5340-dk/configs/nsh_cpunet/defconfig create mode 100644 boards/arm/nrf53/nrf5340-dk/src/nrf53_cpunet_boot.c diff --git a/boards/arm/nrf53/nrf5340-dk/README.txt b/boards/arm/nrf53/nrf5340-dk/README.txt index 16a73c58e3..6c2fbfcd84 100644 --- a/boards/arm/nrf53/nrf5340-dk/README.txt +++ b/boards/arm/nrf53/nrf5340-dk/README.txt @@ -21,3 +21,22 @@ Tool Issues (gdb_app) target remote localhost:2331 (gdb_net) target remote localhost:2334 + + Flashing locked device + ---------------------- + + 1. Unlock the Net core: + + nrfjprog --recover --coprocessor CP_NETWORK + + 2. Unlock the App core: + + nrfjprog --recover + + 3. Flash the Net core: + + nrfjprog --coprocessor CP_NETWORK --program nuttx_net.hex --verify --chiperase + + 4. Flash the App core: + + nrfjprog --program nuttx_app.hex --verify --chiperase diff --git a/boards/arm/nrf53/nrf5340-dk/configs/nsh_cpunet/defconfig b/boards/arm/nrf53/nrf5340-dk/configs/nsh_cpunet/defconfig new file mode 100644 index 0000000000..1900d0666c --- /dev/null +++ b/boards/arm/nrf53/nrf5340-dk/configs/nsh_cpunet/defconfig @@ -0,0 +1,44 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_STANDARD_SERIAL is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nrf5340-dk" +CONFIG_ARCH_BOARD_NRF5340_DK=y +CONFIG_ARCH_CHIP="nrf53" +CONFIG_ARCH_CHIP_NRF5340=y +CONFIG_ARCH_CHIP_NRF5340_CPUNET=y +CONFIG_ARCH_CHIP_NRF53=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_STDARG_H=y +CONFIG_BOARD_LOOPSPERMSEC=5500 +CONFIG_EXPERIMENTAL=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_MM_REGIONS=2 +CONFIG_NRF53_UART0=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=65535 +CONFIG_RAM_START=0x21000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=26 +CONFIG_START_MONTH=3 +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/arm/nrf53/nrf5340-dk/include/board.h b/boards/arm/nrf53/nrf5340-dk/include/board.h index d09e837fb3..9fab435bd9 100644 --- a/boards/arm/nrf53/nrf5340-dk/include/board.h +++ b/boards/arm/nrf53/nrf5340-dk/include/board.h @@ -103,10 +103,25 @@ * driver can set up the UART for the serial console properly. */ -#define BOARD_UART0_RX_PIN (GPIO_INPUT | GPIO_PORT1 | GPIO_PIN(0)) -#define BOARD_UART0_TX_PIN (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN(1)) +#ifdef CONFIG_ARCH_CHIP_NRF5340_CPUAPP +# define BOARD_UART0_RX_PIN (GPIO_MCUSEL_APP | GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN(0)) +# define BOARD_UART0_TX_PIN (GPIO_MCUSEL_APP | GPIO_OUTPUT | \ + GPIO_VALUE_ONE | GPIO_PORT1 | GPIO_PIN(1)) -#define BOARD_UART1_RX_PIN (GPIO_INPUT | GPIO_PORT0 | GPIO_PIN(22)) -#define BOARD_UART1_TX_PIN (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN(20)) +/* Declarations for the Net core */ + +# define BOARD_NET_UART0_RX_PIN (GPIO_MCUSEL_NET | GPIO_INPUT | \ + GPIO_PORT0 | GPIO_PIN(22)) +# define BOARD_NET_UART0_TX_PIN (GPIO_MCUSEL_NET | GPIO_OUTPUT | \ + GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN(20)) +#endif + +#ifdef CONFIG_ARCH_CHIP_NRF5340_CPUNET +# define BOARD_UART0_RX_PIN (GPIO_MCUSEL_NET | GPIO_INPUT | \ + GPIO_PORT0 | GPIO_PIN(22)) +# define BOARD_UART0_TX_PIN (GPIO_MCUSEL_NET | GPIO_OUTPUT | \ + GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN(20)) +#endif #endif /* __BOARDS_ARM_NRF53_NRF5340_DK_INCLUDE_BOARD_H */ diff --git a/boards/arm/nrf53/nrf5340-dk/src/Makefile b/boards/arm/nrf53/nrf5340-dk/src/Makefile index 32c05ffd81..3351a9d831 100644 --- a/boards/arm/nrf53/nrf5340-dk/src/Makefile +++ b/boards/arm/nrf53/nrf5340-dk/src/Makefile @@ -26,6 +26,10 @@ ifeq ($(CONFIG_BOARDCTL),y) CSRCS += nrf53_appinit.c endif +ifeq ($(CONFIG_NRF53_APPCORE),y) +CSRCS += nrf53_cpunet_boot.c +endif + ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += nrf53_autoleds.c else diff --git a/boards/arm/nrf53/nrf5340-dk/src/nrf53_cpunet_boot.c b/boards/arm/nrf53/nrf5340-dk/src/nrf53_cpunet_boot.c new file mode 100644 index 0000000000..8da0404abc --- /dev/null +++ b/boards/arm/nrf53/nrf5340-dk/src/nrf53_cpunet_boot.c @@ -0,0 +1,44 @@ +/**************************************************************************** + * boards/arm/nrf53/nrf5340-dk/src/nrf53_cpunet_boot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "nrf53_gpio.h" +#include "nrf53_cpunet.h" + +#include + +#ifndef CONFIG_NRF53_NET_GPIO_ALLOW_ALL +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void nrf53_board_gpio_cpunet_allow(void) +{ + /* UART0 pins */ + + nrf53_gpio_cpunet_allow(BOARD_NET_UART0_RX_PIN); + nrf53_gpio_cpunet_allow(BOARD_NET_UART0_TX_PIN); +} +#endif