arch/nrf53: add HFCLK192M clock support

The HFCLK192M clock is required for QSPI to work
This commit is contained in:
raiden00pl 2023-05-23 11:45:40 +02:00 committed by Xiang Xiao
parent 8943d528fd
commit 5ff6c8b403
4 changed files with 148 additions and 39 deletions

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@ -28,6 +28,7 @@ config NRF53_APPCORE
select NRF53_HAVE_UART1
select NRF53_HAVE_I2C123
select NRF53_HAVE_SPI1234
select NRF53_HAVE_HFCLK192M
config NRF53_NETCORE
bool
@ -98,6 +99,10 @@ config NRF53_HAVE_SPI1234
bool
default n
config NRF53_HAVE_HFCLK192M
bool
default n
# Peripheral Selection
config NRF53_I2C_MASTER
@ -296,6 +301,30 @@ endchoice
endif # NRF53_USE_LFCLK
config NRF53_USE_HFCLK192M
bool "Enable HFCLK192M"
default n
depends on NRF53_HAVE_HFCLK192M
---help---
Enable HFCLK192M clock.
if NRF53_USE_HFCLK192M
choice
prompt "HFCLK192M source"
default NRF53_HFCLK192M_192
config NRF53_HFCLK192M_192
bool "HFCLK192M is 192MHz"
config NRF53_HFCLK192M_96
bool "HFCLK192M is 96MHz"
config NRF53_HFCLK192M_48
bool "HFCLK192M is 48MHz"
endchoice
config NRF53_OSCILLATOR_LFXO
bool "Configure LFXO oscillator"
default y if NRF53_LFCLK_XTAL

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@ -34,51 +34,85 @@
/* Register offsets *********************************************************/
#define NRF53_CLOCK_TASKS_HFCLKSTART_OFFSET 0x0000 /* Start HFCLK crystal oscillator */
#define NRF53_CLOCK_TASKS_HFCLKSTOP_OFFSET 0x0004 /* Stop HFCLK crystal oscillator */
#define NRF53_CLOCK_TASKS_LFCLKSTART_OFFSET 0x0008 /* Start LFCLK source */
#define NRF53_CLOCK_TASKS_LFCLKSTOP_OFFSET 0x000c /* Stop LFCLK source */
#define NRF53_CLOCK_TASKS_CAL_OFFSET 0x0010 /* Start calibration of LFRC oscillator */
/* TODO: */
#define NRF53_CLOCK_EVENTS_HFCLKSTARTED_OFFSET 0x0100 /* HFCLK oscillator started */
#define NRF53_CLOCK_EVENTS_LFCLKSTARTED_OFFSET 0x0104 /* LFCLK started */
#define NRF53_CLOCK_EVENTS_DONE_OFFSET 0x011c /* Calibration of LFCLK RC oscillator complete event */
/* TODO: */
#define NRF53_CLOCK_INTENSET_OFFSET 0x0304 /* Enable interrupt */
#define NRF53_CLOCK_INTENCLR_OFFSET 0x0308 /* Disable interrupt */
/* TODO: */
#define NRF53_CLOCK_HFCLKRUN_OFFSET 0x0408 /* Status indicating that HFCLKSTART task has been triggered */
#define NRF53_CLOCK_HFCLKSTAT_OFFSET 0x040c /* HFCLK status */
#define NRF53_CLOCK_LFCLKRUN_OFFSET 0x0414 /* Status indicating that LFCLKSTART task has been triggered */
#define NRF53_CLOCK_LFCLKSTAT_OFFSET 0x0418 /* LFCLK status */
#define NRF53_CLOCK_LFCLKSRCCOPY_OFFSET 0x041c /* Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */
/* TODO: */
#define NRF53_CLOCK_LFCLKSRC_OFFSET 0x0518 /* Clock source for the LFCLK */
/* TODO */
#define NRF53_CLOCK_TASKS_HFCLKSTART_OFFSET 0x0000 /* Start HFCLK crystal oscillator */
#define NRF53_CLOCK_TASKS_HFCLKSTOP_OFFSET 0x0004 /* Stop HFCLK crystal oscillator */
#define NRF53_CLOCK_TASKS_LFCLKSTART_OFFSET 0x0008 /* Start LFCLK source */
#define NRF53_CLOCK_TASKS_LFCLKSTOP_OFFSET 0x000c /* Stop LFCLK source */
#define NRF53_CLOCK_TASKS_CAL_OFFSET 0x0010 /* Start calibration of LFRC oscillator */
#define NRF53_CLOCK_TASKS_HFCLKAUDIOSTART_OFFSET 0x0018 /* Start HFCLKAUDIO source */
#define NRF53_CLOCK_TASKS_HFCLKAUDIOSTOP_OFFSET 0x001c /* Stop HFCLKAUDIO source */
#define NRF53_CLOCK_TASKS_HFCLK192MSTART_OFFSET 0x0020 /* Start HFCLK192M source as selected in HFCLK192MSRC */
#define NRF53_CLOCK_TASKS_HFCLK192MSTOP_OFFSET 0x0024 /* Stop HFCLK192M source */
/* TODO: */
#define NRF53_CLOCK_EVENTS_HFCLKSTARTED_OFFSET 0x0100 /* HFCLK oscillator started */
#define NRF53_CLOCK_EVENTS_LFCLKSTARTED_OFFSET 0x0104 /* LFCLK started */
#define NRF53_CLOCK_EVENTS_DONE_OFFSET 0x011c /* Calibration of LFCLK RC oscillator complete event */
#define NRF53_CLOCK_EVENTS_HFCLKAUDIOSTARTED_OFFSET 0x0120 /* HFCLKAUDIO source started */
#define NRF53_CLOCK_EVENTS_HFCLK192MSTARTED_OFFSET 0x0124 /* HFCLK192M source started */
/* TODO: */
#define NRF53_CLOCK_INTENSET_OFFSET 0x0304 /* Enable interrupt */
#define NRF53_CLOCK_INTENCLR_OFFSET 0x0308 /* Disable interrupt */
/* TODO: */
#define NRF53_CLOCK_HFCLKRUN_OFFSET 0x0408 /* Status indicating that HFCLKSTART task has been triggered */
#define NRF53_CLOCK_HFCLKSTAT_OFFSET 0x040c /* HFCLK status */
#define NRF53_CLOCK_LFCLKRUN_OFFSET 0x0414 /* Status indicating that LFCLKSTART task has been triggered */
#define NRF53_CLOCK_LFCLKSTAT_OFFSET 0x0418 /* LFCLK status */
#define NRF53_CLOCK_LFCLKSRCCOPY_OFFSET 0x041c /* Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */
#define NRF53_CLOCK_HFCLKAUDIORUN_OFFSET 0x0450 /* Status indicating that HFCLKAUDIOSTART task has been triggered */
#define NRF53_CLOCK_HFCLKAUDIOSTAT_OFFSET 0x0454 /* Status indicating which HFCLKAUDIO source is running */
#define NRF53_CLOCK_HFCLK192MRUN_OFFSET 0x0458 /* Status indicating that HFCLK192MSTART task has been triggered */
#define NRF53_CLOCK_HFCLK192MSTAT_OFFSET 0x045c /* Status indicating which HFCLK192M source is running */
#define NRF53_CLOCK_HFCLKSRC_OFFSET 0x0514 /* Clock source for HFCLK128M/HFCLK64M */
#define NRF53_CLOCK_LFCLKSRC_OFFSET 0x0518 /* Clock source for the LFCLK */
#define NRF53_CLOCK_HFCLKCTRL_OFFSET 0x0558 /* HFCLK128M frequency configuration */
#define NRF53_CLOCK_HFCLKAUDIOFREQUENCY_OFFSET 0x055c /* Audio PLL frequency */
#define NRF53_CLOCK_HFCLKALWAYSRUN_OFFSET 0x0570 /* Automatic or manual control of HFCLK128M/HFCLK64M */
#define NRF53_CLOCK_LFCLKALWAYSRUN_OFFSET 0x0574 /* Automatic or manual control of LFCLK */
#define NRF53_CLOCK_HFCLKAUDIOALWAYSRUN_OFFSET 0x057c /* Automatic or manual control of HFCLKAUDIO */
#define NRF53_CLOCK_HFCLK192MSRC_OFFSET 0x0580 /* Clock source for HFCLK192M */
#define NRF53_CLOCK_HFCLK192MALWAYSRUN_OFFSET 0x0584 /* Automatic or manual control of HFCLK192M */
#define NRF53_CLOCK_HFCLK192MCTRL_OFFSET 0x05b8 /* HFCLK192M frequency configuration */
/* Register definitions *****************************************************/
#define NRF53_CLOCK_TASKS_HFCLKSTART (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_HFCLKSTART_OFFSET)
#define NRF53_CLOCK_TASKS_HFCLKSTOP (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_HFCLKSTOP_OFFSET)
#define NRF53_CLOCK_TASKS_LFCLKSTART (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_LFCLKSTART_OFFSET)
#define NRF53_CLOCK_TASKS_LFCLKSTOP (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_LFCLKSTOP_OFFSET)
#define NRF53_CLOCK_TASKS_CAL (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_CAL_OFFSET)
#define NRF53_CLOCK_TASKS_HFCLKSTART (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_HFCLKSTART_OFFSET)
#define NRF53_CLOCK_TASKS_HFCLKSTOP (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_HFCLKSTOP_OFFSET)
#define NRF53_CLOCK_TASKS_LFCLKSTART (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_LFCLKSTART_OFFSET)
#define NRF53_CLOCK_TASKS_LFCLKSTOP (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_LFCLKSTOP_OFFSET)
#define NRF53_CLOCK_TASKS_CAL (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_CAL_OFFSET)
#define NRF53_CLOCK_TASKS_HFCLKAUDIOSTART (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_HFCLKAUDIOSTART_OFFSET)
#define NRF53_CLOCK_TASKS_HFCLKAUDIOSTOP (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_HFCLKAUDIOSTOP_OFFSET)
#define NRF53_CLOCK_TASKS_HFCLK192MSTART (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_HFCLK192MSTART_OFFSET)
#define NRF53_CLOCK_TASKS_HFCLK192MSTOP (NRF53_CLOCK_BASE + NRF53_CLOCK_TASKS_HFCLK192MSTOP_OFFSET)
/* TODO */
#define NRF53_CLOCK_EVENTS_HFCLKSTARTED (NRF53_CLOCK_BASE + NRF53_CLOCK_EVENTS_HFCLKSTARTED_OFFSET)
#define NRF53_CLOCK_EVENTS_LFCLKSTARTED (NRF53_CLOCK_BASE + NRF53_CLOCK_EVENTS_LFCLKSTARTED_OFFSET)
#define NRF53_CLOCK_EVENTS_DONE (NRF53_CLOCK_BASE + NRF53_CLOCK_EVENTS_DONE_OFFSET)
#define NRF53_CLOCK_EVENTS_HFCLKSTARTED (NRF53_CLOCK_BASE + NRF53_CLOCK_EVENTS_HFCLKSTARTED_OFFSET)
#define NRF53_CLOCK_EVENTS_LFCLKSTARTED (NRF53_CLOCK_BASE + NRF53_CLOCK_EVENTS_LFCLKSTARTED_OFFSET)
#define NRF53_CLOCK_EVENTS_DONE (NRF53_CLOCK_BASE + NRF53_CLOCK_EVENTS_DONE_OFFSET)
#define NRF53_CLOCK_EVENTS_HFCLKAUDIOSTARTED (NRF53_CLOCK_BASE + NRF53_CLOCK_EVENTS_HFCLKAUDIOSTARTED_OFFSET)
#define NRF53_CLOCK_EVENTS_HFCLK192MSTARTED (NRF53_CLOCK_BASE + NRF53_CLOCK_EVENTS_HFCLK192MSTARTED_OFFSET)
/* TODO */
#define NRF53_CLOCK_INTENSET (NRF53_CLOCK_BASE + NRF53_CLOCK_INTENSET_OFFSET)
#define NRF53_CLOCK_INTENCLR (NRF53_CLOCK_BASE + NRF53_CLOCK_INTENCLR_OFFSET)
/* TODO */
#define NRF53_CLOCK_HFCLKRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKRUN_OFFSET)
#define NRF53_CLOCK_HFCLKSTAT (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKSTAT_OFFSET)
#define NRF53_CLOCK_LFCLKRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKRUN_OFFSET)
#define NRF53_CLOCK_LFCLKSTAT (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKSTAT_OFFSET)
#define NRF53_CLOCK_LFCLKSRCCOPY (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKSRCCOPY_OFFSET)
/* TODO */
#define NRF53_CLOCK_LFCLKSRC (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKSRC_OFFSET)
#define NRF53_CLOCK_INTENSET (NRF53_CLOCK_BASE + NRF53_CLOCK_INTENSET_OFFSET)
#define NRF53_CLOCK_INTENCLR (NRF53_CLOCK_BASE + NRF53_CLOCK_INTENCLR_OFFSET)
/* TODO */
#define NRF53_CLOCK_HFCLKRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKRUN_OFFSET)
#define NRF53_CLOCK_HFCLKSTAT (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKSTAT_OFFSET)
#define NRF53_CLOCK_LFCLKRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKRUN_OFFSET)
#define NRF53_CLOCK_LFCLKSTAT (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKSTAT_OFFSET)
#define NRF53_CLOCK_LFCLKSRCCOPY (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKSRCCOPY_OFFSET)
#define NRF53_CLOCK_HFCLKAUDIORUN (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKAUDIORUN_OFFSET)
#define NRF53_CLOCK_HFCLKAUDIOSTAT (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKAUDIOSTAT_OFFSET)
#define NRF53_CLOCK_HFCLK192MRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLK192MRUN_OFFSET)
#define NRF53_CLOCK_HFCLK192MSTAT (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLK192MSTAT_OFFSET)
#define NRF53_CLOCK_HFCLKSRC (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKSRC_OFFSET)
#define NRF53_CLOCK_LFCLKSRC (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKSRC_OFFSET)
#define NRF53_CLOCK_HFCLKCTRL (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKCTRL_OFFSET)
#define NRF53_CLOCK_HFCLKAUDIOFREQUENCY (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKAUDIOFREQUENCY_OFFSET)
#define NRF53_CLOCK_HFCLKALWAYSRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKALWAYSRUN_OFFSET)
#define NRF53_CLOCK_LFCLKALWAYSRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_LFCLKALWAYSRUN_OFFSET)
#define NRF53_CLOCK_HFCLKAUDIOALWAYSRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLKAUDIOALWAYSRUN_OFFSET)
#define NRF53_CLOCK_HFCLK192MSRC (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLK192MSRC_OFFSET)
#define NRF53_CLOCK_HFCLK192MALWAYSRUN (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLK192MALWAYSRUN_OFFSET)
#define NRF53_CLOCK_HFCLK192MCTRL (NRF53_CLOCK_BASE + NRF53_CLOCK_HFCLK192MCTRL_OFFSET)
/* Register bit definitions *************************************************/
@ -117,4 +151,12 @@
# define CLOCK_LFCLKSRC_SRC_LFXO (2 << CLOCK_LFCLKSTAT_SRC_SHIFT)
# define CLOCK_LFCLKSRC_SRC_LFSYNT (3 << CLOCK_LFCLKSTAT_SRC_SHIFT)
/* HFCLK192MSRC Register */
#define CLOCK_HFCLK192MSRC_SRC_SHIFT (0) /* Bits 0-1: HFCLK192M clock source */
#define CLOCK_HFCLK192MSRC_SRC_MASK (3 << CLOCK_HFCLK192MSRC_SRC_SHIFT)
# define CLOCK_HFCLK192MSRC_DIV1 (0 << CLOCK_HFCLK192MSRC_SRC_SHIFT)
# define CLOCK_HFCLK192MSRC_DIV2 (1 << CLOCK_HFCLK192MSRC_SRC_SHIFT)
# define CLOCK_HFCLK192MSRC_DIV4 (2 << CLOCK_HFCLK192MSRC_SRC_SHIFT)
#endif /* __ARCH_ARM_SRC_NRF53_HARDWARE_NRF53_CLOCK_H */

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@ -106,4 +106,26 @@ void nrf53_clockconfig(void)
/* TODO: calibrate LFCLK RC oscillator */
#endif
#endif
#ifdef CONFIG_NRF53_USE_HFCLK192M
/* Initialize HFCLK192M */
#if defined(CONFIG_NRF53_HFCLK192M_192)
putreg32(NRF53_CLOCK_HFCLK192MSRC, CLOCK_HFCLK192MSRC_DIV1);
#elif defined(CONFIG_NRF53_HFCLK192M_96)
putreg32(NRF53_CLOCK_HFCLK192MSRC, CLOCK_HFCLK192MSRC_DIV2);
#elif defined(CONFIG_NRF53_HFCLK192M_48)
putreg32(NRF53_CLOCK_HFCLK192MSRC, CLOCK_HFCLK192MSRC_DIV4);
#endif
/* Trigger HFCLK192M start */
putreg32(0x0, NRF53_CLOCK_EVENTS_HFCLK192MSTARTED);
putreg32(0x1, NRF53_CLOCK_TASKS_HFCLK192MSTART);
while (!getreg32(NRF53_CLOCK_EVENTS_HFCLK192MSTARTED))
{
/* Wait for HFCLK192M to be running */
}
#endif
}

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@ -38,6 +38,22 @@
* (32k_clk)
*/
/* HFCLK192M configuration */
#ifdef CONFIG_NRF53_USE_HFCLK192M
# if defined(CONFIG_NRF53_HFCLK192M_192)
# define NRF53_PCLK192M_FREQ 192000000
# elif defined(CONFIG_NRF53_HFCLK192M_96)
# define NRF53_PCLK192M_FREQ 96000000
# elif defined(CONFIG_NRF53_HFCLK192M_48)
# define NRF53_PCLK192M_FREQ 48000000
# else
# error Invalid configuration
# endif
#else
# define NRF53_PCLK192M_FREQ 0
#endif
#ifndef __ASSEMBLY__
/****************************************************************************