sergiotarxz/nuttx
sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Correct conditional compilation

Browse Source 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2756 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2010-06-20 17:07:13 +00:00
parent 8ace6906d3
commit 60762e2d26
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/src/lpc17xx/lpc17_clockconfig.c
View File

@ -104,7 +104,7 @@ void lpc17_clockconfig(void)
/* PLL0 is used to generate the CPU clock divider input (PLLCLK). */
#if CONFIG_LPC17_PLL0
#ifdef CONFIG_LPC17_PLL0
/* Select the PLL0 source clock, multiplier, and pre-divider values. NOTE that
* a special "feed" sequence must be written to the PLL0FEED register in order
* for changes to the PLL0CFG register to take effect.