Several important Kinetis build fixes

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3891 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-08-18 18:16:47 +00:00
parent 5b1a98ae92
commit 60869cb75a
6 changed files with 78 additions and 45 deletions

View File

@ -41,24 +41,24 @@ ifeq ($(CONFIG_KINETIS_CODESOURCERYW),y)
# CodeSourcery under Windows
CROSSDEV = arm-none-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mlong-calls
endif
ifeq ($(CONFIG_KINETIS_CODESOURCERYL),y)
# CodeSourcery under Linux
CROSSDEV = arm-none-eabi-
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mlong-calls
MAXOPTIMIZATION = -O2
endif
ifeq ($(CONFIG_KINETIS_DEVKITARM),y)
# devkitARM under Windows
CROSSDEV = arm-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mlong-calls
endif
ifeq ($(CONFIG_KINETIS_BUILDROOT),y)
# NuttX buildroot under Linux or Cygwin
CROSSDEV = arm-elf-
ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft -mlong-calls
MAXOPTIMIZATION = -Os
endif

View File

@ -77,15 +77,8 @@ CONFIG_ARCH_CHIP_MK40X256VLQ100=y
CONFIG_ARCH_BOARD=kwikstik-k40
CONFIG_ARCH_BOARD_KWIKSTIK_K40=y
CONFIG_BOARD_LOOPSPERMSEC=5483
CONFIG_DRAM_SIZE=0x18000000
CONFIG_DRAM_START=0x00008000
# define KINETIS_SRAML_BASE 0x18000000 /* 0x1fffffff SRAM_L: Lower SRAM
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXMEM_SIZE (256*1024) /* 256Kb */
# define KINETIS_SRAM_SIZE (64*1024) /* 32Kb */
CONFIG_DRAM_START=0x1fff8000
CONFIG_DRAM_SIZE= 0x00010000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_INTERRUPTSTACK=n

View File

@ -34,22 +34,42 @@
****************************************************************************/
/* The K40X256VLQ100 has 256Kb of FLASH beginning at address 0x0000:0000 and
* 32Kb of SRAM beginning at address 0x1800:0000.
* 64Kb of SRAM beginning at address 0x1800:0000 (SRAM_L) and 0x2000:000
* (SRAM_U).
*
* NOTE: that the first part of the K40 FLASH region is reserved for
* interrupt vectflash and, following that, is a region from 0x0000:0400
* to 0x0000:040f that is reserved for the FLASH control fields (FCF).
*
* NOTE: The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is
* also implemented such that the SRAM_L and SRAM_U ranges form a
* contiguous block in the memory map.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K
sram (rwx) : ORIGIN = 0x18000000, LENGTH = 32K
vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K - 16
cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 16
progflash (rx) : ORIGIN = 0x00000800, LENGTH = 256K - 2K
datasram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.vectors : {
_svectors = ABSOLUTE(.);
*(.vectors)
_evectors = ABSOLUTE(.);
} > vectflash
.cfmprotect : {
*(.cfmconfig)
} > cfmprotect
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
@ -61,7 +81,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
} > progflash
.data : {
_sdata = ABSOLUTE(.);
@ -69,26 +89,26 @@ SECTIONS
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
} > datasram AT > progflash
_eronly = LOADADDR(.data);
.ramfunc ALIGN(4): {
_sramfunc_begin = . ;
_sramfuncs = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfunc_end = . ;
} > sram AT > flash
_eramfuncs = ABSOLUTE(.);
} > datasram AT > progflash
_framfunc = LOADADDR(.ramfunc);
_framfuncs = LOADADDR(.ramfunc);
.ARM.extab : {
*(.ARM.extab*)
} >sram
} > datasram
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} >sram
} > datasram
__exidx_end = ABSOLUTE(.);
.bss : {
@ -97,7 +117,7 @@ SECTIONS
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
} > datasram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }

View File

@ -41,24 +41,24 @@ ifeq ($(CONFIG_KINETIS_CODESOURCERYW),y)
# CodeSourcery under Windows
CROSSDEV = arm-none-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mlong-calls
endif
ifeq ($(CONFIG_KINETIS_CODESOURCERYL),y)
# CodeSourcery under Linux
CROSSDEV = arm-none-eabi-
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mlong-calls
MAXOPTIMIZATION = -O2
endif
ifeq ($(CONFIG_KINETIS_DEVKITARM),y)
# devkitARM under Windows
CROSSDEV = arm-eabi-
WINTOOL = y
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft
ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mlong-calls
endif
ifeq ($(CONFIG_KINETIS_BUILDROOT),y)
# NuttX buildroot under Linux or Cygwin
CROSSDEV = arm-elf-
ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft -mlong-calls
MAXOPTIMIZATION = -Os
endif

View File

@ -77,8 +77,8 @@ CONFIG_ARCH_CHIP_MK60N512VMD100=y
CONFIG_ARCH_BOARD=twr-k60n512
CONFIG_ARCH_BOARD_TWR_K60N512=y
CONFIG_BOARD_LOOPSPERMSEC=5483
CONFIG_DRAM_SIZE=0x18000000
CONFIG_DRAM_START=0x00020000
CONFIG_DRAM_START=0x1fff0000
CONFIG_DRAM_SIZE=0x00020000
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_INTERRUPTSTACK=n

View File

@ -34,22 +34,42 @@
****************************************************************************/
/* The K60N512VMD100 has 512Kb of FLASH beginning at address 0x0000:0000 and
* 128Kb of SRAM beginning at address 0x1800:0000.
* 128Kb of SRAM beginning at address 0x1800:0000 (SRAM_L) and 0x2000:000
* (SRAM_U).
*
* NOTE: that the first part of the K40 FLASH region is reserved for
* interrupt vectflash and, following that, is a region from 0x0000:0400
* to 0x0000:040f that is reserved for the FLASH control fields (FCF).
*
* NOTE: The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is
* also implemented such that the SRAM_L and SRAM_U ranges form a
* contiguous block in the memory map.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K
sram (rwx) : ORIGIN = 0x18000000, LENGTH = 128K
vectflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K - 16
cfmprotect (rx) : ORIGIN = 0x00000400, LENGTH = 16
progflash (rx) : ORIGIN = 0x00000800, LENGTH = 512K - 2K
datasram (rwx) : ORIGIN = 0x1fff0000, LENGTH = 128K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.vectors : {
_svectors = ABSOLUTE(.);
*(.vectors)
_evectors = ABSOLUTE(.);
} > vectflash
.cfmprotect : {
*(.cfmconfig)
} > cfmprotect
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
@ -61,7 +81,7 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
} > progflash
.data : {
_sdata = ABSOLUTE(.);
@ -69,26 +89,26 @@ SECTIONS
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
} > datasram AT > progflash
_eronly = LOADADDR(.data);
.ramfunc ALIGN(4): {
_sramfunc_begin = . ;
_sramfuncs = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfunc_end = . ;
} > sram AT > flash
_eramfuncs = ABSOLUTE(.);
} > datasram AT > progflash
_framfunc = LOADADDR(.ramfunc);
_framfuncs = LOADADDR(.ramfunc);
.ARM.extab : {
*(.ARM.extab*)
} >sram
} > datasram
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} >sram
} > datasram
__exidx_end = ABSOLUTE(.);
.bss : {
@ -97,7 +117,7 @@ SECTIONS
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
} > datasram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }