diff --git a/arch/x86/include/i486/arch.h b/arch/x86/include/i486/arch.h
index a06acc5a6d..f869cc5a1a 100644
--- a/arch/x86/include/i486/arch.h
+++ b/arch/x86/include/i486/arch.h
@@ -170,16 +170,17 @@
 #  define PIC_OCW3_PCMD_MASK     (3 << PIC_OCW3_PCMD_SHIFT)
 #    define PIC_OCW3_PCMD_IRR    (2 << PIC_OCW3_PCMD_SHIFT) /* Next Read Returns Interrupt Request Register */
 #    define PIC_OCW3_PCMD_ISR    (3 << PIC_OCW3_PCMD_SHIFT) /* Next Read Returns In-Service Register */
-#  define PIC_OCW3_POLLCMD       (1 << 2) /* Poll command */
-#  define PIC_OCW3_ONE           (1 << 3) /* Must be set to 1 */
+#  define PIC_OCW3_POLLCMD       (1 << 2)                   /* Poll command */
+#  define PIC_OCW3_ONE           (1 << 3)                   /* Must be set to 1 */
 #  define PIC_OCW3_SM_SHIFT      (5)
 #  define PIC_OCW3_SM_MASK       (3 << PIC_OCW3_SM_SHIFT)
 #    define PIC_OCW3_RSM         (2 << PIC_OCW3_SM_SHIFT) /* Reset Special Mask */
 #    define PIC_OCW3_SSM         (3 << PIC_OCW3_SM_SHIFT) /* Set Special Mask */
 
-/* If the PIC has been reset, it must be initialized with 2 to 4 Initialization
- * Command Words (ICW) before it will accept and process Interrupt Requests. The
- * following outlines the four possible Initialization Command Words.
+/* If the PIC has been reset, it must be initialized with 2 to 4
+ * Initialization Command Words (ICW) before it will accept and process
+ * Interrupt Requests. The following outlines the four possible
+ * Initialization Command Words.
  */
 
 #define PIC1_ICW1                0x20
@@ -243,8 +244,8 @@
 #    define PIC_ICW4_BMODE_NON   (0 << PIC_ICW4_BMODE_SHIFT) /* Non - Buffered Mode */
 #    define PIC_ICW4_BMODE_SLAVE (2 << PIC_ICW4_BMODE_SHIFT) /* Buffered Mode - Slave */
 #    define PIC_ICW4_BMODE_MSTR  (3 << PIC_ICW4_BMODE_SHIFT) /* Buffered Mode - Master */
-#  define PIC_ICW4_AEOI          (1 << 1) /* Auto EOI  */
-#  define PIC_ICW4_808xMODE      (1 << 0) /* 8086/8080 Mode (vs MCS-80/85) */
+#  define PIC_ICW4_AEOI          (1 << 1)                    /* Auto EOI  */
+#  define PIC_ICW4_808xMODE      (1 << 0)                    /* 8086/8080 Mode (vs MCS-80/85) */
 
 /* Interrupt Mask Register */
 
@@ -340,7 +341,7 @@ begin_packed_struct struct gdt_ptr_s
 /* IDT data structures ******************************************************
  *
  * The Interrupt Descriptor Table (IDT) is a data structure used by the x86
- * architecture to implement an interrupt vector table. The IDT is used by the
+ * architecture to implement an interrupt vector table. IDT is used by the
  * processor to determine the correct response to interrupts and exceptions.
  */
 
@@ -371,7 +372,7 @@ begin_packed_struct struct idt_ptr_s
 
 /* Return stack pointer */
 
-static inline uint32_t up_getsp()
+static inline uint32_t x86_getsp()
 {
   uint32_t regval;
 
diff --git a/arch/x86/include/tls.h b/arch/x86/include/tls.h
index 0298349cd1..c9a1ea1024 100644
--- a/arch/x86/include/tls.h
+++ b/arch/x86/include/tls.h
@@ -66,7 +66,7 @@
 static inline FAR struct tls_info_s *up_tls_info(void)
 {
   DEBUGASSERT(!up_interrupt_context());
-  return TLS_INFO((uintptr_t)up_getsp());
+  return TLS_INFO((uintptr_t)x86_getsp());
 }
 #else
 #  define up_tls_info() tls_get_info()
diff --git a/arch/x86/src/common/up_assert.c b/arch/x86/src/common/up_assert.c
index 0da152befb..f27d07577d 100644
--- a/arch/x86/src/common/up_assert.c
+++ b/arch/x86/src/common/up_assert.c
@@ -136,7 +136,7 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
 static void up_dumpstate(void)
 {
   struct tcb_s *rtcb = running_task();
-  uint32_t sp = up_getsp();
+  uint32_t sp = x86_getsp();
   uint32_t ustackbase;
   uint32_t ustacksize;
 #if CONFIG_ARCH_INTERRUPTSTACK > 3
@@ -315,7 +315,7 @@ void up_assert(const uint8_t *filename, int lineno)
   syslog_flush();
 
 #ifdef CONFIG_BOARD_CRASHDUMP
-  board_crashdump(up_getsp(), running_task(), filename, lineno);
+  board_crashdump(x86_getsp(), running_task(), filename, lineno);
 #endif
 
   _up_assert(EXIT_FAILURE);