arch/x86: change up_getsp to x86_getsp
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
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@ -170,16 +170,17 @@
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# define PIC_OCW3_PCMD_MASK (3 << PIC_OCW3_PCMD_SHIFT)
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# define PIC_OCW3_PCMD_MASK (3 << PIC_OCW3_PCMD_SHIFT)
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# define PIC_OCW3_PCMD_IRR (2 << PIC_OCW3_PCMD_SHIFT) /* Next Read Returns Interrupt Request Register */
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# define PIC_OCW3_PCMD_IRR (2 << PIC_OCW3_PCMD_SHIFT) /* Next Read Returns Interrupt Request Register */
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# define PIC_OCW3_PCMD_ISR (3 << PIC_OCW3_PCMD_SHIFT) /* Next Read Returns In-Service Register */
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# define PIC_OCW3_PCMD_ISR (3 << PIC_OCW3_PCMD_SHIFT) /* Next Read Returns In-Service Register */
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# define PIC_OCW3_POLLCMD (1 << 2) /* Poll command */
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# define PIC_OCW3_POLLCMD (1 << 2) /* Poll command */
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# define PIC_OCW3_ONE (1 << 3) /* Must be set to 1 */
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# define PIC_OCW3_ONE (1 << 3) /* Must be set to 1 */
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# define PIC_OCW3_SM_SHIFT (5)
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# define PIC_OCW3_SM_SHIFT (5)
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# define PIC_OCW3_SM_MASK (3 << PIC_OCW3_SM_SHIFT)
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# define PIC_OCW3_SM_MASK (3 << PIC_OCW3_SM_SHIFT)
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# define PIC_OCW3_RSM (2 << PIC_OCW3_SM_SHIFT) /* Reset Special Mask */
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# define PIC_OCW3_RSM (2 << PIC_OCW3_SM_SHIFT) /* Reset Special Mask */
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# define PIC_OCW3_SSM (3 << PIC_OCW3_SM_SHIFT) /* Set Special Mask */
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# define PIC_OCW3_SSM (3 << PIC_OCW3_SM_SHIFT) /* Set Special Mask */
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/* If the PIC has been reset, it must be initialized with 2 to 4 Initialization
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/* If the PIC has been reset, it must be initialized with 2 to 4
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* Command Words (ICW) before it will accept and process Interrupt Requests. The
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* Initialization Command Words (ICW) before it will accept and process
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* following outlines the four possible Initialization Command Words.
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* Interrupt Requests. The following outlines the four possible
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* Initialization Command Words.
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*/
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*/
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#define PIC1_ICW1 0x20
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#define PIC1_ICW1 0x20
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@ -243,8 +244,8 @@
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# define PIC_ICW4_BMODE_NON (0 << PIC_ICW4_BMODE_SHIFT) /* Non - Buffered Mode */
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# define PIC_ICW4_BMODE_NON (0 << PIC_ICW4_BMODE_SHIFT) /* Non - Buffered Mode */
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# define PIC_ICW4_BMODE_SLAVE (2 << PIC_ICW4_BMODE_SHIFT) /* Buffered Mode - Slave */
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# define PIC_ICW4_BMODE_SLAVE (2 << PIC_ICW4_BMODE_SHIFT) /* Buffered Mode - Slave */
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# define PIC_ICW4_BMODE_MSTR (3 << PIC_ICW4_BMODE_SHIFT) /* Buffered Mode - Master */
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# define PIC_ICW4_BMODE_MSTR (3 << PIC_ICW4_BMODE_SHIFT) /* Buffered Mode - Master */
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# define PIC_ICW4_AEOI (1 << 1) /* Auto EOI */
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# define PIC_ICW4_AEOI (1 << 1) /* Auto EOI */
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# define PIC_ICW4_808xMODE (1 << 0) /* 8086/8080 Mode (vs MCS-80/85) */
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# define PIC_ICW4_808xMODE (1 << 0) /* 8086/8080 Mode (vs MCS-80/85) */
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/* Interrupt Mask Register */
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/* Interrupt Mask Register */
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@ -340,7 +341,7 @@ begin_packed_struct struct gdt_ptr_s
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/* IDT data structures ******************************************************
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/* IDT data structures ******************************************************
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*
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*
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* The Interrupt Descriptor Table (IDT) is a data structure used by the x86
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* The Interrupt Descriptor Table (IDT) is a data structure used by the x86
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* architecture to implement an interrupt vector table. The IDT is used by the
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* architecture to implement an interrupt vector table. IDT is used by the
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* processor to determine the correct response to interrupts and exceptions.
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* processor to determine the correct response to interrupts and exceptions.
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*/
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*/
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@ -371,7 +372,7 @@ begin_packed_struct struct idt_ptr_s
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/* Return stack pointer */
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/* Return stack pointer */
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static inline uint32_t up_getsp()
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static inline uint32_t x86_getsp()
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{
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{
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uint32_t regval;
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uint32_t regval;
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@ -66,7 +66,7 @@
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static inline FAR struct tls_info_s *up_tls_info(void)
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static inline FAR struct tls_info_s *up_tls_info(void)
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{
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{
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DEBUGASSERT(!up_interrupt_context());
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DEBUGASSERT(!up_interrupt_context());
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return TLS_INFO((uintptr_t)up_getsp());
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return TLS_INFO((uintptr_t)x86_getsp());
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}
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}
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#else
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#else
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# define up_tls_info() tls_get_info()
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# define up_tls_info() tls_get_info()
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@ -136,7 +136,7 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
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static void up_dumpstate(void)
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static void up_dumpstate(void)
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{
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{
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struct tcb_s *rtcb = running_task();
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struct tcb_s *rtcb = running_task();
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uint32_t sp = up_getsp();
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uint32_t sp = x86_getsp();
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uint32_t ustackbase;
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uint32_t ustackbase;
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uint32_t ustacksize;
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uint32_t ustacksize;
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#if CONFIG_ARCH_INTERRUPTSTACK > 3
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#if CONFIG_ARCH_INTERRUPTSTACK > 3
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@ -315,7 +315,7 @@ void up_assert(const uint8_t *filename, int lineno)
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syslog_flush();
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syslog_flush();
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#ifdef CONFIG_BOARD_CRASHDUMP
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#ifdef CONFIG_BOARD_CRASHDUMP
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board_crashdump(up_getsp(), running_task(), filename, lineno);
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board_crashdump(x86_getsp(), running_task(), filename, lineno);
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#endif
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#endif
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_up_assert(EXIT_FAILURE);
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_up_assert(EXIT_FAILURE);
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