From 615b7d6c7a936097dc97ab8a0b7800f28fec19f4 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 22 Jul 2014 07:13:33 -0600 Subject: [PATCH] Fix typos in the STM32 DAC header file. From Petteri Aimonen --- arch/arm/src/stm32/chip/stm32_dac.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32_dac.h b/arch/arm/src/stm32/chip/stm32_dac.h index 28c606d45f..14ea3e341b 100644 --- a/arch/arm/src/stm32/chip/stm32_dac.h +++ b/arch/arm/src/stm32/chip/stm32_dac.h @@ -55,7 +55,7 @@ #define STM32_DAC_DHR12L1_OFFSET 0x000c /* DAC channel1 12-bit left aligned data holding register */ #define STM32_DAC_DHR8R1_OFFSET 0x0010 /* DAC channel1 8-bit right aligned data holding register */ #define STM32_DAC_DHR12R2_OFFSET 0x0014 /* DAC channel2 12-bit right aligned data holding register */ -#define STM32_DAC_DHR12L_OFFSET 0x0018 /* DAC channel2 12-bit left aligned data holding register */ +#define STM32_DAC_DHR12L2_OFFSET 0x0018 /* DAC channel2 12-bit left aligned data holding register */ #define STM32_DAC_DHR8R2_OFFSET 0x001c /* DAC channel2 8-bit right-aligned data holding register */ #define STM32_DAC_DHR12RD_OFFSET 0x0020 /* Dual DAC 12-bit right-aligned data holding register */ #define STM32_DAC_DHR12LD_OFFSET 0x0024 /* DUAL DAC 12-bit left aligned data holding register */ @@ -72,7 +72,7 @@ #define STM32_DAC_DHR12L1 (STM32_DAC_BASE+STM32_DAC_DHR12L1_OFFSET) #define STM32_DAC_DHR8R1 (STM32_DAC_BASE+STM32_DAC_DHR8R1_OFFSET) #define STM32_DAC_DHR12R2 (STM32_DAC_BASE+STM32_DAC_DHR12R2_OFFSET) -#define STM32_DAC_DHR12L (STM32_DAC_BASE+STM32_DAC_DHR12L_OFFSET) +#define STM32_DAC_DHR12L2 (STM32_DAC_BASE+STM32_DAC_DHR12L2_OFFSET) #define STM32_DAC_DHR8R2 (STM32_DAC_BASE+STM32_DAC_DHR8R2_OFFSET) #define STM32_DAC_DHR12RD (STM32_DAC_BASE+STM32_DAC_DHR12RD_OFFSET) #define STM32_DAC_DHR12LD (STM32_DAC_BASE+STM32_DAC_DHR12LD_OFFSET)