Clicker2 STM32: Add SPI support
This commit is contained in:
Gregory Nutt
parent
c4579e775a
commit
6168d43c2c
@ -2,3 +2,23 @@
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_BOARD_CLICKER2_STM32
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config CLICKER2_STM32_MB1_SPI
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bool "mikroBUS1 SPI"
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default n if !STM32_SPI3
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default y if STM32_SPI3
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select STM32_SPI3
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---help---
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Enable SPI support on mikroBUS1 (STM32 SPI3)
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config CLICKER2_STM32_MB2_SPI
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bool "mikroBUS2 SPI"
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default n if !STM32_SPI2
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default y if STM32_SPI2
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select STM32_SPI2
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---help---
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Enable SPI support on mikroBUS1 (STM32 SPI2)
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endif # ARCH_BOARD_CLICKER2_STM32
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@ -261,107 +261,24 @@
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#define BUTTON_T3_BIT (1 << BUTTON_T3)
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/* Alternate function pin selections ************************************************/
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/* CAN */
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/* UART3: Assuming RS-232 connverted connected on mikroMB2 */
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#ifndef CONFIG_STM32_FSMC
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# define GPIO_CAN1_RX GPIO_CAN1_RX_3
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# define GPIO_CAN1_TX GPIO_CAN1_TX_3
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#endif
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#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
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#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 /
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#ifndef CONFIG_STM32_ETHMAC
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# define GPIO_CAN2_RX GPIO_CAN2_RX_1
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# define GPIO_CAN2_TX GPIO_CAN2_TX_1
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#endif
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/* UART2:
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/* SPI
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*
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* The board breaks out pins PD5 and PD6 for UART2 on Click board slot 1.
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* SPI2 - mikroBUS2
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* SPI3 - mikroBUS1
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*/
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#ifndef CONFIG_STM32F4DISBB
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# define GPIO_USART2_RX GPIO_USART2_RX_2
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# define GPIO_USART2_TX GPIO_USART2_TX_2
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#endif
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#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 /* PC12 */
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#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 /* PC11 */
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#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 /* PC10 */
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/* UART3: (Used in pseudoterm configuration) */
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#define GPIO_USART3_TX GPIO_USART3_TX_1
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#define GPIO_USART3_RX GPIO_USART3_RX_1
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/* UART6:
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*
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* The STM32F4DIS-BB base board provides RS-232 drivers and a DB9 connector
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* for USART6. This is the preferred serial console for use with the STM32F4DIS-BB.
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*/
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#define GPIO_USART6_RX GPIO_USART6_RX_1
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#define GPIO_USART6_TX GPIO_USART6_TX_1
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/* PWM
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*
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* The STM32F4 Discovery has no real on-board PWM devices, but the board can be
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* configured to output a pulse train using TIM4 CH2 on PD13.
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*/
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#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
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/* RGB LED
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*
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* R = TIM1 CH1 on PE9 | G = TIM2 CH2 on PA1 | B = TIM3 CH3 on PB0
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*/
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#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2
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#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_1
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#define GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_1
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/* SPI - There is a MEMS device on SPI1 using these pins: */
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#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
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#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
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#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
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/* SPI2 - Test MAX31855 on SPI2 PB10 = SCK, PB14 = MISO */
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#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
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#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
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#define GPIO_SPI2_SCK GPIO_SPI2_SCK_1
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/* I2C config to use with Nunchuk PB7 (SDA) and PB8 (SCL) */
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#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
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#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1
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/* Timer Inputs/Outputs (see the README.txt file for options) */
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#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2
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#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
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#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1
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#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1
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/* Ethernet *************************************************************************/
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#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_ETHMAC)
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/* RMII interface to the LAN8720 PHY */
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# ifndef CONFIG_STM32_RMII
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# error CONFIG_STM32_RMII must be defined
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# endif
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/* Clocking is provided by an external 25Mhz XTAL */
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# ifndef CONFIG_STM32_RMII_EXTCLK
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# error CONFIG_STM32_RMII_EXTCLK must be defined
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# endif
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/* Pin disambiguation */
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# define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1
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# define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_1
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# define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1
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# define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1
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#endif
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#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2 /* PB15 */
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#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 /* PB14 */
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#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2 /* PB13 */
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/* DMA Channl/Stream Selections *****************************************************/
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/* Stream selections are arbitrary for now but might become important in the future
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@ -372,7 +289,7 @@
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* DMAMAP_SDIO_2 = Channel 4, Stream 6
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*/
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#define DMAMAP_SDIO DMAMAP_SDIO_1
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#define DMAMAP_SDIO DMAMAP_SDIO_1
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/************************************************************************************
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* Public Data
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@ -36,7 +36,7 @@
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-include $(TOPDIR)/Make.defs
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ASRCS =
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CSRCS = stm32_boot.c stm32_bringup.c
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CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c
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ifeq ($(CONFIG_ARCH_LEDS),y)
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CSRCS += stm32_autoleds.c
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@ -165,6 +165,16 @@
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#define GPIO_PWR_FAULT (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN6)
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#define GPIO_PWR_BATSTAT (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN4)
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/* SPI Chip Selects
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*
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* mikroBUS1 Chipselect: SPI3 PE8
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* mikroBUS2 Chipselect: SPI2 PE11
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*/
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#define GPIO_MB1_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN8)
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#define GPIO_MB2_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN11)
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#ifndef __ASSEMBLY__
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/************************************************************************************
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197
configs/clicker2-stm32/src/stm32_spi.c
Normal file
197
configs/clicker2-stm32/src/stm32_spi.c
Normal file
@ -0,0 +1,197 @@
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/************************************************************************************
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* configs/clicker2-stm32/src/stm32_spi.c
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "chip.h"
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#include "stm32.h"
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#include "clicker2-stm32.h"
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#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_spidev_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the stm32f4discovery board.
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*
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************************************************************************************/
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void weak_function stm32_spidev_initialize(void)
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{
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#if defined(CONFIG_STM32_SPI3) && defined(CONFIG_CLICKER2_STM32_MB1_SPI)
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/* Enable chip select for mikroBUS1 */
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(void)stm32_configgpio(GPIO_MB1_CS);
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#endif
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#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_CLICKER2_STM32_MB2_SPI)
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/* Enable chip select for mikroBUS2 */
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(void)stm32_configgpio(GPIO_MB2_CS);
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#endif
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}
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/****************************************************************************
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* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
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*
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* Description:
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* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
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* provided by board-specific logic. They are implementations of the select
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* and status methods of the SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
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* are provided by common STM32 logic. To use this common SPI logic on your
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* board:
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*
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* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
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* board-specific logic. These functions will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* 3. Add a calls to stm32_spibus_initialize() in your low level application
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* initialization logic
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* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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****************************************************************************/
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#ifdef CONFIG_STM32_SPI1
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void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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}
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uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32_SPI2
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void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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/* To be provided */
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}
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uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32_SPI3
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void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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/* To be provided */
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}
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uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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return 0;
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}
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#endif
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/****************************************************************************
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* Name: stm32_spi1cmddata
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*
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* Description:
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* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
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* or command (false). This function must be provided by platform-specific
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* logic. This is an implementation of the cmddata method of the SPI
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* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
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*
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* Input Parameters:
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*
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* spi - SPI device that controls the bus the device that requires the CMD/
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* DATA selection.
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* devid - If there are multiple devices on the bus, this selects which one
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* to select cmd or data. NOTE: This design restricts, for example,
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* one one SPI display per SPI bus.
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* cmd - true: select command; false: select data
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_CMDDATA
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#ifdef CONFIG_STM32_SPI1
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int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_STM32_SPI2
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int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
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{
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/* To be provided */
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_STM32_SPI3
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int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
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{
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/* To be provided */
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return -ENODEV;
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}
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#endif
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#endif /* CONFIG_SPI_CMDDATA */
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#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
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