stm32:spi Add buffers for DMA
This commit is contained in:
Daniel Agar
patacongo
parent
6f32a6ad8f
commit
6189b2c8bd
@ -8820,6 +8820,13 @@ config STM32_SPI1_DMA
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---help---
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Use DMA to improve SPI1 transfer performance.
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config STM32_SPI1_DMA_BUFFER
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int "SPI1 DMA buffer size"
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default 0
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depends on STM32_SPI1_DMA
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---help---
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Add a properly aligned DMA buffer for RX and TX DMA for SPI1.
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config STM32_SPI_DMATHRESHOLD
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int "SPI DMA threshold"
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default 4
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@ -8836,6 +8843,13 @@ config STM32_SPI2_DMA
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---help---
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Use DMA to improve SPI2 transfer performance.
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config STM32_SPI2_DMA_BUFFER
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int "SPI2 DMA buffer size"
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default 0
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depends on STM32_SPI2_DMA
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---help---
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Add a properly aligned DMA buffer for RX and TX DMA for SPI2.
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config STM32_SPI3_DMA
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bool "SPI3 DMA"
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default n
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@ -8843,6 +8857,13 @@ config STM32_SPI3_DMA
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---help---
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Use DMA to improve SPI3 transfer performance.
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config STM32_SPI3_DMA_BUFFER
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int "SPI3 DMA buffer size"
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default 0
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depends on STM32_SPI3_DMA
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---help---
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Add a properly aligned DMA buffer for RX and TX DMA for SPI3.
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config STM32_SPI4_DMA
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bool "SPI4 DMA"
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default n
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@ -8850,6 +8871,13 @@ config STM32_SPI4_DMA
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---help---
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Use DMA to improve SPI4 transfer performance.
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config STM32_SPI4_DMA_BUFFER
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int "SPI4 DMA buffer size"
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default 0
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depends on STM32_SPI4_DMA
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---help---
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Add a properly aligned DMA buffer for RX and TX DMA for SPI4.
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config STM32_SPI5_DMA
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bool "SPI5 DMA"
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default n
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@ -8857,6 +8885,13 @@ config STM32_SPI5_DMA
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---help---
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Use DMA to improve SPI5 transfer performance.
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config STM32_SPI5_DMA_BUFFER
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int "SPI5 DMA buffer size"
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default 0
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depends on STM32_SPI5_DMA
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---help---
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Add a properly aligned DMA buffer for RX and TX DMA for SPI5.
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config STM32_SPI6_DMA
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bool "SPI6 DMA"
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default n
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@ -8864,6 +8899,13 @@ config STM32_SPI6_DMA
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---help---
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Use DMA to improve SPI6 transfer performance.
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config STM32_SPI5_DMA_BUFFER
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int "SPI5 DMA buffer size"
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default 0
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depends on STM32_SPI5_DMA
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---help---
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Add a properly aligned DMA buffer for RX and TX DMA for SPI6.
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endmenu # SPI Configuration
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menu "I2S Configuration"
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@ -49,6 +49,7 @@
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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@ -118,8 +119,6 @@
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# error "Unknown STM32 DMA"
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# endif
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#endif
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/* DMA channel configuration */
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#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32L15XX) || \
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@ -145,6 +144,48 @@
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# error "Unknown STM32 DMA"
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#endif
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# define SPIDMA_BUFFER_MASK (4 - 1)
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# define SPIDMA_SIZE(b) (((b) + SPIDMA_BUFFER_MASK) & ~SPIDMA_BUFFER_MASK)
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# define SPIDMA_BUF_ALIGN aligned_data(4)
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# if defined(CONFIG_STM32_SPI1_DMA_BUFFER) && \
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CONFIG_STM32_SPI1_DMA_BUFFER > 0
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# define SPI1_DMABUFSIZE_ADJUSTED SPIDMA_SIZE(CONFIG_STM32_SPI1_DMA_BUFFER)
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# define SPI1_DMABUFSIZE_ALGN SPIDMA_BUF_ALIGN
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# endif
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# if defined(CONFIG_STM32_SPI2_DMA_BUFFER) && \
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CONFIG_STM32_SPI2_DMA_BUFFER > 0
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# define SPI2_DMABUFSIZE_ADJUSTED SPIDMA_SIZE(CONFIG_STM32_SPI2_DMA_BUFFER)
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# define SPI2_DMABUFSIZE_ALGN SPIDMA_BUF_ALIGN
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# endif
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# if defined(CONFIG_STM32_SPI3_DMA_BUFFER) && \
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CONFIG_STM32_SPI3_DMA_BUFFER > 0
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# define SPI3_DMABUFSIZE_ADJUSTED SPIDMA_SIZE(CONFIG_STM32_SPI3_DMA_BUFFER)
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# define SPI3_DMABUFSIZE_ALGN SPIDMA_BUF_ALIGN
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# endif
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# if defined(CONFIG_STM32_SPI4_DMA_BUFFER) && \
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CONFIG_STM32_SPI4_DMA_BUFFER > 0
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# define SPI4_DMABUFSIZE_ADJUSTED SPIDMA_SIZE(CONFIG_STM32_SPI4_DMA_BUFFER)
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# define SPI4_DMABUFSIZE_ALGN SPIDMA_BUF_ALIGN
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# endif
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# if defined(CONFIG_STM32_SPI5_DMA_BUFFER) && \
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CONFIG_STM32_SPI5_DMA_BUFFER > 0
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# define SPI5_DMABUFSIZE_ADJUSTED SPIDMA_SIZE(CONFIG_STM32_SPI5_DMA_BUFFER)
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# define SPI5_DMABUFSIZE_ALGN SPIDMA_BUF_ALIGN
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# endif
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# if defined(CONFIG_STM32_SPI6_DMA_BUFFER) && \
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CONFIG_STM32_SPI6_DMA_BUFFER > 0
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# define SPI6_DMABUFSIZE_ADJUSTED SPIDMA_SIZE(CONFIG_STM32_SPI6_DMA_BUFFER)
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# define SPI6_DMABUFSIZE_ALGN SPIDMA_BUF_ALIGN
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# endif
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#endif
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/************************************************************************************
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* Private Types
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************************************************************************************/
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@ -166,6 +207,9 @@ struct stm32_spidev_s
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#endif
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uint8_t rxch; /* The RX DMA channel number */
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uint8_t txch; /* The TX DMA channel number */
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uint8_t *rxbuf; /* The RX DMA buffer */
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uint8_t *txbuf; /* The TX DMA buffer */
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size_t buflen; /* The DMA buffer length */
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DMA_HANDLE rxdma; /* DMA channel handle for RX transfers */
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DMA_HANDLE txdma; /* DMA channel handle for TX transfers */
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sem_t rxsem; /* Wait for RX DMA to complete */
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@ -199,7 +243,6 @@ static inline void spi_putreg8(FAR struct stm32_spidev_s *priv, uint8_t offset,
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#endif
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static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv);
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static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t byte);
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static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv);
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/* DMA support */
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@ -285,6 +328,11 @@ static const struct spi_ops_s g_sp1iops =
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#endif
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};
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#if defined(SPI1_DMABUFSIZE_ADJUSTED)
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static uint8_t g_spi1_txbuf[SPI1_DMABUFSIZE_ADJUSTED] SPI1_DMABUFSIZE_ALGN;
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static uint8_t g_spi1_rxbuf[SPI1_DMABUFSIZE_ADJUSTED] SPI1_DMABUFSIZE_ALGN;
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#endif
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static struct stm32_spidev_s g_spi1dev =
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{
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.spidev =
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@ -300,6 +348,11 @@ static struct stm32_spidev_s g_spi1dev =
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# ifdef CONFIG_STM32_SPI1_DMA
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.rxch = DMACHAN_SPI1_RX,
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.txch = DMACHAN_SPI1_TX,
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#if defined(SPI1_DMABUFSIZE_ADJUSTED)
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.rxbuf = g_spi1_rxbuf,
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.txbuf = g_spi1_txbuf,
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.buflen = SPI1_DMABUFSIZE_ADJUSTED,
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# endif
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# else
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.rxch = 0,
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.txch = 0,
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@ -340,6 +393,11 @@ static const struct spi_ops_s g_sp2iops =
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#endif
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};
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#if defined(SPI2_DMABUFSIZE_ADJUSTED)
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static uint8_t g_spi2_txbuf[SPI2_DMABUFSIZE_ADJUSTED] SPI2_DMABUFSIZE_ALGN;
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static uint8_t g_spi2_rxbuf[SPI2_DMABUFSIZE_ADJUSTED] SPI2_DMABUFSIZE_ALGN;
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#endif
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static struct stm32_spidev_s g_spi2dev =
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{
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.spidev =
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@ -355,6 +413,11 @@ static struct stm32_spidev_s g_spi2dev =
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# ifdef CONFIG_STM32_SPI2_DMA
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.rxch = DMACHAN_SPI2_RX,
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.txch = DMACHAN_SPI2_TX,
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#if defined(SPI2_DMABUFSIZE_ADJUSTED)
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.rxbuf = g_spi2_rxbuf,
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.txbuf = g_spi2_txbuf,
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.buflen = SPI2_DMABUFSIZE_ADJUSTED,
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# endif
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# else
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.rxch = 0,
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.txch = 0,
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@ -395,6 +458,11 @@ static const struct spi_ops_s g_sp3iops =
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#endif
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};
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#if defined(SPI3_DMABUFSIZE_ADJUSTED)
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static uint8_t g_spi3_txbuf[SPI3_DMABUFSIZE_ADJUSTED] SPI3_DMABUFSIZE_ALGN;
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static uint8_t g_spi3_rxbuf[SPI3_DMABUFSIZE_ADJUSTED] SPI3_DMABUFSIZE_ALGN;
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#endif
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static struct stm32_spidev_s g_spi3dev =
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{
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.spidev =
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@ -410,6 +478,11 @@ static struct stm32_spidev_s g_spi3dev =
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# ifdef CONFIG_STM32_SPI3_DMA
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.rxch = DMACHAN_SPI3_RX,
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.txch = DMACHAN_SPI3_TX,
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#if defined(SPI3_DMABUFSIZE_ADJUSTED)
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.rxbuf = g_spi3_rxbuf,
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.txbuf = g_spi3_txbuf,
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.buflen = SPI3_DMABUFSIZE_ADJUSTED,
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# endif
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# else
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.rxch = 0,
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.txch = 0,
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@ -450,6 +523,11 @@ static const struct spi_ops_s g_sp4iops =
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#endif
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};
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#if defined(SPI4_DMABUFSIZE_ADJUSTED)
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static uint8_t g_spi4_txbuf[SPI4_DMABUFSIZE_ADJUSTED] SPI4_DMABUFSIZE_ALGN;
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static uint8_t g_spi4_rxbuf[SPI4_DMABUFSIZE_ADJUSTED] SPI4_DMABUFSIZE_ALGN;
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#endif
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static struct stm32_spidev_s g_spi4dev =
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{
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.spidev =
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@ -465,6 +543,11 @@ static struct stm32_spidev_s g_spi4dev =
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# ifdef CONFIG_STM32_SPI4_DMA
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.rxch = DMACHAN_SPI4_RX,
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.txch = DMACHAN_SPI4_TX,
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#if defined(SPI4_DMABUFSIZE_ADJUSTED)
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.rxbuf = g_spi4_rxbuf,
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.txbuf = g_spi4_txbuf,
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.buflen = SPI4_DMABUFSIZE_ADJUSTED,
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# endif
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# else
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.rxch = 0,
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.txch = 0,
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@ -505,6 +588,11 @@ static const struct spi_ops_s g_sp5iops =
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#endif
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};
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#if defined(SPI5_DMABUFSIZE_ADJUSTED)
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static uint8_t g_spi5_txbuf[SPI5_DMABUFSIZE_ADJUSTED] SPI5_DMABUFSIZE_ALGN;
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static uint8_t g_spi5_rxbuf[SPI5_DMABUFSIZE_ADJUSTED] SPI5_DMABUFSIZE_ALGN;
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#endif
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static struct stm32_spidev_s g_spi5dev =
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{
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.spidev =
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@ -520,6 +608,11 @@ static struct stm32_spidev_s g_spi5dev =
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# ifdef CONFIG_STM32_SPI5_DMA
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.rxch = DMACHAN_SPI5_RX,
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.txch = DMACHAN_SPI5_TX,
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#if defined(SPI5_DMABUFSIZE_ADJUSTED)
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.rxbuf = g_spi5_rxbuf,
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.txbuf = g_spi5_txbuf,
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.buflen = SPI5_DMABUFSIZE_ADJUSTED,
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# endif
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# else
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.rxch = 0,
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.txch = 0,
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@ -560,6 +653,11 @@ static const struct spi_ops_s g_sp6iops =
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#endif
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};
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#if defined(SPI6_DMABUFSIZE_ADJUSTED)
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static uint8_t g_spi6_txbuf[SPI6_DMABUFSIZE_ADJUSTED] SPI6_DMABUFSIZE_ALGN;
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static uint8_t g_spi6_rxbuf[SPI6_DMABUFSIZE_ADJUSTED] SPI6_DMABUFSIZE_ALGN;
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#endif
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static struct stm32_spidev_s g_spi6dev =
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{
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.spidev =
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@ -575,6 +673,11 @@ static struct stm32_spidev_s g_spi6dev =
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# ifdef CONFIG_STM32_SPI6_DMA
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.rxch = DMACHAN_SPI6_RX,
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.txch = DMACHAN_SPI6_TX,
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#if defined(SPI6_DMABUFSIZE_ADJUSTED)
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.rxbuf = g_spi6_rxbuf,
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.txbuf = g_spi6_txbuf,
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.buflen = SPI6_DMABUFSIZE_ADJUSTED,
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# endif
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# else
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.rxch = 0,
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.txch = 0,
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@ -777,29 +880,6 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word)
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}
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}
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/************************************************************************************
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* Name: spi_16bitmode
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*
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* Description:
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* Check if the SPI is operating in 16-bit mode
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*
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* Input Parameters:
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* priv - Device-specific state data
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*
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* Returned Value:
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* true: 16-bit mode, false: 8-bit mode
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*
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************************************************************************************/
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static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv)
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{
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#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
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return (priv->nbits > 8);
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#else
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return ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_DFF) != 0);
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#endif
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}
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/************************************************************************************
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* Name: spi_dmarxwait
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*
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@ -930,7 +1010,7 @@ static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, FAR void *rxbuffer,
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{
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/* 8- or 16-bit mode? */
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if (spi_16bitmode(priv))
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if (priv->nbits > 8)
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{
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/* 16-bit mode -- is there a buffer to receive data in? */
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@ -980,7 +1060,7 @@ static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, FAR const void *txbu
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{
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/* 8- or 16-bit mode? */
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if (spi_16bitmode(priv))
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if (priv->nbits > 8)
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{
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/* 16-bit mode -- is there a buffer to transfer data from? */
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@ -1570,7 +1650,7 @@ static void spi_exchange_nodma(FAR struct spi_dev_s *dev, FAR const void *txbuff
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/* 8- or 16-bit mode? */
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if (spi_16bitmode(priv))
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if (priv->nbits > 8)
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{
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/* 16-bit mode */
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@ -1665,14 +1745,14 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
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FAR void *rxbuffer, size_t nwords)
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{
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FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
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FAR void * xbuffer = rxbuffer;
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DEBUGASSERT(priv != NULL);
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#ifdef CONFIG_STM32_SPI_DMATHRESHOLD
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/* Convert the number of word to a number of bytes */
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size_t nbytes = (priv->nbits > 8) ? nwords << 1 : nwords;
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#ifdef CONFIG_STM32_SPI_DMATHRESHOLD
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/* If this is a small SPI transfer, then let spi_exchange_nodma() do the work. */
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if (nbytes <= CONFIG_STM32_SPI_DMATHRESHOLD)
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@ -1694,8 +1774,10 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
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}
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#ifdef CONFIG_STM32_DMACAPABLE
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if ((txbuffer && !stm32_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) ||
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(rxbuffer && !stm32_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr)))
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if ((txbuffer && priv->txbuf == 0 &&
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!stm32_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) ||
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(rxbuffer && priv->rxbuf == 0 &&
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!stm32_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr)))
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{
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/* Unsupported memory region fall back to non-DMA method. */
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@ -1712,6 +1794,27 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
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/* Setup DMAs */
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/* If this bus uses a in driver buffers we will incur 2 copies,
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* The copy cost is << less the non DMA transfer time and having
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* the buffer in the driver ensures DMA can be used. This is bacause
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* the API does not support passing the buffer extent so the only
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* extent is buffer + the transfer size. These can sizes be less than
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* the cache line size, and not aligned and tyicaly greater then 4
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* bytes, which is about the break even point for the DMA IO overhead.
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*/
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if (txbuffer && priv->txbuf)
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{
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if (nbytes > priv->buflen)
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{
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nbytes = priv->buflen;
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}
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memcpy(priv->txbuf, txbuffer, nbytes);
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txbuffer = priv->txbuf;
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rxbuffer = rxbuffer ? priv->rxbuf : rxbuffer;
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}
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spi_dmarxsetup(priv, rxbuffer, &rxdummy, nwords);
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spi_dmatxsetup(priv, txbuffer, &txdummy, nwords);
|
||||
|
||||
@ -1743,6 +1846,11 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
|
||||
spi_dmarxwait(priv);
|
||||
spi_dmatxwait(priv);
|
||||
|
||||
if (rxbuffer && priv->rxbuf)
|
||||
{
|
||||
memcpy(xbuffer, priv->rxbuf, nbytes);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SPI_TRIGGER
|
||||
priv->trigarmed = false;
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user