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Fix SSI mode setting logic

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2678 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2010-05-16 00:48:37 +00:00
parent f2c7682b2a
commit 619215029e
1 changed files with 2 additions and 2 deletions
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4
arch/arm/src/lm3s/lm3s_ssi.c
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@ -1223,10 +1223,10 @@ static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, enum spi_mode_e mode
return; return;
} }
/* Then set the selected mode */ /* Then set the selected mode: Freescale SPI format, mode0-3 */
regval = ssi_getreg(priv, LM3S_SSI_CR0_OFFSET); regval = ssi_getreg(priv, LM3S_SSI_CR0_OFFSET);
regval &= ~SSI_CR0_FRF_MASK; regval &= ~(SSI_CR0_FRF_MASK|SSI_CR0_SPH|SSI_CR0_SPO);
regval |= modebits; regval |= modebits;
ssi_putreg(priv, LM3S_SSI_CR0_OFFSET, regval); ssi_putreg(priv, LM3S_SSI_CR0_OFFSET, regval);
ssivdbg("CR0: %08x\n", regval); ssivdbg("CR0: %08x\n", regval);