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/arch/arm/src/xmc4: Fix XMC4 SPI. It was working only for the first transfer

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This commit is contained in:
Alan Carvalho de Assis 2018-06-16 13:45:01 -06:00 committed by Gregory Nutt
parent 341497484e
commit 61a026dedd
1 changed files with 11 additions and 10 deletions
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21
arch/arm/src/xmc4/xmc4_spi.c
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@ -1431,20 +1431,19 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
data = 0xffff; data = 0xffff;
} }
/* Set the PCS field in the value written to the TDR */
/*data |= pcs; */
/* Wait for any previous data written to the TDR to be transferred
* to the serializer.
*/
/*while ((spi_getreg(spi, XMC4_SPI_SR_OFFSET) & SPI_INT_TDRE) == 0); */
/* Write the data to transmitted to the Transmit Data Register (TDR) */ /* Write the data to transmitted to the Transmit Data Register (TDR) */
spi_putreg(spi, data, XMC4_USIC_TBUF_OFFSET); spi_putreg(spi, data, XMC4_USIC_TBUF_OFFSET);
/* Wait until the last bit be transfered */
while ((spi_getreg(spi, XMC4_USIC_PSR_OFFSET) &
(USIC_PSR_TSIF)) == 0)
{
}
spi_putreg(spi, USIC_PSCR_CTSIF, XMC4_USIC_PSCR_OFFSET);
/* Wait to get some data */ /* Wait to get some data */
while ((spi_getreg(spi, XMC4_USIC_PSR_OFFSET) & while ((spi_getreg(spi, XMC4_USIC_PSR_OFFSET) &
@ -1452,6 +1451,8 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
{ {
} }
spi_putreg(spi, (USIC_PSCR_CRIF | USIC_PSCR_CAIF), XMC4_USIC_PSCR_OFFSET);
/* Read the received data from the SPI Data Register. */ /* Read the received data from the SPI Data Register. */
data = spi_getreg(spi, XMC4_USIC_RBUF_OFFSET); data = spi_getreg(spi, XMC4_USIC_RBUF_OFFSET);