s32k1xx:Support ramfunc
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@ -236,8 +236,9 @@ config ARCH_CHIP_S32K1XX
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bool "NXP S32K1XX"
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bool "NXP S32K1XX"
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select ARCH_HAVE_MPU
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_RAMFUNCS
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---help---
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---help---
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NPX LPC54XX architectures (ARM Cortex-M0+ and Cortex-M4F).
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NPX S32K1XX architectures (ARM Cortex-M0+ and Cortex-M4F).
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config ARCH_CHIP_SAMA5
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config ARCH_CHIP_SAMA5
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bool "Atmel SAMA5"
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bool "Atmel SAMA5"
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@ -332,6 +332,20 @@ void __start(void)
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}
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}
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#endif
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#endif
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/* Copy any necessary code sections from FLASH to RAM. The correct
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* destination in SRAM is given by _sramfuncs and _eramfuncs. The
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* temporary location is in flash after the data initialization code
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* at _framfuncs. This should be done before s32k1xx_clockconfig() is
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* called (in case it has some dependency on initialized C variables).
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*/
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#ifdef CONFIG_ARCH_RAMFUNCS
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for (src = &_framfuncs, dest = &_sramfuncs; dest < &_eramfuncs; )
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{
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*dest++ = *src++;
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}
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#endif
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/* Configure the clocking and the console uart so that we can get debug
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/* Configure the clocking and the console uart so that we can get debug
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* output as soon as possible. NOTE: That this logic must not assume that
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* output as soon as possible. NOTE: That this logic must not assume that
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* .bss or .data have been initialized.
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* .bss or .data have been initialized.
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