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stm32: serial: nxstyle fixes

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arch/arm/src/stm32/stm32_serial.c:

    * nxstyle fixes, mostly for long lines.
This commit is contained in:
Nathan Hartman 2020-05-19 12:02:29 -04:00 committed by patacongo
parent c7500c5c9d
commit 624b50f7ea
1 changed files with 107 additions and 84 deletions
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191
arch/arm/src/stm32/stm32_serial.c
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@ -1,10 +1,11 @@
/****************************************************************************
* arch/arm/src/stm32/stm32_serial.c
*
* Copyright (C) 2009-2014, 2016, 2017, 2019 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2014, 2016, 2017, 2019 Gregory Nutt.
* All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david.sidrane@nscdg.com>
*
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@ -72,6 +73,7 @@
****************************************************************************/
/* Some sanity checks *******************************************************/
/* DMA configuration */
/* If DMA is enabled on any USART, then very that other pre-requisites
@ -98,8 +100,8 @@
# endif
# endif
/* Currently RS-485 support cannot be enabled when RXDMA is in use due to lack
* of testing - RS-485 support was developed on STM32F1x
/* Currently RS-485 support cannot be enabled when RXDMA is in use due to
* lack of testing - RS-485 support was developed on STM32F1x
*/
# if (defined(CONFIG_USART1_RXDMA) && defined(CONFIG_USART1_RS485)) || \
@ -337,8 +339,8 @@ struct up_dev_s
#endif
#ifdef HAVE_RS485
const uint32_t rs485_dir_gpio; /* U[S]ART RS-485 DIR GPIO pin configuration */
const bool rs485_dir_polarity; /* U[S]ART RS-485 DIR pin state for TX enabled */
const uint32_t rs485_dir_gpio; /* U[S]ART RS-485 DIR GPIO pin cfg */
const bool rs485_dir_polarity; /* U[S]ART RS-485 DIR TXEN polarity */
#endif
};
@ -1060,7 +1062,9 @@ static inline void up_setusartint(struct up_dev_s *priv, uint16_t ie)
priv->ie = ie;
/* And restore the interrupt state (see the interrupt enable/usage table above) */
/* And restore the interrupt state (see the interrupt enable/usage
* table above)
*/
cr = up_serialin(priv, STM32_USART_CR1_OFFSET);
cr &= ~(USART_CR1_USED_INTS);
@ -1105,28 +1109,29 @@ static void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
/* USART interrupts:
*
* Enable Status Meaning Usage
* ------------------ --------------- ------------------------------ ----------
* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
* USART_CR1_RXNEIE USART_SR_RXNE Received Data Ready to be Read
* Enable Status Meaning Usage
* ------------------ --------------- ---------------------- ----------
* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
* USART_CR1_RXNEIE USART_SR_RXNE Rx Data Ready
* " " USART_SR_ORE Overrun Error Detected
* USART_CR1_TCIE USART_SR_TC Transmission Complete (used only for RS-485)
* USART_CR1_TXEIE USART_SR_TXE Transmit Data Register Empty
* USART_CR1_TCIE USART_SR_TC Transmission Complete (RS-485)
* USART_CR1_TXEIE USART_SR_TXE Tx Data Register Empty
* USART_CR1_PEIE USART_SR_PE Parity Error
*
* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
* USART_CR3_EIE USART_SR_FE Framing Error
* " " USART_SR_NE Noise Error
* " " USART_SR_ORE Overrun Error Detected
* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
*/
cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
cr3 = up_serialin(priv, STM32_USART_CR3_OFFSET);
/* Return the current interrupt mask value for the used interrupts. Notice
* that this depends on the fact that none of the used interrupt enable bits
* overlap. This logic would fail if we needed the break interrupt!
/* Return the current interrupt mask value for the used interrupts.
* Notice that this depends on the fact that none of the used interrupt
* enable bits overlap. This logic would fail if we needed the break
* interrupt!
*/
*ie = (cr1 & (USART_CR1_USED_INTS)) | (cr3 & USART_CR3_EIE);
@ -1199,7 +1204,7 @@ static void up_set_format(struct uart_dev_s *dev)
* usartdiv8 = 2 * fCK / baud
*/
usartdiv8 = ((priv->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
usartdiv8 = ((priv->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
/* Baud rate for standard USART (SPI mode included):
*
@ -1245,11 +1250,11 @@ static void up_set_format(struct uart_dev_s *dev)
* baud = fCK / (16 * usartdiv)
* usartdiv = fCK / (16 * baud)
*
* Where fCK is the input clock to the peripheral (PCLK1 for USART2, 3, 4, 5
* or PCLK2 for USART1)
* Where fCK is the input clock to the peripheral (PCLK1 for USART2, 3,
* 4, 5 or PCLK2 for USART1)
*
* First calculate (NOTE: all stand baud values are even so dividing by two
* does not lose precision):
* First calculate (NOTE: all standard baud values are even so dividing by
* two does not lose precision):
*
* usartdiv32 = 32 * usartdiv = fCK / (baud/2)
*/
@ -1511,8 +1516,9 @@ static int up_setup(struct uart_dev_s *dev)
}
#endif
/* Configure CR2 */
/* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
/* Configure CR2
* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits
*/
regval = up_serialin(priv, STM32_USART_CR2_OFFSET);
regval &= ~(USART_CR2_STOP_MASK | USART_CR2_CLKEN | USART_CR2_CPOL |
@ -1527,19 +1533,22 @@ static int up_setup(struct uart_dev_s *dev)
up_serialout(priv, STM32_USART_CR2_OFFSET, regval);
/* Configure CR1 */
/* Clear TE, REm and all interrupt enable bits */
/* Configure CR1
* Clear TE, REm and all interrupt enable bits
*/
regval = up_serialin(priv, STM32_USART_CR1_OFFSET);
regval &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_ALLINTS);
up_serialout(priv, STM32_USART_CR1_OFFSET, regval);
/* Configure CR3 */
/* Clear CTSE, RTSE, and all interrupt enable bits */
/* Configure CR3
* Clear CTSE, RTSE, and all interrupt enable bits
*/
regval = up_serialin(priv, STM32_USART_CR3_OFFSET);
regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE);
regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE |
USART_CR3_EIE);
up_serialout(priv, STM32_USART_CR3_OFFSET, regval);
@ -1726,14 +1735,15 @@ static void up_dma_shutdown(struct uart_dev_s *dev)
* Name: up_attach
*
* Description:
* Configure the USART to operation in interrupt driven mode. This method is
* called when the serial port is opened. Normally, this is just after the
* the setup() method is called, however, the serial console may operate in
* a non-interrupt driven mode during the boot phase.
* Configure the USART to operation in interrupt driven mode. This method
* is called when the serial port is opened. Normally, this is just after
* the setup() method is called, however, the serial console may operate
* in a non-interrupt driven mode during the boot phase.
*
* RX and TX interrupts are not enabled when by the attach method (unless the
* hardware supports multiple levels of interrupt enabling). The RX and TX
* interrupts are not enabled until the txint() and rxint() methods are called.
* RX and TX interrupts are not enabled when by the attach method (unless
* the hardware supports multiple levels of interrupt enabling). The RX
* and TX interrupts are not enabled until the txint() and rxint() methods
* are called.
*
****************************************************************************/
@ -1762,8 +1772,8 @@ static int up_attach(struct uart_dev_s *dev)
*
* Description:
* Detach USART interrupts. This method is called when the serial port is
* closed normally just before the shutdown method is called. The exception
* is the serial console which is never shutdown.
* closed normally just before the shutdown method is called. The
* exception is the serial console which is never shutdown.
*
****************************************************************************/
@ -1815,35 +1825,36 @@ static int up_interrupt(int irq, void *context, void *arg)
/* USART interrupts:
*
* Enable Status Meaning Usage
* ------------------ --------------- ------------------------------- ----------
* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
* USART_CR1_RXNEIE USART_SR_RXNE Received Data Ready to be Read
* Enable Status Meaning Usage
* ------------------ --------------- ---------------------- ----------
* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
* USART_CR1_RXNEIE USART_SR_RXNE Rx Data Ready
* " " USART_SR_ORE Overrun Error Detected
* USART_CR1_TCIE USART_SR_TC Transmission Complete (used only for RS-485)
* USART_CR1_TXEIE USART_SR_TXE Transmit Data Register Empty
* USART_CR1_TCIE USART_SR_TC Tx Complete (RS-485)
* USART_CR1_TXEIE USART_SR_TXE Tx Data Register Empty
* USART_CR1_PEIE USART_SR_PE Parity Error
*
* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
* USART_CR3_EIE USART_SR_FE Framing Error
* " " USART_SR_NE Noise Error
* " " USART_SR_ORE Overrun Error Detected
* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
*
* NOTE: Some of these status bits must be cleared by explicitly writing zero
* to the SR register: USART_SR_CTS, USART_SR_LBD. Note of those are currently
* being used.
* NOTE: Some of these status bits must be cleared by explicitly
* writing zero to the SR register: USART_SR_CTS, USART_SR_LBD. Note of
* those are currently being used.
*/
#ifdef HAVE_RS485
/* Transmission of whole buffer is over - TC is set, TXEIE is cleared.
* Note - this should be first, to have the most recent TC bit value from
* SR register - sending data affects TC, but without refresh we will not
* know that...
* Note - this should be first, to have the most recent TC bit value
* from SR register - sending data affects TC, but without refresh we
* will not know that...
*/
if ((priv->sr & USART_SR_TC) != 0 && (priv->ie & USART_CR1_TCIE) != 0 &&
(priv->ie & USART_CR1_TXEIE) == 0)
if (((priv->sr & USART_SR_TC) != 0) &&
((priv->ie & USART_CR1_TCIE) != 0) &&
((priv->ie & USART_CR1_TXEIE) == 0))
{
stm32_gpiowrite(priv->rs485_dir_gpio, !priv->rs485_dir_polarity);
up_restoreusartint(priv, priv->ie & ~USART_CR1_TCIE);
@ -1852,10 +1863,12 @@ static int up_interrupt(int irq, void *context, void *arg)
/* Handle incoming, receive bytes. */
if ((priv->sr & USART_SR_RXNE) != 0 && (priv->ie & USART_CR1_RXNEIE) != 0)
if (((priv->sr & USART_SR_RXNE) != 0) &&
((priv->ie & USART_CR1_RXNEIE) != 0))
{
/* Received data ready... process incoming bytes. NOTE the check for
* RXNEIE: We cannot call uart_recvchards of RX interrupts are disabled.
/* Received data ready... process incoming bytes. NOTE the check
* for RXNEIE: We cannot call uart_recvchards of RX interrupts are
* disabled.
*/
uart_recvchars(&priv->dev);
@ -1891,7 +1904,8 @@ static int up_interrupt(int irq, void *context, void *arg)
/* Handle outgoing, transmit bytes */
if ((priv->sr & USART_SR_TXE) != 0 && (priv->ie & USART_CR1_TXEIE) != 0)
if (((priv->sr & USART_SR_TXE) != 0) &&
((priv->ie & USART_CR1_TXEIE) != 0))
{
/* Transmit data register empty ... process outgoing bytes */
@ -1953,26 +1967,36 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#if defined(CONFIG_STM32_STM32F10XX)
if ((arg & SER_SINGLEWIRE_ENABLED) != 0)
{
stm32_configgpio((priv->tx_gpio & ~(GPIO_CNF_MASK)) | GPIO_CNF_AFOD);
stm32_configgpio((priv->tx_gpio & ~(GPIO_CNF_MASK)) |
GPIO_CNF_AFOD);
cr |= USART_CR3_HDSEL;
}
else
{
stm32_configgpio((priv->tx_gpio & ~(GPIO_CNF_MASK)) | GPIO_CNF_AFPP);
stm32_configgpio((priv->tx_gpio & ~(GPIO_CNF_MASK)) |
GPIO_CNF_AFPP);
cr &= ~USART_CR3_HDSEL;
}
#else
if ((arg & SER_SINGLEWIRE_ENABLED) != 0)
{
uint32_t gpio_val = GPIO_OPENDRAIN;
gpio_val |= (arg & SER_SINGLEWIRE_PULL_MASK) == SER_SINGLEWIRE_PULLUP ? GPIO_PULLUP : GPIO_FLOAT;
gpio_val |= (arg & SER_SINGLEWIRE_PULL_MASK) == SER_SINGLEWIRE_PULLDOWN ? GPIO_PULLDOWN : GPIO_FLOAT;
stm32_configgpio((priv->tx_gpio & ~(GPIO_PUPD_MASK | GPIO_OPENDRAIN)) | gpio_val);
gpio_val |= ((arg & SER_SINGLEWIRE_PULL_MASK) ==
SER_SINGLEWIRE_PULLUP) ? GPIO_PULLUP
: GPIO_FLOAT;
gpio_val |= ((arg & SER_SINGLEWIRE_PULL_MASK) ==
SER_SINGLEWIRE_PULLDOWN) ? GPIO_PULLDOWN
: GPIO_FLOAT;
stm32_configgpio((priv->tx_gpio & ~(GPIO_PUPD_MASK |
GPIO_OPENDRAIN)) |
gpio_val);
cr |= USART_CR3_HDSEL;
}
else
{
stm32_configgpio((priv->tx_gpio & ~(GPIO_PUPD_MASK | GPIO_OPENDRAIN)) | GPIO_PUSHPULL);
stm32_configgpio((priv->tx_gpio & ~(GPIO_PUPD_MASK |
GPIO_OPENDRAIN)) |
GPIO_PUSHPULL);
cr &= ~USART_CR3_HDSEL;
}
#endif
@ -2092,9 +2116,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
up_txint(dev, false);
/* Configure TX as a GPIO output pin and Send a break signal*/
/* Configure TX as a GPIO output pin and Send a break signal */
tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio);
tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK | GPIO_OUTPUT_SET) &
priv->tx_gpio);
stm32_configgpio(tx_break);
leave_critical_section(flags);
@ -2203,14 +2228,14 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
/* USART receive interrupts:
*
* Enable Status Meaning Usage
* ------------------ --------------- ------------------------------- ----------
* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
* USART_CR1_RXNEIE USART_SR_RXNE Received Data Ready to be Read
* Enable Status Meaning Usage
* ------------------ --------------- ------------------------- ----------
* USART_CR1_IDLEIE USART_SR_IDLE Idle Line Detected (not used)
* USART_CR1_RXNEIE USART_SR_RXNE Rx Data Ready to be Read
* " " USART_SR_ORE Overrun Error Detected
* USART_CR1_PEIE USART_SR_PE Parity Error
*
* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
* USART_CR2_LBDIE USART_SR_LBD Break Flag (not used)
* USART_CR3_EIE USART_SR_FE Framing Error
* " " USART_SR_NE Noise Error
* " " USART_SR_ORE Overrun Error Detected
@ -2220,8 +2245,8 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
ie = priv->ie;
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
* timeout occurs).
/* Receive an interrupt when their is anything in the Rx data register
* (or an Rx timeout occurs).
*/
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@ -2470,11 +2495,11 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
/* USART transmit interrupts:
*
* Enable Status Meaning Usage
* ------------------ --------------- ---------------------------- ----------
* USART_CR1_TCIE USART_SR_TC Transmission Complete (used only for RS-485)
* USART_CR1_TXEIE USART_SR_TXE Transmit Data Register Empty
* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
* Enable Status Meaning Usage
* ------------------ --------------- ----------------------- ----------
* USART_CR1_TCIE USART_SR_TC Tx Complete (RS-485)
* USART_CR1_TXEIE USART_SR_TXE Tx Data Register Empty
* USART_CR3_CTSIE USART_SR_CTS CTS flag (not used)
*/
flags = enter_critical_section();
@ -2588,33 +2613,31 @@ static void up_pm_notify(struct pm_callback_s *cb, int domain,
case(PM_NORMAL):
{
/* Logic for PM_NORMAL goes here */
}
break;
case(PM_IDLE):
{
/* Logic for PM_IDLE goes here */
}
break;
case(PM_STANDBY):
{
/* Logic for PM_STANDBY goes here */
}
break;
case(PM_SLEEP):
{
/* Logic for PM_SLEEP goes here */
}
break;
default:
/* Should not get here */
{
/* Should not get here */
}
break;
}
}