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Merged nuttx/nuttx into master

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ziggurat29 2016-07-07 14:16:12 -05:00
commit 629ec2ca1f
20 changed files with 13441 additions and 85 deletions
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63
.gitignore vendored
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@ -1,33 +1,30 @@
.depend
Make.dep
*.o
*.a
*.d
*.i
*~
.swp
.*.swp
core
.gdbinit
cscope.out
/.config
/.config.old
/.version
/Make.defs
/setenv.sh
/setenv.bat
/nuttx
/nuttx.*
/nuttx-*
/_SAVED_APPS_config
/*.map
/*.elf
/*.srec
/*.bin
/*.ihx
/*.hex
/pcode
/tags
/.settings/
/.cproject
/.project
.depend
Make.dep
*.o
*.a
*.d
*.i
*~
.swp
.*.swp
core
.gdbinit
cscope.out
/.config
/.config.old
/.version
/Make.defs
/setenv.sh
/setenv.bat
/nuttx
/nuttx.*
/nuttx-*
/_SAVED_APPS_config
/*.map
/*.elf
/*.srec
/*.bin
/*.ihx
/*.hex
/pcode
/tags

22
arch/arm/src/stm32l4/Make.defs
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@ -132,6 +132,28 @@ ifeq ($(CONFIG_STM32L4_DMA),y)
CHIP_CSRCS += stm32l4_dma.c
endif
ifeq ($(CONFIG_USBDEV),y)
ifeq ($(CONFIG_STM32L4_OTGFS),y)
CHIP_CSRCS += stm32l4_otgfsdev.c
endif
endif
ifeq ($(CONFIG_USBHOST),y)
ifeq ($(CONFIG_STM32L4_OTGFS),y)
CHIP_CSRCS += stm32l4_otgfshost.c
endif
endif
ifeq ($(CONFIG_USBHOST),y)
ifeq ($(CONFIG_USBHOST_TRACE),y)
CHIP_CSRCS += stm32l4_usbhost_trace.c
else
ifeq ($(CONFIG_DEBUG_USB),y)
CHIP_CSRCS += stm32l4_usbhost_trace.c
endif
endif
endif
ifeq ($(CONFIG_STM32L4_PWR),y)
CHIP_CSRCS += stm32l4_exti_pwr.c
endif

13
arch/arm/src/stm32l4/README.txt
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@ -1,5 +1,5 @@
This is a port of NuttX to the STM32L4 Family
Used development board is the Nucleo L476RG
Used development board is the Nucleo L476RG, STM32L4VGDiscovery
The status is HIGHLY EXPERIMENTAL.
@ -16,22 +16,23 @@ IRQs : OK
GPIO : OK
EXTI : OK, to be tested.
HSI : OK
HSE : To be tested
HSE : OK
PLL : Works @ 80 MHz
MSI : TODO
LSE : works, but TODO autotrim of MSI, etc
MSI : OK
LSE : OK
RCC : All registers defined, peripherals enabled, basic clock working
SYSCTL : All registers defined
USART : Working in normal mode (no DMA, to be tested, code is written)
DMA : works; at least tested with QSPI
SRAM2 : Should work with enough MM regions
SRAM2 : OK; can be included in MM region or left separate for special app purposes
FIREWALL : Code written, to be tested, requires support from ldscript
SPI : Code written, to be tested, including DMA
I2C : Registers defined
RTC : works
QSPI : works in polling, interrupt, DMA, and also memory-mapped modes
CAN : TODO
OTGFS : TODO
OTGFS : dev implemented, tested, outstanding issue with CDCACM (ACM_SET_LINE_CODING, but otherwise works);
: host implemented, only build smoke-tested (i.e. builds, but no functional testing yet)
Timers : TODO
PM : TODO, PWR registers defined
FSMC : TODO

2
arch/arm/src/stm32l4/chip/stm32l4_memorymap.h
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@ -175,7 +175,7 @@
#define STM32L4_RNG_BASE 0x50060800
#define STM32L4_AES_BASE 0x50060000
#define STM32L4_ADC_BASE 0x50040000
#define STM32L4_OTG_FS_BASE 0x50000000
#define STM32L4_OTGFS_BASE 0x50000000
#define STM32L4_GPIOH_BASE 0x50001c00
#define STM32L4_GPIOG_BASE 0x48001800
#define STM32L4_GPIOF_BASE 0x48001400

1162
arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h Normal file
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36
arch/arm/src/stm32l4/chip/stm32l4x6xx_pinmap.h
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@ -350,27 +350,27 @@
/* OTG FS */
#define GPIO_OTG_FS_SOF (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN8)
#define GPIO_OTG_FS_ID (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN10)
#define GPIO_OTG_FS_DM (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTG_FS_DP (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN12)
#define GPIO_OTG_FS_NOE_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN13)
#define GPIO_OTG_FS_NOE_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN9)
#define GPIO_OTGFS_SOF (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN8)
#define GPIO_OTGFS_ID (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN10)
#define GPIO_OTGFS_DM (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTGFS_DP (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN12)
#define GPIO_OTGFS_NOE_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN13)
#define GPIO_OTGFS_NOE_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN9)
/* QUADSPI */
#define GPIO_QSPI_NCS_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN11)
#define GPIO_QSPI_NCS_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN11)
#define GPIO_QSPI_CLK_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN10)
#define GPIO_QSPI_CLK_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN10)
#define GPIO_QSPI_BK1_IO0_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN1)
#define GPIO_QSPI_BK1_IO0_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN12)
#define GPIO_QSPI_BK1_IO1_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN0)
#define GPIO_QSPI_BK1_IO1_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN13)
#define GPIO_QSPI_BK1_IO2_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN7)
#define GPIO_QSPI_BK1_IO2_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN14)
#define GPIO_QSPI_BK1_IO3_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN6)
#define GPIO_QSPI_BK1_IO3_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN15)
#define GPIO_QSPI_NCS_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN11)
#define GPIO_QSPI_NCS_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN11)
#define GPIO_QSPI_CLK_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN10)
#define GPIO_QSPI_CLK_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN10)
#define GPIO_QSPI_BK1_IO0_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN1)
#define GPIO_QSPI_BK1_IO0_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN12)
#define GPIO_QSPI_BK1_IO1_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN0)
#define GPIO_QSPI_BK1_IO1_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN13)
#define GPIO_QSPI_BK1_IO2_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN7)
#define GPIO_QSPI_BK1_IO2_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN14)
#define GPIO_QSPI_BK1_IO3_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN6)
#define GPIO_QSPI_BK1_IO3_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN15)
/* RTC */

129
arch/arm/src/stm32l4/stm32l4_otgfs.h Normal file
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@ -0,0 +1,129 @@
/************************************************************************************
* arch/arm/src/stm32l4/stm32l4_otgfs.h
*
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_OTGFS_H
#define __ARCH_ARM_SRC_STM32L4_STM32L4_OTGFS_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include "stm32l4.h"
#include "chip/stm32l4x6xx_otgfs.h"
#if defined(CONFIG_STM32L4_OTGFS)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
#ifndef CONFIG_OTGFS_PRI
# define CONFIG_OTGFS_PRI NVIC_SYSH_PRIORITY_DEFAULT
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: stm32l4_otgfshost_initialize
*
* Description:
* Initialize USB host device controller hardware.
*
* Input Parameters:
* controller -- If the device supports more than USB host controller, then
* this identifies which controller is being initialized. Normally, this
* is just zero.
*
* Returned Value:
* And instance of the USB host interface. The controlling task should
* use this interface to (1) call the wait() method to wait for a device
* to be connected, and (2) call the enumerate() method to bind the device
* to a class driver.
*
* Assumptions:
* - This function should called in the initialization sequence in order
* to initialize the USB device functionality.
* - Class drivers should be initialized prior to calling this function.
* Otherwise, there is a race condition if the device is already connected.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
struct usbhost_connection_s;
FAR struct usbhost_connection_s *stm32l4_otgfshost_initialize(int controller);
#endif
/************************************************************************************
* Name: stm32l4_usbsuspend
*
* Description:
* Board logic must provide the stm32l4_usbsuspend logic if the OTG FS device driver
* is used. This function is called whenever the USB enters or leaves suspend
* mode. This is an opportunity for the board logic to shutdown clocks, power,
* etc. while the USB is suspended.
*
************************************************************************************/
void stm32l4_usbsuspend(FAR struct usbdev_s *dev, bool resume);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_STM32_OTGFS */
#endif /* __ARCH_ARM_SRC_STM32_STM32_OTGFS_H */

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arch/arm/src/stm32l4/stm32l4_otgfsdev.c Normal file
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arch/arm/src/stm32l4/stm32l4_otgfshost.c Normal file
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48
arch/arm/src/stm32l4/stm32l4_pwr.c
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@ -138,7 +138,7 @@ bool stm32l4_pwr_enablebkp(bool writable)
uint16_t regval;
bool waswritable;
/* Get the current state of the STM32 PWR control register */
/* Get the current state of the STM32L4 PWR control register 1 */
regval = stm32l4_pwr_getreg(STM32L4_PWR_CR1_OFFSET);
waswritable = ((regval & PWR_CR1_DBP) != 0);
@ -166,3 +166,49 @@ bool stm32l4_pwr_enablebkp(bool writable)
return waswritable;
}
/************************************************************************************
* Name: stm32l4_pwr_enableusv
*
* Description:
* Enables or disables the USB Supply Valid monitoring. Setting this bit is
* mandatory to use the USB OTG FS peripheral.
*
* Input Parameters:
* set - True: Vddusb is valid; False: Vddusb is not present. Logical and electrical
* isolation is applied to ignore this supply.
*
* Returned Value:
* True: The bit was previously set.
*
************************************************************************************/
bool stm32l4_pwr_enableusv(bool set)
{
uint16_t regval;
bool wasset;
/* Get the current state of the STM32L4 PWR control register 2 */
regval = stm32l4_pwr_getreg(STM32L4_PWR_CR2_OFFSET);
wasset = ((regval & PWR_CR2_USV) != 0);
/* Enable or disable the ability to write */
if (wasset && !set)
{
/* Disable the Vddusb monitoring */
regval &= ~PWR_CR2_USV;
stm32l4_pwr_putreg(STM32L4_PWR_CR2_OFFSET, regval);
}
else if (!wasset && set)
{
/* Enable the Vddusb monitoring */
regval |= PWR_CR2_USV;
stm32l4_pwr_putreg(STM32L4_PWR_CR2_OFFSET, regval);
}
return wasset;
}

18
arch/arm/src/stm32l4/stm32l4_pwr.h
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@ -101,6 +101,24 @@ bool stm32l4_pwr_enableclk(bool enable);
bool stm32l4_pwr_enablebkp(bool writable);
/************************************************************************************
* Name: stm32l4_pwr_enableusv
*
* Description:
* Enables or disables the USB Supply Valid monitoring. Setting this bit is
* mandatory to use the USB OTG FS peripheral.
*
* Input Parameters:
* set - True: Vddusb is valid; False: Vddusb is not present. Logical and electrical
* isolation is applied to ignore this supply.
*
* Returned Value:
* True: The bit was previously set.
*
************************************************************************************/
bool stm32l4_pwr_enableusv(bool set);
#undef EXTERN
#if defined(__cplusplus)
}

212
arch/arm/src/stm32l4/stm32l4_usbhost.h Normal file
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@ -0,0 +1,212 @@
/************************************************************************************
* arch/arm/src/stm32l4/stm32l4_usbhost.h
*
* Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_USBHOST_H
#define __ARCH_ARM_SRC_STM32L4_STM32L4_USBHOST_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbhost_trace.h>
#include <stdint.h>
#include "chip.h"
#include "chip/stm32l4x6xx_otgfs.h"
#if defined(CONFIG_STM32L4_OTGFS) && defined(CONFIG_USBHOST)
/************************************************************************************
* Public Types
************************************************************************************/
#ifdef HAVE_USBHOST_TRACE
enum usbhost_trace1codes_e
{
__TRACE1_BASEVALUE = 0, /* This will force the first value to be 1 */
OTGFS_TRACE1_DEVDISCONN, /* OTGFS ERROR: Host Port Device disconnected */
OTGFS_TRACE1_IRQATTACH, /* OTGFS ERROR: Failed to attach IRQ */
OTGFS_TRACE1_TRNSFRFAILED, /* OTGFS ERROR: Host Port Transfer Failed */
OTGFS_TRACE1_SENDSETUP, /* OTGFS ERROR: sendsetup() failed with: */
OTGFS_TRACE1_SENDDATA, /* OTGFS ERROR: senddata() failed with: */
OTGFS_TRACE1_RECVDATA, /* OTGFS ERROR: recvdata() failed with: */
#ifdef HAVE_USBHOST_TRACE_VERBOSE
OTGFS_VTRACE1_CONNECTED, /* OTGFS Host Port connected */
OTGFS_VTRACE1_DISCONNECTED, /* OTGFS Host Port disconnected */
OTGFS_VTRACE1_GINT, /* OTGFS Handling Interrupt. Entry Point */
OTGFS_VTRACE1_GINT_SOF, /* OTGFS Handle the start of frame interrupt */
OTGFS_VTRACE1_GINT_RXFLVL, /* OTGFS Handle the RxFIFO non-empty interrupt */
OTGFS_VTRACE1_GINT_NPTXFE, /* OTGFS Handle the non-periodic TxFIFO empty interrupt */
OTGFS_VTRACE1_GINT_PTXFE, /* OTGFS Handle the periodic TxFIFO empty interrupt */
OTGFS_VTRACE1_GINT_HC, /* OTGFS Handle the host channels interrupt */
OTGFS_VTRACE1_GINT_HPRT, /* OTGFS Handle the host port interrupt */
OTGFS_VTRACE1_GINT_HPRT_POCCHNG, /* OTGFS HPRT: Port Over-Current Change*/
OTGFS_VTRACE1_GINT_HPRT_PCDET, /* OTGFS HPRT: Port Connect Detect */
OTGFS_VTRACE1_GINT_HPRT_PENCHNG, /* OTGFS HPRT: Port Enable Changed */
OTGFS_VTRACE1_GINT_HPRT_LSDEV, /* OTGFS HPRT: Low Speed Device Connected */
OTGFS_VTRACE1_GINT_HPRT_FSDEV, /* OTGFS HPRT: Full Speed Device Connected */
OTGFS_VTRACE1_GINT_HPRT_LSFSSW, /* OTGFS HPRT: Host Switch: LS -> FS */
OTGFS_VTRACE1_GINT_HPRT_FSLSSW, /* OTGFS HPRT: Host Switch: FS -> LS */
OTGFS_VTRACE1_GINT_DISC, /* OTGFS Handle the disconnect detected interrupt */
OTGFS_VTRACE1_GINT_IPXFR, /* OTGFS Handle the incomplete periodic transfer */
#endif
__TRACE1_NSTRINGS, /* Separates the format 1 from the format 2 strings */
OTGFS_TRACE2_CLIP, /* OTGFS CLIP: chidx: buflen: */
#ifdef HAVE_USBHOST_TRACE_VERBOSE
OTGFS_VTRACE2_CHANWAKEUP_IN, /* OTGFS IN Channel wake up with result */
OTGFS_VTRACE2_CHANWAKEUP_OUT, /* OTGFS OUT Channel wake up with result */
OTGFS_VTRACE2_CTRLIN, /* OTGFS CTRLIN */
OTGFS_VTRACE2_CTRLOUT, /* OTGFS CTRLOUT */
OTGFS_VTRACE2_INTRIN, /* OTGFS INTRIN */
OTGFS_VTRACE2_INTROUT, /* OTGFS INTROUT */
OTGFS_VTRACE2_BULKIN, /* OTGFS BULKIN */
OTGFS_VTRACE2_BULKOUT, /* OTGFS BULKOUT */
OTGFS_VTRACE2_ISOCIN, /* OTGFS ISOCIN */
OTGFS_VTRACE2_ISOCOUT, /* OTGFS ISOCOUT */
OTGFS_VTRACE2_STARTTRANSFER, /* OTGFS EP buflen */
OTGFS_VTRACE2_CHANCONF_CTRL_IN,
OTGFS_VTRACE2_CHANCONF_CTRL_OUT,
OTGFS_VTRACE2_CHANCONF_INTR_IN,
OTGFS_VTRACE2_CHANCONF_INTR_OUT,
OTGFS_VTRACE2_CHANCONF_BULK_IN,
OTGFS_VTRACE2_CHANCONF_BULK_OUT,
OTGFS_VTRACE2_CHANCONF_ISOC_IN,
OTGFS_VTRACE2_CHANCONF_ISOC_OUT,
OTGFS_VTRACE2_CHANHALT, /* Channel halted. chidx: , reason: */
#endif
__TRACE2_NSTRINGS /* Total number of enumeration values */
};
# define TRACE1_FIRST ((int)__TRACE1_BASEVALUE + 1)
# define TRACE1_INDEX(id) ((int)(id) - TRACE1_FIRST)
# define TRACE1_NSTRINGS TRACE1_INDEX(__TRACE1_NSTRINGS)
# define TRACE2_FIRST ((int)__TRACE1_NSTRINGS + 1)
# define TRACE2_INDEX(id) ((int)(id) - TRACE2_FIRST)
# define TRACE2_NSTRINGS TRACE2_INDEX(__TRACE2_NSTRINGS)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/*
* STM32L4 USB OTG FS Host Driver Support
*
* Pre-requisites
*
* CONFIG_USBHOST - Enable general USB host support
* CONFIG_STM32L4_OTGFS - Enable the STM32 USB OTG FS block
* CONFIG_STM32L4_SYSCFG - Needed
*
* Options:
*
* CONFIG_STM32L4_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
* Default 128 (512 bytes)
* CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
* in 32-bit words. Default 96 (384 bytes)
* CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
* words. Default 96 (384 bytes)
* CONFIG_STM32L4_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
* want to do that?
*
* CONFIG_STM32L4_USBHOST_REGDEBUG - Enable very low-level register access
* debug. Depends on CONFIG_DEBUG.
*/
/************************************************************************************
* Public Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/***********************************************************************************
* Name: stm32l4_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be provided be
* each platform that implements the STM32L4 OTG FS host interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* control and status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and the core
* clears this bit on an over current condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface. Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
***********************************************************************************/
void stm32l4_usbhost_vbusdrive(int iface, bool enable);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_STM32L4_OTGFS && CONFIG_USBHOST */
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_USBHOST_H */

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arch/arm/src/stm32l4/stm32l4_usbhost_trace.c Normal file
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@ -0,0 +1,189 @@
/********************************************************************************************
* arch/arm/src/stm32l4/stm32l4_usbhost_trace.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
/********************************************************************************************
* Included Files
********************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <assert.h>
#include "stm32l4_usbhost.h"
#ifdef HAVE_USBHOST_TRACE
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
#define TR_FMT1 false
#define TR_FMT2 true
#define TRENTRY(id,fmt1,string) {string}
#ifndef NULL
# define NULL ((FAR void *)0)
#endif
/********************************************************************************************
* Private Types
********************************************************************************************/
struct stm32l4_usbhost_trace_s
{
#if 0
uint16_t id;
bool fmt2;
#endif
FAR const char *string;
};
/********************************************************************************************
* Private Data
********************************************************************************************/
static const struct stm32l4_usbhost_trace_s g_trace1[TRACE1_NSTRINGS] =
{
TRENTRY(OTGFS_TRACE1_DEVDISCONN, TR_FMT1, "OTGFS ERROR: Host Port %d. Device disconnected\n"),
TRENTRY(OTGFS_TRACE1_IRQATTACH, TR_FMT1, "OTGFS ERROR: Failed to attach IRQ\n"),
TRENTRY(OTGFS_TRACE1_TRNSFRFAILED, TR_FMT1, "OTGFS ERROR: Transfer Failed. ret=%d\n"),
TRENTRY(OTGFS_TRACE1_SENDSETUP, TR_FMT1, "OTGFS ERROR: ctrl_sendsetup() failed with: %d\n"),
TRENTRY(OTGFS_TRACE1_SENDDATA, TR_FMT1, "OTGFS ERROR: ctrl_senddata() failed with: %d\n"),
TRENTRY(OTGFS_TRACE1_RECVDATA, TR_FMT1, "OTGFS ERROR: ctrl_recvdata() failed with: %d\n"),
#ifdef HAVE_USBHOST_TRACE_VERBOSE
TRENTRY(OTGFS_VTRACE1_CONNECTED, TR_FMT1, "OTGFS Host Port %d connected.\n"),
TRENTRY(OTGFS_VTRACE1_DISCONNECTED, TR_FMT1, "OTGFS Host Port %d disconnected.\n"),
TRENTRY(OTGFS_VTRACE1_GINT, TR_FMT1, "OTGFS Handling Interrupt. Entry Point.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_SOF, TR_FMT1, "OTGFS Handle the start of frame interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_RXFLVL, TR_FMT1, "OTGFS Handle the RxFIFO non-empty interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_NPTXFE, TR_FMT1, "OTGFS Handle the non-periodic TxFIFO empty interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_PTXFE, TR_FMT1, "OTGFS Handle the periodic TxFIFO empty interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HC, TR_FMT1, "OTGFS Handle the host channels interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT, TR_FMT1, "OTGFS Handle the host port interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT_POCCHNG, TR_FMT1, "OTGFS HPRT: Port Over-Current Change.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT_PCDET, TR_FMT1, "OTGFS HPRT: Port Connect Detect.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT_PENCHNG, TR_FMT1, "OTGFS HPRT: Port Enable Changed.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT_LSDEV, TR_FMT1, "OTGFS HPRT: Low Speed Device Connected.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT_FSDEV, TR_FMT1, "OTGFS HPRT: Full Speed Device Connected.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT_LSFSSW, TR_FMT1, "OTGFS HPRT: Host Switch: LS -> FS.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_HPRT_FSLSSW, TR_FMT1, "OTGFS HPRT: Host Switch: FS -> LS.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_DISC, TR_FMT1, "OTGFS Handle the disconnect detected interrupt.\n"),
TRENTRY(OTGFS_VTRACE1_GINT_IPXFR, TR_FMT1, "OTGFS Handle the incomplete periodic transfer.\n"),
#endif
};
static const struct stm32l4_usbhost_trace_s g_trace2[TRACE2_NSTRINGS] =
{
TRENTRY(OTGFS_TRACE2_CLIP, TR_FMT2, "OTGFS CLIP: chidx: %d buflen: %d\n"),
#ifdef HAVE_USBHOST_TRACE_VERBOSE
TRENTRY(OTGFS_VTRACE2_CHANWAKEUP_IN, TR_FMT2, "OTGFS EP%d(IN) wake up with result: %d\n"),
TRENTRY(OTGFS_VTRACE2_CHANWAKEUP_OUT, TR_FMT2, "OTGFS EP%d(OUT) wake up with result: %d\n"),
TRENTRY(OTGFS_VTRACE2_CTRLIN, TR_FMT2, "OTGFS CTRL_IN type: %02x req: %02x\n"),
TRENTRY(OTGFS_VTRACE2_CTRLOUT, TR_FMT2, "OTGFS CTRL_OUT type: %02x req: %02x\n"),
TRENTRY(OTGFS_VTRACE2_INTRIN, TR_FMT2, "OTGFS INTR_IN chidx: %02x len: %02x\n"),
TRENTRY(OTGFS_VTRACE2_INTROUT, TR_FMT2, "OTGFS INTR_OUT chidx: %02x len: %02x\n"),
TRENTRY(OTGFS_VTRACE2_BULKIN, TR_FMT2, "OTGFS BULK_IN chidx: %02x len: %02x\n"),
TRENTRY(OTGFS_VTRACE2_BULKOUT, TR_FMT2, "OTGFS BULK_OUT chidx: %02x len: %02x\n"),
TRENTRY(OTGFS_VTRACE2_ISOCIN, TR_FMT2, "OTGFS ISOC_IN chidx: %02x len: %04d\n"),
TRENTRY(OTGFS_VTRACE2_ISOCOUT, TR_FMT2, "OTGFS ISOC_OUT chidx: %02x req: %02x\n"),
TRENTRY(OTGFS_VTRACE2_STARTTRANSFER, TR_FMT2, "OTGFS Transfer chidx: %d buflen: %d\n"),
TRENTRY(OTGFS_VTRACE2_CHANCONF_CTRL_IN, TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,IN ,CTRL)\n"),
TRENTRY(OTGFS_VTRACE2_CHANCONF_CTRL_OUT, TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,OUT,CTRL)\n"),
TRENTRY(OTGFS_VTRACE2_CHANCONF_INTR_IN, TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,IN ,INTR)\n"),
TRENTRY(OTGFS_VTRACE2_CHANCONF_INTR_OUT, TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,OUT,INTR)\n"),
TRENTRY(OTGFS_VTRACE2_CHANCONF_BULK_IN, TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,IN ,BULK)\n"),
TRENTRY(OTGFS_VTRACE2_CHANCONF_BULK_OUT, TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,OUT,BULK)\n"),
TRENTRY(OTGFS_VTRACE2_CHANCONF_ISOC_IN, TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,IN ,ISOC)\n"),
TRENTRY(OTGFS_VTRACE2_CHANCONF_ISOC_OUT, TR_FMT2, "OTGFS Channel configured. chidx: %d: (EP%d,OUT,ISOC)\n"),
TRENTRY(OTGFS_VTRACE2_CHANHALT, TR_FMT2, "OTGFS Channel halted. chidx: %d, reason: %d\n"),
#endif
};
/********************************************************************************************
* Private Function Prototypes
********************************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
/********************************************************************************************
* Name: usbhost_trformat1 and usbhost_trformat2
*
* Description:
* This interface must be provided by platform specific logic that knows
* the HCDs encoding of USB trace data.
*
* Given an 9-bit index, return a format string suitable for use with, say,
* printf. The returned format is expected to handle two unsigned integer
* values.
*
********************************************************************************************/
FAR const char *usbhost_trformat1(uint16_t id)
{
int ndx = TRACE1_INDEX(id);
if (ndx < TRACE1_NSTRINGS)
{
return g_trace1[ndx].string;
}
return NULL;
}
FAR const char *usbhost_trformat2(uint16_t id)
{
int ndx = TRACE2_INDEX(id);
if (ndx < TRACE2_NSTRINGS)
{
return g_trace2[ndx].string;
}
return NULL;
}
#endif /* HAVE_USBHOST_TRACE */

4
configs/sim/include/.gitignore vendored
View File

@ -1,2 +1,2 @@
/etc
/romfs_img
/etc
/romfs_img

116
configs/stm32l476vg-disco/nsh/defconfig
View File

@ -74,6 +74,7 @@ CONFIG_DEBUG_FEATURES=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_DEBUG_RTC is not set
# CONFIG_DEBUG_SPI is not set
CONFIG_DEBUG_USB=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
@ -228,7 +229,7 @@ CONFIG_STM32L4_DMA2=y
#
# AHB2 Peripherals
#
# CONFIG_STM32L4_OTGFS is not set
CONFIG_STM32L4_OTGFS=y
# CONFIG_STM32L4_ADC1 is not set
# CONFIG_STM32L4_ADC2 is not set
# CONFIG_STM32L4_ADC3 is not set
@ -342,6 +343,7 @@ CONFIG_ARCH_HAVE_RESET=y
# CONFIG_ARCH_USE_MPU is not set
# CONFIG_ARCH_IRQPRIO is not set
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_USBDUMP=y
# CONFIG_ENDIAN_BIG is not set
# CONFIG_ARCH_IDLE_CUSTOM is not set
# CONFIG_ARCH_HAVE_RAMFUNCS is not set
@ -384,6 +386,8 @@ CONFIG_RAM_SIZE=98304
# CONFIG_ARCH_BOARD_NUCLEO_L476RG is not set
CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y
# CONFIG_ARCH_BOARD_CUSTOM is not set
CONFIG_ARCH_BOARD_CUSTOM_DIR="configs/dummy"
CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
CONFIG_ARCH_BOARD="stm32l476vg-disco"
#
@ -395,15 +399,16 @@ CONFIG_ARCH_HAVE_BUTTONS=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_HAVE_IRQBUTTONS=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_NSH_MMCSDMINOR=0
#
# Board-Specific Options
#
# CONFIG_BOARD_CRASHDUMP is not set
CONFIG_LIB_BOARDCTL=y
# CONFIG_BOARDCTL_RESET is not set
CONFIG_BOARDCTL_UNIQUEID=y
CONFIG_BOARDCTL_UNIQUEID_SIZE=12
CONFIG_BOARDCTL_USBDEVCTRL=y
# CONFIG_BOARDCTL_TSCTEST is not set
# CONFIG_BOARDCTL_ADCTEST is not set
# CONFIG_BOARDCTL_PWMTEST is not set
@ -560,7 +565,12 @@ CONFIG_RTC_IOCTL=y
# CONFIG_VIDEO_DEVICES is not set
# CONFIG_BCH is not set
# CONFIG_INPUT is not set
#
# IO Expander/GPIO Support
#
# CONFIG_IOEXPANDER is not set
# CONFIG_DEV_GPIO is not set
#
# LCD Driver Support
@ -620,7 +630,7 @@ CONFIG_N25QXXX_SECTOR512=y
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_SERIAL_REMOVABLE is not set
CONFIG_SERIAL_REMOVABLE=y
CONFIG_SERIAL_CONSOLE=y
# CONFIG_16550_UART is not set
# CONFIG_UART_SERIALDRIVER is not set
@ -668,7 +678,50 @@ CONFIG_USART2_2STOP=0
# CONFIG_USART2_IFLOWCONTROL is not set
# CONFIG_USART2_OFLOWCONTROL is not set
# CONFIG_USART2_DMA is not set
# CONFIG_USBDEV is not set
CONFIG_USBDEV=y
#
# USB Device Controller Driver Options
#
# CONFIG_USBDEV_ISOCHRONOUS is not set
# CONFIG_USBDEV_DUALSPEED is not set
CONFIG_USBDEV_SELFPOWERED=y
# CONFIG_USBDEV_BUSPOWERED is not set
CONFIG_USBDEV_MAXPOWER=100
# CONFIG_USBDEV_DMA is not set
# CONFIG_ARCH_USBDEV_STALLQUEUE is not set
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=128
CONFIG_USBDEV_TRACE_STRINGS=y
CONFIG_USBDEV_TRACE_INITIALIDSET=y
#
# USB Device Class Driver Options
#
# CONFIG_USBDEV_COMPOSITE is not set
# CONFIG_PL2303 is not set
CONFIG_CDCACM=y
# CONFIG_CDCACM_CONSOLE is not set
CONFIG_CDCACM_EP0MAXPACKET=64
CONFIG_CDCACM_EPINTIN=1
CONFIG_CDCACM_EPINTIN_FSSIZE=64
CONFIG_CDCACM_EPINTIN_HSSIZE=64
CONFIG_CDCACM_EPBULKOUT=3
CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
CONFIG_CDCACM_NRDREQS=4
CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=257
CONFIG_CDCACM_TXBUFSIZE=193
CONFIG_CDCACM_VENDORID=0x0525
CONFIG_CDCACM_PRODUCTID=0xa4a7
CONFIG_CDCACM_VENDORSTR="NuttX"
CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
# CONFIG_USBMSC is not set
# CONFIG_USBHOST is not set
# CONFIG_DRIVERS_WIRELESS is not set
@ -745,7 +798,7 @@ CONFIG_FS_PROCFS_REGISTER=y
# Memory Management
#
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=1
CONFIG_MM_REGIONS=2
# CONFIG_ARCH_HAVE_HEAP2 is not set
# CONFIG_GRAN is not set
@ -873,10 +926,10 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7"
# CONFIG_EXAMPLES_FTPD is not set
# CONFIG_EXAMPLES_HELLO is not set
# CONFIG_EXAMPLES_HELLOXX is not set
# CONFIG_EXAMPLES_HIDKBD is not set
# CONFIG_EXAMPLES_IGMP is not set
# CONFIG_EXAMPLES_JSON is not set
# CONFIG_EXAMPLES_HIDKBD is not set
# CONFIG_EXAMPLES_KEYPADTEST is not set
# CONFIG_EXAMPLES_IGMP is not set
CONFIG_EXAMPLES_MEDIA=y
CONFIG_EXAMPLES_MEDIA_DEVPATH="/dev/mtd0"
CONFIG_EXAMPLES_MEDIA_BLOCKSIZE=512
@ -889,17 +942,17 @@ CONFIG_EXAMPLES_NSH=y
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXTERM is not set
# CONFIG_EXAMPLES_NXFFS is not set
# CONFIG_EXAMPLES_NXHELLO is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTERM is not set
# CONFIG_EXAMPLES_NXTEXT is not set
# CONFIG_EXAMPLES_OSTEST is not set
# CONFIG_EXAMPLES_PCA9635 is not set
# CONFIG_EXAMPLES_PIPE is not set
# CONFIG_EXAMPLES_POSIXSPAWN is not set
# CONFIG_EXAMPLES_PPPD is not set
# CONFIG_EXAMPLES_POSIXSPAWN is not set
# CONFIG_EXAMPLES_RANDOM is not set
# CONFIG_EXAMPLES_RGBLED is not set
# CONFIG_EXAMPLES_RGMP is not set
@ -909,24 +962,37 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_SERIALRX is not set
# CONFIG_EXAMPLES_SERLOOP is not set
# CONFIG_EXAMPLES_SLCD is not set
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_SMART_TEST is not set
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_SMP is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_THTTPD is not set
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
# CONFIG_EXAMPLES_UNIONFS is not set
# CONFIG_EXAMPLES_USBSERIAL is not set
CONFIG_EXAMPLES_USBSERIAL=y
CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y
CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y
CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y
CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y
CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
CONFIG_EXAMPLES_USBSERIAL2=y
CONFIG_EXAMPLES_USBSERIAL2_BUFSIZE=512
CONFIG_EXAMPLES_USBSERIAL2_BUFSIZE=512
CONFIG_EXAMPLES_USBSERIAL2_TRACEINIT=y
CONFIG_EXAMPLES_USBSERIAL2_TRACECLASS=y
CONFIG_EXAMPLES_USBSERIAL2_TRACETRANSFERS=y
CONFIG_EXAMPLES_USBSERIAL2_TRACECONTROLLER=y
CONFIG_EXAMPLES_USBSERIAL2_TRACEINTERRUPTS=y
#
# File System Utilities
#
# CONFIG_FSUTILS_FLASH_ERASEALL is not set
# CONFIG_FSUTILS_INIFILE is not set
# CONFIG_FSUTILS_PASSWD is not set
@ -946,8 +1012,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
#
# CONFIG_INTERPRETERS_BAS is not set
# CONFIG_INTERPRETERS_FICL is not set
# CONFIG_INTERPRETERS_MICROPYTHON is not set
# CONFIG_INTERPRETERS_PCODE is not set
# CONFIG_INTERPRETERS_MICROPYTHON is not set
#
# FreeModBus
@ -978,7 +1044,7 @@ CONFIG_NSH_LINELEN=64
# CONFIG_NSH_DISABLE_SEMICOLON is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_NSH_MAXARGUMENTS=6
# CONFIG_NSH_ARGCAT is not set
CONFIG_NSH_ARGCAT=y
CONFIG_NSH_NESTDEPTH=3
# CONFIG_NSH_DISABLEBG is not set
CONFIG_NSH_BUILTIN_APPS=y
@ -1050,6 +1116,7 @@ CONFIG_NSH_FILEIOSIZE=512
# CONFIG_NSH_DISABLESCRIPT is not set
# CONFIG_NSH_DISABLE_ITEF is not set
# CONFIG_NSH_DISABLE_LOOPS is not set
CONFIG_NSH_MMCSDMINOR=0
CONFIG_NSH_ROMFSETC=y
# CONFIG_NSH_ROMFSRC is not set
CONFIG_NSH_ROMFSMOUNTPT="/etc"
@ -1064,7 +1131,18 @@ CONFIG_NSH_ARCHROMFS=y
# Console Configuration
#
CONFIG_NSH_CONSOLE=y
# CONFIG_NSH_USBCONSOLE is not set
# CONFIG_NSH_ALTCONDEV is not set
#
# USB Device Trace Support
#
CONFIG_NSH_USBDEV_TRACE=y
CONFIG_NSH_USBDEV_TRACEINIT=y
CONFIG_NSH_USBDEV_TRACECLASS=y
CONFIG_NSH_USBDEV_TRACETRANSFERS=y
CONFIG_NSH_USBDEV_TRACECONTROLLER=y
CONFIG_NSH_USBDEV_TRACEINTERRUPTS=y
CONFIG_NSH_ARCHINIT=y
# CONFIG_NSH_LOGIN is not set
# CONFIG_NSH_CONSOLE_LOGIN is not set
@ -1081,13 +1159,14 @@ CONFIG_NSH_ARCHINIT=y
#
# System Libraries and NSH Add-Ons
#
# CONFIG_SYSTEM_FREE is not set
# CONFIG_SYSTEM_CLE is not set
# CONFIG_SYSTEM_CUTERM is not set
# CONFIG_SYSTEM_INSTALL is not set
# CONFIG_SYSTEM_FLASH_ERASEALL is not set
# CONFIG_SYSTEM_FREE is not set
# CONFIG_LIB_HEX2BIN is not set
# CONFIG_SYSTEM_HEXED is not set
# CONFIG_SYSTEM_INSTALL is not set
# CONFIG_SYSTEM_RAMTEST is not set
CONFIG_READLINE_HAVE_EXTMATCH=y
CONFIG_SYSTEM_READLINE=y
@ -1095,6 +1174,9 @@ CONFIG_READLINE_ECHO=y
# CONFIG_READLINE_TABCOMPLETION is not set
# CONFIG_READLINE_CMD_HISTORY is not set
# CONFIG_SYSTEM_SUDOKU is not set
# CONFIG_SYSTEM_UBLOXMODEM is not set
# CONFIG_SYSTEM_VI is not set
# CONFIG_SYSTEM_CDCACM is not set
# CONFIG_SYSTEM_UBLOXMODEM is not set
# CONFIG_SYSTEM_USBMONITOR is not set
# CONFIG_SYSTEM_ZMODEM is not set
CONFIG_SYSTEM_DISCOTEST=y

2
configs/stm32l476vg-disco/src/Makefile
View File

@ -42,7 +42,7 @@ ifeq ($(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG),y)
CSRCS += stm32_clockconfig.c
endif
ifeq ($(CONFIG_STM32_OTGFS),y)
ifeq ($(CONFIG_STM32L4_OTGFS),y)
CSRCS += stm32_usb.c
endif

24
configs/stm32l476vg-disco/src/stm32_appinit.c
View File

@ -259,6 +259,30 @@ FAR struct mtd_dev_s *mtd_temp;
}
#endif
#ifdef HAVE_USBHOST
/* Initialize USB host operation. stm32l4_usbhost_initialize() starts a thread
* will monitor for USB connection and disconnection events.
*/
ret = stm32l4_usbhost_initialize();
if (ret != OK)
{
udbg("ERROR: Failed to initialize USB host: %d\n", ret);
return ret;
}
#endif
#ifdef HAVE_USBMONITOR
/* Start the USB Monitor */
ret = usbmonitor_start(0, NULL);
if (ret != OK)
{
udbg("ERROR: Failed to start USB monitor: %d\n", ret);
return ret;
}
#endif
return OK;
}
#endif /* CONFIG_LIB_BOARDCTL */

8
configs/stm32l476vg-disco/src/stm32_boot.c
View File

@ -81,12 +81,12 @@ void stm32l4_boardinitialize(void)
stm32l4_spiinitialize();
#endif
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
#ifdef CONFIG_STM32L4_OTGFS
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build.
* into the build. Presumably either CONFIG_USBDEV or CONFIG_USBHOST is also
* selected.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
stm32l4_usbinitialize();
#endif
}

336
configs/stm32l476vg-disco/src/stm32_usb.c Normal file
View File

@ -0,0 +1,336 @@
/************************************************************************************
* configs/stm32f4discovery/src/stm32_usb.c
*
* Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "up_arch.h"
#include "stm32l4.h"
#include "stm32l4_otgfs.h"
#include "stm32l476vg-disco.h"
#ifdef CONFIG_STM32L4_OTGFS
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
# define HAVE_USB 1
#else
# warning "CONFIG_STM32L4_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
# undef HAVE_USB
#endif
#ifndef CONFIG_STM32L4DISCO_USBHOST_PRIO
# define CONFIG_STM32L4DISCO_USBHOST_PRIO 100
#endif
#ifndef CONFIG_STM32L4DISCO_USBHOST_STACKSIZE
# define CONFIG_STM32L4DISCO_USBHOST_STACKSIZE 1024
#endif
/************************************************************************************
* Private Data
************************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
************************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
uvdbg("Running\n");
for (;;)
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
(void)CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32l4_usbinitialize
*
* Description:
* Called from stm32l4_usbinitialize very early in initialization to setup USB-related
* GPIO pins for the STM32L4Discovery board.
*
************************************************************************************/
void stm32l4_usbinitialize(void)
{
/* The OTG FS has an internal soft pull-up. No GPIO configuration is required */
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Over current GPIOs */
#ifdef CONFIG_STM32L4_OTGFS
stm32l4_configgpio(GPIO_OTGFS_VBUS);
stm32l4_configgpio(GPIO_OTGFS_PWRON);
stm32l4_configgpio(GPIO_OTGFS_OVER);
#endif
}
/***********************************************************************************
* Name: stm32l4_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
***********************************************************************************/
#ifdef CONFIG_USBHOST
int stm32l4_usbhost_initialize(void)
{
int pid;
#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || \
defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
int ret;
#endif
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uvdbg("Register class drivers\n");
#ifdef CONFIG_USBHOST_HUB
/* Initialize USB hub class support */
ret = usbhost_hub_initialize();
if (ret < 0)
{
udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
/* Initialize the HID keyboard class */
ret = usbhost_kbdinit();
if (ret != OK)
{
udbg("Failed to register the HID keyboard class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
/* Initialize the HID mouse class */
ret = usbhost_mouse_init();
if (ret != OK)
{
udbg("Failed to register the HID mouse class\n");
}
#endif
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_usbconn = stm32l4_otgfshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
uvdbg("Start usbhost_waiter\n");
pid = task_create("usbhost", CONFIG_STM32L4DISCO_USBHOST_PRIO,
CONFIG_STM32L4DISCO_USBHOST_STACKSIZE,
(main_t)usbhost_waiter, (FAR char * const *)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
/***********************************************************************************
* Name: stm32l4_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be provided be
* each platform that implements the STM32 OTG FS host interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* control and status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and the core
* clears this bit on an over current condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface. Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
***********************************************************************************/
#ifdef CONFIG_USBHOST
void stm32l4_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
if (enable)
{
/* Enable the Power Switch by driving the enable pin low */
stm32l4_gpiowrite(GPIO_OTGFS_PWRON, false);
}
else
{
/* Disable the Power Switch by driving the enable pin high */
stm32l4_gpiowrite(GPIO_OTGFS_PWRON, true);
}
}
#endif
/************************************************************************************
* Name: stm32l4_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an over current condition is
* detected.
*
* Input Parameter:
* handler - New over current interrupt handler
*
* Returned value:
* Old over current interrupt handler
*
************************************************************************************/
#ifdef CONFIG_USBHOST
xcpt_t stm32l4_setup_overcurrent(xcpt_t handler)
{
return stm32l4_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler);
}
#endif
/************************************************************************************
* Name: stm32l4_usbsuspend
*
* Description:
* Board logic must provide the stm32l4_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
*
************************************************************************************/
#ifdef CONFIG_USBDEV
void stm32l4_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32L4_OTGFS */

56
configs/stm32l476vg-disco/src/stm32l476vg-disco.h
View File

@ -59,6 +59,9 @@
#define HAVE_N25QXXX_NXFFS 1
#define HAVE_N25QXXX_SMARTFS 1
#define HAVE_N25QXXX_CHARDEV 1
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
#define HAVE_USBMONITOR 1
#if !defined(CONFIG_FS_PROCFS)
# undef HAVE_PROC
@ -124,6 +127,55 @@
#define PROGMEM_MTD_MINOR 1
/* Can't support USB host or device features if USB OTG FS is not enabled */
#ifndef CONFIG_STM32L4_OTGFS
# undef HAVE_USBDEV
# undef HAVE_USBHOST
# undef HAVE_USBMONITOR
#endif
/* Can't support USB device monitor if USB device is not enabled */
#ifndef CONFIG_USBDEV
# undef HAVE_USBDEV
# undef HAVE_USBMONITOR
#endif
/* Can't support USB host is USB host is not enabled */
#ifndef CONFIG_USBHOST
# undef HAVE_USBHOST
#endif
/* Check if we should enable the USB monitor before starting NSH */
#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
# undef HAVE_USBMONITOR
#endif
/* USB OTG FS
*
* PC11 OTG_FS_VBUS VBUS sensing (also connected to the green LED)
* PC9 OTG_FS_PowerSwitchOn
* PC10 OTG_FS_Overcurrent
*/
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_OPENDRAIN|GPIO_PORTC|GPIO_PIN11)
#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9)
#ifdef CONFIG_USBHOST
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
GPIO_PORTC|GPIO_PIN10)
#else
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10)
#endif
/* LED.
* LD4: the red LED on PB2
* LD5: the green LED on PE8
@ -211,14 +263,14 @@ extern struct spi_dev_s *g_spi2;
void stm32_spiinitialize(void);
/************************************************************************************
* Name: stm32_usbinitialize
* Name: stm32l4_usbinitialize
*
* Description:
* Called to setup USB-related GPIO pins.
*
************************************************************************************/
void stm32_usbinitialize(void);
void stm32l4_usbinitialize(void);
/************************************************************************************
* Name: board_adc_initialize