arch: arm: kl: fix nxstyle errors

Fix nxstyle errors to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea 2021-03-24 09:22:43 +01:00 committed by Xiang Xiao
parent f707d3f78e
commit 63a35488a8
27 changed files with 496 additions and 380 deletions

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@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_CHIP_H
#define __ARCH_ARM_SRC_KL_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@ -31,30 +31,32 @@
#include <arch/kl/chip.h>
/* Define the number of interrupt vectors that need to be supported for this chip */
/* Define the number of interrupt vectors that need to be supported for this
* chip
*/
#define ARMV6M_PERIPHERAL_INTERRUPTS 32
/* Include the memory map file. Other chip hardware files should then include
* this file for the proper setup.
/* Include the memory map file. Other chip hardware files should then
* include this file for the proper setup.
*/
#include "hardware/kl_memorymap.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_CHIP_H */

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@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/k25z128_pinmux.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,28 +16,31 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_KL25PINMUX_H
#define __ARCH_ARM_SRC_KINETIS_KINETIS_KL25PINMUX_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* Reference: Paragraph 10.3.1, p 227, of FreeScale document K40P144M100SF2RM
****************************************************************************/
/* Reference:
* Paragraph 10.3.1, p 227, of FreeScale document K40P144M100SF2RM
*
* In most cases, there are alternative configurations for various pins. Those alternative
* pins are labeled with a suffix like _1, _2, etc. in order to distinguish them. Logic in
* the board.h file must select the correct pin configuration for the board by defining a pin
* configuration (with no suffix) that maps to the correct alternative.
* In most cases, there are alternative configurations for various pins.
* Those alternative pins are labeled with a suffix like _1, _2, etc. in
* order to distinguish them. Logic in the board.h file must select the
* correct pin configuration for the board by defining a pin configuration
* (with no suffix) that maps to the correct alternative.
*/
#define PIN_TSI0_CH1 (PIN_ANALOG | PIN_PORTA | PIN0)
@ -309,16 +312,16 @@
#define PIN_TPM0_CH4_3 (PIN_ALT3 | PIN_PORTE | PIN31)
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_K25PINMUX_H */

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@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_fmc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_FMC_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_FMC_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Register Offsets *****************************************************************/
/* Register Offsets *********************************************************/
#define KL_FMC_PFAPR_OFFSET 0x0000 /* Flash Access Protection Register */
#define KL_FMC_PFB0CR_OFFSET 0x0004 /* Flash Bank 0 Control Register */
@ -152,7 +152,7 @@
#define KL_FMC_DATAW3S7U_OFFSET 0x02f8 /* Cache Data Storage (upper word) */
#define KL_FMC_DATAW3S7L_OFFSET 0x02fc /* Cache Data Storage (lower word) */
/* Register Addresses ***************************************************************/
/* Register Addresses *******************************************************/
#define KL_FMC_PFAPR (KL_FMC_BASE+KL_FMC_PFAPR_OFFSET)
#define KL_FMC_PFB0CR (KL_FMC_BASE+KL_FMC_PFB0CR_OFFSET)
@ -271,9 +271,10 @@
#define KL_FMC_DATAW3S7U (KL_FMC_BASE+KL_FMC_DATAW3S7U_OFFSET)
#define KL_FMC_DATAW3S7L (KL_FMC_BASE+KL_FMC_DATAW3S7L_OFFSET)
/* Register Bit Definitions *********************************************************/
/* Register Bit Definitions *************************************************/
/* Flash Access Protection Register */
/* Access protection bits (all masters) */
#define FMC_PFAPR_NONE 0 /* No access may be performed by this master */
@ -306,6 +307,7 @@
#define FMC_PFAPR_M6PFD (1 << 22) /* Bit 22: Master 6 Prefetch Disable */
#define FMC_PFAPR_M7PFD (1 << 23) /* Bit 23: Master 7 Prefetch Disable */
/* Bits 24-31: Reserved */
/* Flash Bank 0 Control Register */
#define FMC_PFB0CR_B0SEBE (1 << 0) /* Bit 0: Bank 0 Single Entry Buffer Enable */
@ -318,11 +320,13 @@
# define FMC_PFB0CR_CRC_ALL (0 << FMC_PFB0CR_CRC_SHIFT) /* LRU all four ways */
# define FMC_PFB0CR_CRC_I01D23 (2 << FMC_PFB0CR_CRC_SHIFT) /* LRU ifetches 0-1 data 2-3 */
# define FMC_PFB0CR_CRC_I012D3 (3 << FMC_PFB0CR_CRC_SHIFT) /* LRU ifetches 0-3 data 3 */
/* Bits 8-16: Reserved */
/* Bits 8-16: Reserved */
#define FMC_PFB0CR_B0MW_SHIFT (17) /* Bits 17-18: Bank 0 Memory Width */
#define FMC_PFB0CR_B0MW_MASK (3 << FMC_PFB0CR_B0MW_SHIFT)
# define FMC_PFB0CR_B0MW_32BITS (0 << FMC_PFB0CR_B0MW_SHIFT) /* 32 bits */
# define FMC_PFB0CR_B0MW_64BITS (1 << FMC_PFB0CR_B0MW_SHIFT) /* 64 bits */
#define FMC_PFB0CR_S_B_INV (1 << 19) /* Bit 19: Invalidate Prefetch Speculation Buffer */
#define FMC_PFB0CR_CINV_WAY_SHIFT (20) /* Bits 20-23: Cache Invalidate Way x */
#define FMC_PFB0CR_CINV_WAY_MASK (15 << FMC_PFB0CR_CINV_WAY_SHIFT)
@ -338,12 +342,13 @@
#define FMC_PFB1CR_B1DPE (1 << 2) /* Bit 2: Bank 1 Data Prefetch Enable */
#define FMC_PFB1CR_B1ICE (1 << 3) /* Bit 3: Bank 1 Instruction Cache Enable */
#define FMC_PFB1CR_B1DCE (1 << 4) /* Bit 4: Bank 1 Data Cache Enable */
/* Bits 5-16: Reserved */
/* Bits 5-16: Reserved */
#define FMC_PFB1CR_B1MW_SHIFT (17) /* Bits 17-18: Bank 1 Memory Width */
#define FMC_PFB1CR_B1MW_MASK (3 << FMC_PFB1CR_B1MW_SHIFT)
# define FMC_PFB1CR_B1MW_32BITS (0 << FMC_PFB1CR_B1MW_SHIFT) /* 32 bits */
# define FMC_PFB1CR_B1MW_64BITS (1 << FMC_PFB1CR_B1MW_SHIFT) /* 64 bits */
/* Bits 19-27: Reserved */
/* Bits 19-27: Reserved */
#define FMC_PFB1CR_B1RWSC_SHIFT (28) /* Bits 28-31: Bank 1 Read Wait State Control */
#define FMC_PFB1CR_B1RWSC_MASK (15 << FMC_PFB1CR_B0RWSC_SHIFT)
@ -359,16 +364,16 @@
* 64-bit data in two 32-bit registers.
*/
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_FMC_H */

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@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_gpio.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_GPIO_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_GPIO_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
#define KL_GPIO_NPORTS 5
/* Register Offsets *****************************************************************/
/* Register Offsets *********************************************************/
#define KL_GPIO_PDOR_OFFSET 0x0000 /* Port Data Output Register */
#define KL_GPIO_PSOR_OFFSET 0x0004 /* Port Set Output Register */
@ -42,7 +42,7 @@
#define KL_GPIO_PDIR_OFFSET 0x0010 /* Port Data Input Register */
#define KL_GPIO_PDDR_OFFSET 0x0014 /* Port Data Direction Register */
/* Register Addresses ***************************************************************/
/* Register Addresses *******************************************************/
#define KL_GPIO_PDOR(n) (KL_GPIO_BASE(n)+KL_GPIO_PDOR_OFFSET)
#define KL_GPIO_PSOR(n) (KL_GPIO_BASE(n)+KL_GPIO_PSOR_OFFSET)
@ -86,7 +86,7 @@
#define KL_GPIOE_PDIR (KL_GPIOE_BASE+KL_GPIO_PDIR_OFFSET)
#define KL_GPIOE_PDDR (KL_GPIOE_BASE+KL_GPIO_PDDR_OFFSET)
/* Register Bit Definitions *********************************************************/
/* Register Bit Definitions *************************************************/
/* Port Data Output Register */
@ -112,19 +112,19 @@
#define GPIO_PDDR(n) (1 << (n))
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
@ -135,9 +135,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
/****************************************************************************
* Public Function Prototypes
************************************************************************************/
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)

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@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_i2c.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_I2C_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_I2C_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
/* Register Offsets *************************************************************************/
/* Register Offsets *********************************************************/
#define KL_I2C_A1_OFFSET 0x0000 /* I2C Address Register 1 */
#define KL_I2C_F_OFFSET 0x0001 /* I2C Frequency Divider register */
@ -48,7 +48,7 @@
#define KL_I2C_SLTH_OFFSET 0x000a /* I2C SCL Low Timeout Register High */
#define KL_I2C_SLTL_OFFSET 0x000b /* I2C SCL Low Timeout Register Low */
/* Register Addresses ***********************************************************************/
/* Register Addresses *******************************************************/
#define KL_I2C0_A1 (KL_I2C0_BASE+KL_I2C_A1_OFFSET)
#define KL_I2C0_F (KL_I2C0_BASE+KL_I2C_F_OFFSET)
@ -76,9 +76,10 @@
#define KL_I2C1_SLTH (KL_I2C1_BASE+KL_I2C_SLTH_OFFSET)
#define KL_I2C1_SLTL (KL_I2C1_BASE+KL_I2C_SLTL_OFFSET)
/* Register Bit Definitions *****************************************************************/
/* Register Bit Definitions *************************************************/
/* I2C Address Register 1 (8-bit) */
/* Bit 0: Reserved */
#define I2C_A1_SHIFT (1) /* Bits 1-7: Address */
#define I2C_A1_MASK (0x7f << I2C_A1_SHIFT)
@ -128,6 +129,7 @@
#define I2C_C2_GCAEN (1 << 7) /* Bit 7: General call address enable */
/* I2C Programmable Input Glitch Filter register (8-bit) */
/* Bits 5-7: Reserved */
#define I2C_FLT_SHIFT (0) /* Bits 0-4: I2C programmable filter factor */
#define I2C_FLT_MASK (0x1f << I2C_FLT_SHIFT)
@ -136,6 +138,7 @@
#define I2C_FLT_SHEN (1 << 7) /* Bit 7: Stop hold enable */
/* I2C Range Address register (8-bit) */
/* Bit 0: Reserved */
#define I2C_RA_SHIFT (1) /* Bits 1-7: Range slave address */
#define I2C_RA_MASK (0x7f << I2C_RA_SHIFT)
@ -152,22 +155,25 @@
#define I2C_SMB_FACK (1 << 7) /* Bit 7: Fast NACK/ACK enable */
/* I2C Address Register 2 (8-bit) */
/* Bit 0: Reserved */
#define I2C_A2_SAD_SHIFT (1) /* Bits 1-7: SMBus address */
#define I2C_A2_SAD_MASK (0x7f << I2C_A2_SHIFT)
/* I2C SCL Low Timeout Register High/Low (16-bit data in two 8-bit registers) */
/* I2C SCL Low Timeout Register High/Low
*(16-bit data in two 8-bit registers)
*/
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_I2C_H */

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@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_llwu.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_LLWU_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_LLWU_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Register Offsets *****************************************************************/
/* Register Offsets *********************************************************/
#define KL_LLWU_PE1_OFFSET 0x0000 /* LLWU Pin Enable 1 Register */
#define KL_LLWU_PE2_OFFSET 0x0001 /* LLWU Pin Enable 2 Register */
@ -45,7 +45,7 @@
#define KL_LLWU_F3_OFFSET 0x0007 /* LLWU Flag 3 Register */
#define KL_LLWU_CS_OFFSET 0x0008 /* LLWU Control and Status Register */
/* Register Addresses ***************************************************************/
/* Register Addresses *******************************************************/
#define KL_LLWU_PE1 (KL_LLWU_BASE+KL_LLWU_PE1_OFFSET)
#define KL_LLWU_PE2 (KL_LLWU_BASE+KL_LLWU_PE2_OFFSET)
@ -57,7 +57,7 @@
#define KL_LLWU_F3 (KL_LLWU_BASE+KL_LLWU_F3_OFFSET)
#define KL_LLWU_CS (KL_LLWU_BASE+KL_LLWU_CS_OFFSET)
/* Register Bit Definitions *********************************************************/
/* Register Bit Definitions *************************************************/
/* LLWU Pin Enable 1 Register */
@ -67,18 +67,21 @@
# define LLWU_PE1_WUPE0_RISING (1 << LLWU_PE1_WUPE0_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE1_WUPE0_FALLING (2 << LLWU_PE1_WUPE0_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE1_WUPE0_BOTH (3 << LLWU_PE1_WUPE0_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE1_WUPE1_SHIFT (2) /* Bits 2-3: Wakeup Pin Enable for LLWU_P1 */
#define LLWU_PE1_WUPE1_MASK (3 << LLWU_PE1_WUPE1_SHIFT)
# define LLWU_PE1_WUPE1_DISABLED (0 << LLWU_PE1_WUPE1_SHIFT) /* Ext input disabled as wakeup input */
# define LLWU_PE1_WUPE1_RISING (1 << LLWU_PE1_WUPE1_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE1_WUPE1_FALLING (2 << LLWU_PE1_WUPE1_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE1_WUPE1_BOTH (3 << LLWU_PE1_WUPE1_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE1_WUPE2_SHIFT (4) /* Bits 4-5: Wakeup Pin Enable for LLWU_P2 */
#define LLWU_PE1_WUPE2_MASK (3 << LLWU_PE1_WUPE2_SHIFT)
# define LLWU_PE1_WUPE2_DISABLED (0 << LLWU_PE1_WUPE2_SHIFT) /* Ext input disabled as wakeup input */
# define LLWU_PE1_WUPE2_RISING (1 << LLWU_PE1_WUPE2_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE1_WUPE2_FALLING (2 << LLWU_PE1_WUPE2_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE1_WUPE2_BOTH (3 << LLWU_PE1_WUPE2_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE1_WUPE3_SHIFT (6) /* Bits 6-7: Wakeup Pin Enable for LLWU_P3 */
#define LLWU_PE1_WUPE3_MASK (3 << LLWU_PE1_WUPE3_SHIFT)
# define LLWU_PE1_WUPE3_DISABLED (0 << LLWU_PE1_WUPE3_SHIFT) /* Ext input disabled as wakeup input */
@ -94,18 +97,21 @@
# define LLWU_PE2_WUPE4_RISING (1 << LLWU_PE2_WUPE4_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE2_WUPE4_FALLING (2 << LLWU_PE2_WUPE4_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE2_WUPE4_BOTH (3 << LLWU_PE2_WUPE4_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE2_WUPE5_SHIFT (2) /* Bits 2-3: Wakeup Pin Enable for LLWU_P5 */
#define LLWU_PE2_WUPE5_MASK (3 << LLWU_PE2_WUPE5_SHIFT)
# define LLWU_PE2_WUPE5_DISABLED (0 << LLWU_PE2_WUPE5_SHIFT) /* Ext input disabled as wakeup input */
# define LLWU_PE2_WUPE5_RISING (1 << LLWU_PE2_WUPE5_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE2_WUPE5_FALLING (2 << LLWU_PE2_WUPE5_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE2_WUPE5_BOTH (3 << LLWU_PE2_WUPE5_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE2_WUPE6_SHIFT (4) /* Bits 4-5: Wakeup Pin Enable for LLWU_P6 */
#define LLWU_PE2_WUPE6_MASK (3 << LLWU_PE2_WUPE6_SHIFT)
# define LLWU_PE2_WUPE6_DISABLED (0 << LLWU_PE2_WUPE6_SHIFT) /* Ext input disabled as wakeup input */
# define LLWU_PE2_WUPE6_RISING (1 << LLWU_PE2_WUPE6_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE2_WUPE6_FALLING (2 << LLWU_PE2_WUPE6_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE2_WUPE6_BOTH (3 << LLWU_PE2_WUPE6_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE2_WUPE7_SHIFT (6) /* Bits 6-7: Wakeup Pin Enable for LLWU_P7 */
#define LLWU_PE2_WUPE7_MASK (3 << LLWU_PE2_WUPE7_SHIFT)
# define LLWU_PE2_WUPE7_DISABLED (0 << LLWU_PE2_WUPE7_SHIFT) /* Ext input disabled as wakeup input */
@ -121,18 +127,21 @@
# define LLWU_PE3_WUPE8_RISING (1 << LLWU_PE3_WUPE8_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE3_WUPE8_FALLING (2 << LLWU_PE3_WUPE8_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE3_WUPE8_BOTH (3 << LLWU_PE3_WUPE8_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE3_WUPE9_SHIFT (2) /* Bits 2-3: Wakeup Pin Enable for LLWU_P9 */
#define LLWU_PE3_WUPE9_MASK (3 << LLWU_PE3_WUPE9_SHIFT)
# define LLWU_PE3_WUPE9_DISABLED (0 << LLWU_PE3_WUPE9_SHIFT) /* Ext input disabled as wakeup input */
# define LLWU_PE3_WUPE9_RISING (1 << LLWU_PE3_WUPE9_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE3_WUPE9_FALLING (2 << LLWU_PE3_WUPE9_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE3_WUPE9_BOTH (3 << LLWU_PE3_WUPE9_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE3_WUPE10_SHIFT (4) /* Bits 4-5: Wakeup Pin Enable for LLWU_P10 */
#define LLWU_PE3_WUPE10_MASK (3 << LLWU_PE3_WUPE10_SHIFT)
# define LLWU_PE3_WUPE10_DISABLED (0 << LLWU_PE3_WUPE10_SHIFT) /* Ext input disabled as wakeup input */
# define LLWU_PE3_WUPE10_RISING (1 << LLWU_PE3_WUPE10_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE3_WUPE10_FALLING (2 << LLWU_PE3_WUPE10_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE3_WUPE10_BOTH (3 << LLWU_PE3_WUPE10_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE3_WUPE11_SHIFT (6) /* Bits 6-7: Wakeup Pin Enable for LLWU_P11 */
#define LLWU_PE3_WUPE11_MASK (3 << LLWU_PE3_WUPE11_SHIFT)
# define LLWU_PE3_WUPE11_DISABLED (0 << LLWU_PE3_WUPE11_SHIFT) /* Ext input disabled as wakeup input */
@ -148,18 +157,21 @@
# define LLWU_PE4_WUPE12_RISING (1 << LLWU_PE4_WUPE12_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE4_WUPE12_FALLING (2 << LLWU_PE4_WUPE12_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE4_WUPE12_BOTH (3 << LLWU_PE4_WUPE12_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE4_WUPE13_SHIFT (2) /* Bits 2-3: Wakeup Pin Enable for LLWU_P13 */
#define LLWU_PE4_WUPE13_MASK (3 << LLWU_PE4_WUPE13_SHIFT)
# define LLWU_PE4_WUPE13_DISABLED (0 << LLWU_PE4_WUPE13_SHIFT) /* Ext input disabled as wakeup input */
# define LLWU_PE4_WUPE13_RISING (1 << LLWU_PE4_WUPE13_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE4_WUPE13_FALLING (2 << LLWU_PE4_WUPE13_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE4_WUPE13_BOTH (3 << LLWU_PE4_WUPE13_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE4_WUPE14_SHIFT (4) /* Bits 4-5: Wakeup Pin Enable for LLWU_P14 */
#define LLWU_PE4_WUPE14_MASK (3 << LLWU_PE4_WUPE14_SHIFT)
# define LLWU_PE4_WUPE14_DISABLED (0 << LLWU_PE4_WUPE14_SHIFT) /* Ext input disabled as wakeup input */
# define LLWU_PE4_WUPE14_RISING (1 << LLWU_PE4_WUPE14_SHIFT) /* Ext input enabled for rising edge */
# define LLWU_PE4_WUPE14_FALLING (2 << LLWU_PE4_WUPE14_SHIFT) /* Ext input enabled for falling edge */
# define LLWU_PE4_WUPE14_BOTH (3 << LLWU_PE4_WUPE14_SHIFT) /* Ext input enabled for any change */
#define LLWU_PE4_WUPE15_SHIFT (6) /* Bits 6-7: Wakeup Pin Enable for LLWU_P15 */
#define LLWU_PE4_WUPE15_MASK (3 << LLWU_PE4_WUPE15_SHIFT)
# define LLWU_PE4_WUPE15_DISABLED (0 << LLWU_PE4_WUPE15_SHIFT) /* Ext input disabled as wakeup input */
@ -222,16 +234,16 @@
#define LLWU_CS_FLTEP (1 << 1) /* Bit 1: Digital Filter on External Pin */
#define LLWU_CS_FLTR (1 << 0) /* Bit 0: Digital Filter on RESET Pin */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_LLWU_H */

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_mcg.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_MCG_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_MCG_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Register Offsets *****************************************************************/
/* Register Offsets *********************************************************/
#define KL_MCG_C1_OFFSET 0x0000 /* MCG Control 1 Register */
#define KL_MCG_C2_OFFSET 0x0001 /* MCG Control 2 Register */
@ -46,7 +46,7 @@
#define KL_MCG_ATCVH_OFFSET 0x000a /* MCG Auto Trim Compare Value High Register */
#define KL_MCG_ATCVL_OFFSET 0x000b /* MCG Auto Trim Compare Value Low Register */
/* Register Addresses ***************************************************************/
/* Register Addresses *******************************************************/
#define KL_MCG_C1 (KL_MCG_BASE+KL_MCG_C1_OFFSET)
#define KL_MCG_C2 (KL_MCG_BASE+KL_MCG_C2_OFFSET)
@ -59,7 +59,7 @@
#define KL_MCG_ATCVH (KL_MCG_BASE+KL_MCG_ATCVH_OFFSET)
#define KL_MCG_ATCVL (KL_MCG_BASE+KL_MCG_ATCVL_OFFSET)
/* Register Bit Definitions *********************************************************/
/* Register Bit Definitions *************************************************/
/* MCG Control 1 Register (8-bit) */
@ -82,6 +82,7 @@
# define MCG_C1_FRDIV_DIV256 (3 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=256 */
# define MCG_C1_FRDIV_DIV512 (4 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=512 */
# define MCG_C1_FRDIV_DIV1024 (5 << MCG_C1_FRDIV_SHIFT) /* RANGE!=0 divider=1024 */
#define MCG_C1_CLKS_SHIFT (6) /* Bits 6-7: Clock Source Select */
#define MCG_C1_CLKS_MASK (3 << MCG_C1_CLKS_SHIFT)
# define MCG_C1_CLKS_PLL (0 << MCG_C1_CLKS_SHIFT) /* FLL or PLL output */
@ -99,8 +100,12 @@
# define MCG_C2_RANGE_LOW (0 << MCG_C2_RANGE_SHIFT) /* Oscillator of 32 kHz to 40 kHz */
# define MCG_C2_RANGE_HIGH (1 << MCG_C2_RANGE_SHIFT) /* Oscillator of 1 MHz to 8 MHz */
# define MCG_C2_RANGE_VHIGH (2 << MCG_C2_RANGE_SHIFT) /* Oscillator of 8 MHz to 32 MHz */
/* Bits 6-7: Reserved */
/* MCG Control 3 Register (8-bit Slow Internal Reference Clock Trim Setting) */
/* MCG Control 3 Register
* (8-bit Slow Internal Reference Clock Trim Setting)
*/
/* MCG Control 4 Register (8-bit) */
@ -120,6 +125,7 @@
#define MCG_C5_PRDIV_SHIFT (0) /* Bits 0-4: PLL External Reference Divider */
#define MCG_C5_PRDIV_MASK (31 << MCG_C5_PRDIV_SHIFT)
# define MCG_C5_PRDIV(n) (((n)-1) << MCG_C5_PRDIV_SHIFT) /* Divide factor n=1..25 */
#define MCG_C5_PLLSTEN (1 << 5) /* Bit 5: PLL Stop Enable */
#define MCG_C5_PLLCLKEN (1 << 6) /* Bit 6: PLL Clock Enable */
/* Bit 7: Reserved */
@ -129,6 +135,7 @@
#define MCG_C6_VDIV_SHIFT (0) /* Bits 0-4: VCO Divider */
#define MCG_C6_VDIV_MASK (31 << MCG_C6_VDIV_SHIFT)
# define MCG_C6_VDIV(n) (((n)-24) << MCG_C6_VDIV_SHIFT) /* Divide factor n=24..55 */
#define MCG_C6_CME (1 << 5) /* Bit 5: Clock Monitor Enable */
#define MCG_C6_PLLS (1 << 6) /* Bit 6: PLL Select */
#define MCG_C6_LOLIE (1 << 7) /* Bit 7: Loss of Lock Interrupt Enable */
@ -143,12 +150,14 @@
# define MCG_S_CLKST_INTREF (1 << MCG_S_CLKST_SHIFT) /* Internal reference clock */
# define MCG_S_CLKST_EXTREF (2 << MCG_S_CLKST_SHIFT) /* External reference clock */
# define MCG_S_CLKST_PLL (3 << MCG_S_CLKST_SHIFT) /* Output of the PLL */
#define MCG_S_IREFST (1 << 4) /* Bit 4: Internal Reference Status */
#define MCG_S_PLLST (1 << 5) /* Bit 5: PLL Select Status */
#define MCG_S_LOCK (1 << 6) /* Bit 6: Lock Status */
#define MCG_S_LOLS (1 << 7) /* Bit 7: Loss of Lock Status */
/* MCG Auto Trim Control Register */
/* Bits 0-4: Reserved */
#define MCG_ATC_ATMF (1 << 5) /* Bit 5: Automatic Trim machine Fail Flag */
#define MCG_ATC_ATMS (1 << 6) /* Bit 6: Automatic Trim Machine Select */
@ -156,16 +165,16 @@
/* MCG Auto Trim Compare Value High/Low Registers (8-bit compare value) */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_MCG_H */

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,25 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_MEMORYMAP_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_MEMORYMAP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Memory Map ***************************************************************/
/* Memory Map ***********************************************************************/
/* K40 Family
*
* The memory map for the following parts is defined in Freescale document
@ -47,19 +48,24 @@
* (ICODE/DCODE) */
# define KL_SRAMU_BASE 0x20000000 /* -0x200fffff SRAM_U: Upper SRAM bitband
* region */
/* 0x20100000 * -0x3fffffff Reserved */
# define KIP_AIPS_BASE 0x40000000 /* -0x4007ffff AIPS Peripherals */
/* 0x40080000 * -0x400fffff Reserved */
# define KL_GPIO_BASE(n) (0x400ff000 + ((n) << 6))
/* 0x40100000 * -0x43ffffff Reserved */
# define KL_BME_BASE 0x44000000 /* -0x5fffffff Bit Manipulation Engine (BME) access
* to AIPS Peripherals for slots 0-127 */
/* 0x60000000 * -0xdfffffff Reserved */
# define KL_PERIPH_BASE 0xe0000000 /* -0xe00fffff Private peripherals */
/* 0xe0100000 * -0xefffffff Reserved */
# define KL_MTB_BASE 0xf0000000 /* -0xffffffff Micro Trace Buffer (MTB) registers */
/* AIPS Memory Map ******************************************************************/
/* AIPS Memory Map **********************************************************/
# define KL_DMAC_BASE 0x40008000 /* DMA controller */
# define KL_AIPSGPIO_BASE 0x4000f000 /* GPIO controller (aliased to 0x400ff000) */
@ -97,6 +103,7 @@
# define KL_PMC_BASE 0x4007d000 /* Power management controller (PMC) */
# define KL_SMC_BASE 0x4007e000 /* System Mode controller (SMC) */
# define KL_RCM_BASE 0x4007f000 /* Reset Control Module (RCM) */
/* 0x400ff000 * GPIO Controller */
# define KL_GPIOn_BASE(n) (0x400ff000 + ((n) << 6))
# define KL_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */
@ -105,21 +112,21 @@
# define KL_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */
# define KL_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */
/* Private Peripheral Bus (PPB) Memory Map ******************************************/
/* Private Peripheral Bus (PPB) Memory Map **********************************/
# define KL_SCS_BASE 0xe000e000 /* System Control Space (SCS) (for NVIC) */
# define KL_ROMTAB_BASE 0xe00ff000 /* ROM Table - allows auto-detection of debug components */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_MEMORYMAP_H */

View File

@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_osc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,32 +16,32 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_OSC_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_OSC_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
/* Register Offsets *************************************************************************/
/* Register Offsets *********************************************************/
#define KL_OSC_CR_OFFSET 0x0000 /* OSC Control Register */
/* Register Addresses ***********************************************************************/
/* Register Addresses *******************************************************/
#define KL_OSC_CR (KL_OSC_BASE+KL_OSC_CR_OFFSET)
/* Register Bit Definitions *****************************************************************/
/* Register Bit Definitions *************************************************/
/* OSC Control Register (8-bit) */
@ -54,16 +54,16 @@
#define OSC_CR_SC8P (1 << 1) /* Bit 1: Oscillator 8 pF Capacitor Load Configure */
#define OSC_CR_SC16P (1 << 0) /* Bit 0: Oscillator 16 pF Capacitor Load Configure */
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_OSC_H */

View File

@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_pinmux.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,39 +16,39 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_PINMUX_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_PINMUX_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/* This file is just a wrapper around pin muxing header files for the Kinetis family selected
* by the logic in chip.h.
/* This file is just a wrapper around pin muxing header files for the Kinetis
* family selected by the logic in chip.h.
*/
#include "k25z128_pinmux.h"
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_PINMUX_H */

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_port.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,23 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_PORT_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_PORT_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* General Definitions **************************************************************/
****************************************************************************/
/* General Definitions ******************************************************/
#define KL_PORTA (0)
#define KL_PORTB (1)
@ -41,9 +42,10 @@
#define KL_PORTE (4)
#define KL_NPORTS (5)
/* Register Offsets *****************************************************************/
/* Register Offsets *********************************************************/
#define KL_PORT_PCR_OFFSET(n) ((n) << 2) /* Pin Control Register n, n=0..31 */
#define KL_PORT_PCR0_OFFSET 0x0000 /* Pin Control Register 0 */
#define KL_PORT_PCR1_OFFSET 0x0004 /* Pin Control Register 1 */
#define KL_PORT_PCR2_OFFSET 0x0008 /* Pin Control Register 2 */
@ -83,7 +85,7 @@
#define KL_PORT_DFCR_OFFSET 0x00c4 /* Digital Filter Clock Register */
#define KL_PORT_DFWR_OFFSET 0x00c8 /* Digital Filter Width Register */
/* Register Addresses ***************************************************************/
/* Register Addresses *******************************************************/
#define KL_PORT_PCR(p,n) (KL_PORT_BASE(p)+KL_PORT_PCR_OFFSET(n)
#define KL_PORT_PCR0(p) (KL_PORT_BASE(p)+KL_PORT_PCR0_OFFSET)
@ -325,7 +327,8 @@
#define KL_PORTE_DFCR (KL_PORTE_BASE+KL_PORT_DFCR_OFFSET)
#define KL_PORTE_DFWR (KL_PORTE_BASE+KL_PORT_DFWR_OFFSET)
/* Register Bit Definitions *********************************************************/
/* Register Bit Definitions *************************************************/
/* Pin Control Register n, n=0..31 */
#define PORT_PCR_PS (1 << 0) /* Bit 0: Pull Select */
@ -347,6 +350,7 @@
# define PORT_PCR_MUX_ALT5 (5 << PORT_PCR_MUX_SHIFT) /* Alternative 5 (chip specific) */
# define PORT_PCR_MUX_ALT6 (6 << PORT_PCR_MUX_SHIFT) /* Alternative 6 (chip specific) */
# define PORT_PCR_MUX_ALT7 (7 << PORT_PCR_MUX_SHIFT) /* Alternative 7 (chip specific / JTAG / NMI) */
/* Bits 11-14: Reserved */
#define PORT_PCR_LK (1 << 15) /* Bit 15: Lock Register */
#define PORT_PCR_IRQC_SHIFT (16) /* Bits 16-19: Interrupt Configuration */
@ -360,6 +364,7 @@
# define PORT_PCR_IRQC_FALLING (10 << PORT_PCR_IRQC_SHIFT) /* Interrupt on falling edge */
# define PORT_PCR_IRQC_BOTH (11 << PORT_PCR_IRQC_SHIFT) /* Interrupt on either edge */
# define PORT_PCR_IRQC_ONE (12 << PORT_PCR_IRQC_SHIFT) /* Interrupt when logic one */
/* Bits 20-23: Reserved */
#define PORT_PCR_ISF (1 << 24) /* Bit 24: Interrupt Status Flag */
/* Bits 25-31: Reserved */
@ -401,16 +406,16 @@
#define PORT_DFWR_FILT_SHIFT (0) /* Bits 0-4: Filter Length */
#define PORT_DFWR_FILT_MASK (31 << PORT_DFWR_FILT_SHIFT)
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_PORT_H */

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_sim.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_SIM_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_SIM_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Register Offsets *****************************************************************/
/* Register Offsets *********************************************************/
/* Relative to KL_SIMLP_BASE */
@ -60,8 +60,10 @@
#define KL_SIM_COPC_OFFSET 0x0100 /* COP Control Register */
#define KL_SIM_SRVCOP_OFFSET 0x0104 /* Service COP Register */
/* Register Addresses ***************************************************************/
/* NOTE: The SIM_SOPT1 register is located at a different base address than the
/* Register Addresses *******************************************************/
/* NOTE:
* The SIM_SOPT1 register is located at a different base address than the
* other SIM registers.
*/
@ -86,15 +88,17 @@
#define KL_SIM_COPC (KL_SIM_BASE+KL_SIM_COPC_OFFSET)
#define KL_SIM_SRVCOP (KL_SIM_BASE+KL_SIM_SRVCOP_OFFSET)
/* Register Bit Definitions *********************************************************/
/* Register Bit Definitions *************************************************/
/* System Options Register 1 */
/* Bits 0-17: Reserved */
#define SIM_SOPT1_OSC32KSEL_SHIFT (18) /* Bit 18-19: 32K oscillator clock select */
#define SIM_SOPT1_OSC32KSEL_MASK (3 << SIM_SOPT1_OSC32KSEL_SHIFT)
# define SIM_SOPT1_OSC32KSEL_SYS (1 << SIM_SOPT1_OSC32KSEL_SHIFT) /* System oscillator (OSC32KCLK) */
# define SIM_SOPT1_OSC32KSEL_RTC (2 << SIM_SOPT1_OSC32KSEL_SHIFT) /* RTC_CLKIN */
# define SIM_SOPT1_OSC32KSEL_LPO (3 << SIM_SOPT1_OSC32KSEL_SHIFT) /* LPO 1kHz */
/* Bits 20-28: Reserved */
#define SIM_SOPT1_USBSTBY (1 << 29) /* Bit 29: USB voltage regulator in
* standby mode (VLPR and VLPW modes) */
@ -120,6 +124,7 @@
# define SIM_SOPT2_CLKOUTSEL_LPO (3 << SIM_SOPT2_CLKOUTSEL_SHIFT) /* LPO clock (1 kHz) */
# define SIM_SOPT2_CLKOUTSEL_MCGIRCLK (4 << SIM_SOPT2_CLKOUTSEL_SHIFT) /* MCGIRCLK */
# define SIM_SOPT2_CLKOUTSEL_OSCERCLK (6 << SIM_SOPT2_CLKOUTSEL_SHIFT) /* OSCERCLK */
#define SIM_SOPT2_CMTUARTPAD (1 << 11) /* Bit 11: CMT/UART pad drive strength */
#define SIM_SOPT2_TRACECLKSEL (1 << 12) /* Bit 12: Debug trace clock select */
/* Bits 13-15: Reserved */
@ -133,12 +138,14 @@
# define SIM_SOPT2_TPMSRC_MCGCLK (1 << SIM_SOPT2_TPMSRC_SHIFT) /* MCGFLLCLK clock or MCGPLLCLK/2 */
# define SIM_SOPT2_TPMSRC_OCSERCLK (2 << SIM_SOPT2_TPMSRC_SHIFT) /* OSCERCLK clock */
# define SIM_SOPT2_TPMSRC_MCGIRCLK (3 << SIM_SOPT2_TPMSRC_SHIFT) /* MCGIRCLK clock */
#define SIM_SOPT2_UART0SRC_SHIFT (26) /* Bits 26-27: UART0 clock source select */
#define SIM_SOPT2_UART0SRC_MASK (3 << SIM_SOPT2_UART0SRC_SHIFT)
# define SIM_SOPT2_UART0SRC_DIS (0 << SIM_SOPT2_UART0SRC_SHIFT) /* Clock disabled */
# define SIM_SOPT2_UART0SRC_MCGCLK (1 << SIM_SOPT2_UART0SRC_SHIFT) /* MCGFLLCLK clock or MCGPLLCLK/2 clock */
# define SIM_SOPT2_UART0SRC_OSCERCLK (2 << SIM_SOPT2_UART0SRC_SHIFT) /* OSCERCLK clock */
# define SIM_SOPT2_UART0SRC_MCGIRCLK (3 << SIM_SOPT2_UART0SRC_SHIFT) /* MCGIRCLK clock */
/* Bits 28-31: Reserved */
/* System Options Register 4 */
@ -160,6 +167,7 @@
# define SIM_SOPT5_UART0TXSRC_TX (0 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX pin */
# define SIM_SOPT5_UART0TXSRC_TPM1 (1 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX modulated with TPM1 ch0 output */
# define SIM_SOPT5_UART0TXSRC_TPM2 (2 << SIM_SOPT5_UART0TXSRC_SHIFT) /* UART0_TX modulated with TPM2 ch0 output */
#define SIM_SOPT5_UART0RXSRC (1 << 2) /* Bit 2: UART 0 receive data source select */
/* Bit 3: Reserved */
#define SIM_SOPT5_UART1TXSRC_SHIFT (4) /* Bits 4-5: UART 1 transmit data source select */
@ -167,11 +175,13 @@
# define SIM_SOPT5_UART1TXSRC_TX (0 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX pin */
# define SIM_SOPT5_UART1TXSRC_TPM1 (1 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX modulated with TPM1 ch0 output */
# define SIM_SOPT5_UART1TXSRC_TPM2 (2 << SIM_SOPT5_UART1TXSRC_SHIFT) /* UART1_TX modulated with TPM2 ch0 output */
#define SIM_SOPT5_UART1RXSRC (1 << 6) /* Bit 6: UART 1 receive data source select */
#define SIM_SOPT5_UART0ODE (1 << 16) /* Bit 16: UART0 Open Drain Enable */
#define SIM_SOPT5_UART1ODE (1 << 17) /* Bit 17: UART1 Open Drain Enable */
#define SIM_SOPT5_UART2ODE (1 << 18) /* Bit 18: UART2 Open Drain Enable */
/* Bits 20-31: Reserved */
/* System Options Register 7 */
#define SIM_SOPT7_ADC0TRGSEL_SHIFT (0) /* Bits 0-3: ADC0 trigger select */
@ -186,10 +196,12 @@
# define SIM_SOPT7_ADC0TRGSEL_ALARM (12 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* RTC alarm */
# define SIM_SOPT7_ADC0TRGSEL_SECS (13 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* RTC seconds */
# define SIM_SOPT7_ADC0TRGSEL_LPTMR (14 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* LPTMR0 trigger */
#define SIM_SOPT7_ADC0PRETRGSEL (1 << 4) /* Bit 4: ADC0 pretrigger select */
/* Bits 5-6: Reserved */
#define SIM_SOPT7_ADC0ALTTRGEN (1 << 7) /* Bit 7: ADC0 alternate trigger enable */
/* Bits 8-31: Reserved */
/* System Device Identification Register */
#define SIM_SDID_PINID_SHIFT (0) /* Bits 0-3: Pincount identification */
@ -201,6 +213,7 @@
# define SIM_SDID_PINID_64PIN (5 << SIM_SDID_PINID_SHIFT) /* 64-pin */
# define SIM_SDID_PINID_80PIN (6 << SIM_SDID_PINID_SHIFT) /* 80-pin */
# define SIM_SDID_PINID_100PIN (8 << SIM_SDID_PINID_SHIFT) /* 100-pin */
/* Bits 406: Reserved */
#define SIM_SDID_DIEID_SHIFT (7) /* Bits 7-1: Device die number */
#define SIM_SDID_DIEID_MASK (15 << SIM_SDID_DIEID_SHIFT)
@ -216,15 +229,18 @@
# define SIM_SDID_SRAMSIZE_16KB (5 << SIM_SDID_SRAMSIZE_SHIFT) /* 16 KB */
# define SIM_SDID_SRAMSIZE_32KB (6 << SIM_SDID_SRAMSIZE_SHIFT) /* 32 KB */
# define SIM_SDID_SRAMSIZE_64KB (7 << SIM_SDID_SRAMSIZE_SHIFT) /* 64 KB */
#define SIM_SDID_SERIESID_SHIFT (10) /* Bits 20-23: Kinetis Series ID */
#define SIM_SDID_SERIESID_MASK (15 << SIM_SDID_SERIESID_SHIFT)
# define SIM_SDID_SERIESID_KL (1 << SIM_SDID_SERIESID_SHIFT) /* KL family */
#define SIM_SDID_SUBFAMID_SHIFT (24) /* Bits 24-27: Kinetis Sub-Family ID */
#define SIM_SDID_SUBFAMID_MASK (15 << SIM_SDID_SUBFAMID_SHIFT)
# define SIM_SDID_SUBFAMID_KLX2 (2 << SIM_SDID_SUBFAMID_SHIFT) /* KLx2 Subfamily (low end) */
# define SIM_SDID_SUBFAMID_KLX4 (4 << SIM_SDID_SUBFAMID_SHIFT) /* KLx4 Subfamily (basic analog) */
# define SIM_SDID_SUBFAMID_KLX5 (5 << SIM_SDID_SUBFAMID_SHIFT) /* KLx5 Subfamily (advanced analog) */
# define SIM_SDID_SUBFAMID_KLX6 (6 << SIM_SDID_SUBFAMID_SHIFT) /* KL3x KLx6 Subfamily (advanced analog with I2S) */
#define SIM_SDID_FAMID_SHIFT (28) /* Bits 28-31: Kinetis family ID */
#define SIM_SDID_FAMID_MASK (15 << SIM_SDID_FAMID_SHIFT)
# define SIM_SDID_FAMID_KL0 (0 << SIM_SDID_FAMID_SHIFT) /* KL0x Family (low end) */
@ -234,6 +250,7 @@
# define SIM_SDID_FAMID_KL4 (4 << SIM_SDID_FAMID_SHIFT) /* KL4x Family (USB and Segment LCD) */
/* System Clock Gating Control Register 4 */
/* Bits 0-5: Reserved */
#define SIM_SCGC4_I2C0 (1 << 6) /* Bit 6: I2C0 Clock Gate Control */
#define SIM_SCGC4_I2C1 (1 << 7) /* Bit 7: I2C1 Clock Gate Control */
@ -248,6 +265,7 @@
#define SIM_SCGC4_SPI0 (1 << 22) /* Bit 22: SPI0 Clock Gate Control */
#define SIM_SCGC4_SPI1 (1 << 23) /* Bit 23: SPI1 Clock Gate Control */
/* Bits 24-31: Reserved */
/* System Clock Gating Control Register 5 */
#define SIM_SCGC5_LPTIMER (1 << 0) /* Bit 0: Low Power Timer Clock Gate Control */
@ -260,6 +278,7 @@
#define SIM_SCGC5_PORTD (1 << 12) /* Bit 12: Port D Clock Gate Control */
#define SIM_SCGC5_PORTE (1 << 13) /* Bit 13: Port E Clock Gate Control */
/* Bits 14-31: Reserved */
/* System Clock Gating Control Register 6 */
#define SIM_SCGC6_FTFL (1 << 0) /* Bit 0: Flash Memory Clock Gate Control */
@ -280,11 +299,14 @@
/* Bits 0-7: Reserved */
#define SIM_SCGC7_DMA (1 << 8) /* Bit 8: DMA Clock Gate Control */
/* Bits 9-31: Reserved */
/* System Clock Divider Register 1 */
/* Bits 0-15: Reserved */
#define SIM_CLKDIV1_OUTDIV4_SHIFT (16) /* Bits 16-18: Clock 4 output divider value */
#define SIM_CLKDIV1_OUTDIV4_MASK (7 << SIM_CLKDIV1_OUTDIV4_SHIFT)
# define SIM_CLKDIV1_OUTDIV4(n) (((n)-1) << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by n, n=1..16 */
# define SIM_CLKDIV1_OUTDIV4_1 (0 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 1 */
# define SIM_CLKDIV1_OUTDIV4_2 (1 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 2 */
# define SIM_CLKDIV1_OUTDIV4_3 (2 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 3 */
@ -293,10 +315,12 @@
# define SIM_CLKDIV1_OUTDIV4_6 (5 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 6 */
# define SIM_CLKDIV1_OUTDIV4_7 (6 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 7 */
# define SIM_CLKDIV1_OUTDIV4_8 (7 << SIM_CLKDIV1_OUTDIV4_SHIFT) /* Divide by 8 */
/* Bits 19-27: Reserved */
#define SIM_CLKDIV1_OUTDIV1_SHIFT (28) /* Bits 28-31: Clock 1 output divider value */
#define SIM_CLKDIV1_OUTDIV1_MASK (15 << SIM_CLKDIV1_OUTDIV1_SHIFT)
# define SIM_CLKDIV1_OUTDIV1(n) (((n)-1) << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by n, n=1..16 */
# define SIM_CLKDIV1_OUTDIV1_1 (0 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 1 */
# define SIM_CLKDIV1_OUTDIV1_2 (1 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 2 */
# define SIM_CLKDIV1_OUTDIV1_3 (2 << SIM_CLKDIV1_OUTDIV1_SHIFT) /* Divide by 3 */
@ -333,16 +357,22 @@
* 4 KB protection region */
# define SIM_FCFG1_PFSIZE_256KB (9 << SIM_FCFG1_PFSIZE_SHIFT) /* 256 KB of program flash memory,
* 8 KB protection region */
/* Bits 28-31: Reserved */
/* Flash Configuration Register 2 */
/* Bits 0-15: Reserved */
#define SIM_FCFG2_MAXADDR0_SHIFT (24) /* Bits 24-30: Max address block */
#define SIM_FCFG2_MAXADDR0_MASK (0x7f << SIM_FCFG2_MAXADDR0_SHIFT)
/* Bit 31: Reserved */
/* Unique Identification Register High. 16-bit Unique Identification. */
/* Unique Identification Register Mid-High. 32-bit Unique Identification. */
/* Unique Identification Register Mid Low. 32-bit Unique Identification. */
/* Unique Identification Register Low. 32-bit Unique Identification. */
/* COP Control Register */
@ -361,15 +391,15 @@
/* Service COP Register. 8-bit value. */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_SIM_H */

View File

@ -1,4 +1,4 @@
/********************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_spi.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_SPI_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_SPI_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
/* Register Offsets *************************************************************************/
/* Register Offsets *********************************************************/
#define KL_SPI_C1_OFFSET 0x0000 /* SPI control register 1 */
#define KL_SPI_C2_OFFSET 0x0001 /* SPI control register 2 */
@ -42,7 +42,7 @@
#define KL_SPI_D_OFFSET 0x0005 /* SPI data register */
#define KL_SPI_M_OFFSET 0x0007 /* SPI match register */
/* Register Addresses ***********************************************************************/
/* Register Addresses *******************************************************/
#define KL_SPI0_C1 (KL_SPI0_BASE+KL_SPI_C1_OFFSET)
#define KL_SPI0_C2 (KL_SPI0_BASE+KL_SPI_C2_OFFSET)
@ -58,7 +58,7 @@
#define KL_SPI1_D (KL_SPI1_BASE+KL_SPI_D_OFFSET)
#define KL_SPI1_M (KL_SPI1_BASE+KL_SPI_M_OFFSET)
/* Register Bit Definitions *****************************************************************/
/* Register Bit Definitions *************************************************/
/* SPI control register 1 */
@ -86,6 +86,7 @@
#define SPI_BR_SPR_SHIFT (0) /* Bits 0-3: SPI baud rate divisor */
#define SPI_BR_SPR_MASK (15 << SPI_BR_SPR_SHIFT)
# define SPI_BR_SPR_DIV(n) (((n)-1) << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 2^(n-1) */
# define SPI_BR_SPR_DIV2 (0 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 2 */
# define SPI_BR_SPR_DIV4 (1 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 4 */
# define SPI_BR_SPR_DIV8 (2 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 8 */
@ -95,11 +96,15 @@
# define SPI_BR_SPR_DIV128 (6 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 128 */
# define SPI_BR_SPR_DIV256 (7 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 256 */
# define SPI_BR_SPR_DIV512 (8 << SPI_BR_SPR_SHIFT) /* Baud rate divisor is 512 */
#define SPI_BR_SPPR_SHIFT (4) /* Bits 4-6: SPI baud rate prescale divisor */
#define SPI_BR_SPPR_MASK (7 << SPI_BR_SPPR_SHIFT)
# define SPI_BR_SPPR(n) (((n)-1) << SPI_BR_SPPR_SHIFT) /* Prescaler=n, n=1-8 */
/* Bit 7: Reserved */
/* SPI status register */
/* Bits 0-3: Reserved */
#define SPI_S_MODF (1 << 4) /* Bit 4: Master mode fault flag */
#define SPI_S_SPTEF (1 << 5) /* Bit 5: SPI transmit buffer empty flag */
@ -107,18 +112,19 @@
#define SPI_S_SPRF (1 << 7) /* Bit 7: SPI read buffer full flag */
/* SPI data register (8-bit data, low byte) */
/* SPI match register (8-bit match value) */
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
* Public Functions
********************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_SPI_H */

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/hardware/kl_uart.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_HARDWARE_KL_UART_H
#define __ARCH_ARM_SRC_KL_HARDWARE_KL_UART_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "kl_memorymap.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Register Offsets *****************************************************************/
/* Register Offsets *********************************************************/
#define KL_UART_BDH_OFFSET 0x0000 /* UART Baud Rate Register High */
#define KL_UART_BDL_OFFSET 0x0001 /* UART Baud Rate Register Low */
@ -48,7 +48,7 @@
#define KL_UART_C4_OFFSET 0x000a /* UART Control Register 4 */
#define KL_UART_C5_OFFSET 0x000b /* UART Control Register 5 (UART0) */
/* Register Addresses ***************************************************************/
/* Register Addresses *******************************************************/
#if (KL_NUART) > 0
# define KL_UART0_BDH (KL_UART0_BASE+KL_UART_BDH_OFFSET)
@ -89,7 +89,8 @@
# define KL_UART2_C4 (KL_UART2_BASE+KL_UART_C4_OFFSET)
#endif
/* Register Bit Definitions *********************************************************/
/* Register Bit Definitions *************************************************/
/* UART Baud Rate Register High */
#define UART_BDH_SBR_SHIFT (0) /* Bits 0-4: MS Bits 8-13 of the UART Baud Rate Bits */
@ -166,6 +167,7 @@
#define UART_C3_R8 (1 << 7) /* Bit 7: Receive Bit 8 */
/* UART Data Register: 8-bit data register. */
/* UART Match Address Registers 1 & 2: 8-bit address registers */
/* UART Control Register 4 (UART0) */
@ -192,16 +194,16 @@
/* Bit 6: Reserved */
#define UART_C5_TDMAE (1 << 7) /* Bit 7: Transmitter DMA Enable */
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KL_HARDWARE_KL_UART_H */

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/kl_config.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,25 +16,25 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KINETISXX_KL_CONFIG_H
#define __ARCH_ARM_SRC_KINETISXX_KL_CONFIG_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "chip.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Configuration *********************************************************************/
/* Configuration ************************************************************/
#if (KL_NUART) < 3
# undef CONFIG_KL_UART2
@ -53,8 +53,8 @@
# define HAVE_UART_DEVICE 1
#endif
/* Is there a serial console? There should be at most one defined. It could be on
* any UARTn, n=0,1,2,3,4,5
/* Is there a serial console? There should be at most one defined.
* It could be on any UARTn, n=0,1,2,3,4,5
*/
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_KL_UART0)
@ -82,20 +82,20 @@
# undef CONFIG_UART1_FLOWCONTROL
# undef CONFIG_UART2_FLOWCONTROL
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_KINETISXX_KL_CONFIG_H */

View File

@ -55,7 +55,9 @@ extern "C"
typedef FAR void *DMA_HANDLE;
typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA
* is selected
*/
#ifdef CONFIG_DEBUG_DMA
struct kl_dmaglobalregs_s

View File

@ -43,6 +43,7 @@
/****************************************************************************
* Private Data
****************************************************************************/
/* Port letters for prettier debug output */
static const char g_portchar[KL_GPIO_NPORTS] =

View File

@ -103,6 +103,7 @@ int kl_configgpio(uint32_t cfgset)
if ((cfgset & _PIN_IO_MASK) == _PIN_INPUT)
{
/* Handle input-only digital options */
/* Check for pull-up or pull-down */
if ((cfgset & _PIN_INPUT_PULLMASK) == _PIN_INPUT_PULLDOWN)
@ -117,6 +118,7 @@ int kl_configgpio(uint32_t cfgset)
else
{
/* Handle output-only digital options */
/* Check for slow slew rate setting */
if ((cfgset & _PIN_OUTPUT_SLEW_MASK) == _PIN_OUTPUT_SLOW)
@ -165,9 +167,12 @@ int kl_configgpio(uint32_t cfgset)
{
regval &= ~(1 << pin);
}
putreg32(regval, base + KL_PORT_DFER_OFFSET);
/* Additional configuration for the case of Alternative 1 (GPIO) modes */
/* Additional configuration for the case of
* Alternative 1 (GPIO) modes
*/
if (mode == PIN_MODE_GPIO)
{
@ -280,5 +285,6 @@ bool kl_gpioread(uint32_t pinset)
regval = getreg32(base + KL_GPIO_PDIR_OFFSET);
ret = ((regval & (1 << pin)) != 0);
}
return ret;
}

View File

@ -38,7 +38,9 @@
/****************************************************************************
* Pre-processor Declarations
****************************************************************************/
/* Bit-encoded input to kl_pinconfig() *****************************************/
/* Bit-encoded input to kl_pinconfig() **************************************/
/* General form (32-bits, only 22 bits are unused in the encoding):
*
* oooo mmmv iiii ifd- ---- -ppp ---b bbbb
@ -97,9 +99,11 @@
#define _PIN_OUTPUT_LOWDRIVE (1 << _PIN_OPTIONS_SHIFT) /* 0xx1 Output with low drive strength */
#define _PIN_OUTPUT_HIGHDRIVE (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Output with high drive strength */
/* End-user pin modes and configurations. Notes: (1) None of the digital options
* are available for the analog mode, (2) digital settings may be combined (OR'ed)
* provided that input-only and output-only options are not intermixed.
/* End-user pin modes and configurations.
* Notes:
* (1) None of the digital options are available for the analog mode,
* (2) digital settings may be combined (OR'ed) provided that input-only and
* output-only options are not intermixed.
*/
#define PIN_ANALOG _PIN_MODE_ANALOG
@ -339,15 +343,16 @@ void kl_gpiowrite(uint32_t pinset, bool value);
bool kl_gpioread(uint32_t pinset);
/************************************************************************************
/****************************************************************************
* Name: kl_gpioirqattach
*
* Description:
* Attach a pin interrupt handler. The normal initialization sequence is:
*
* 1. Call kl_configgpio() to configure the interrupting pin (pin interrupts
* will be disabled.
* 2. Call kl_gpioirqattach() to attach the pin interrupt handling function.
* 1. Call kl_configgpio() to configure the interrupting pin (pin
* interrupts will be disabled.
* 2. Call kl_gpioirqattach() to attach the pin interrupt handling
* function.
* 3. Call kl_gpioirqenable() to enable interrupts on the pin.
*
* Input Parameters:
@ -356,20 +361,21 @@ bool kl_gpioread(uint32_t pinset);
* - pinarg: The argument that will accompany the pin interrupt
*
* Returned Value:
* Zero (OK) is returned on success; On any failure, a negated errno value is
* returned to indicate the nature of the failure.
* Zero (OK) is returned on success;
* On any failure, a negated errno value is returned to indicate the nature
* of the failure.
*
************************************************************************************/
****************************************************************************/
int kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr, void *pinarg);
/************************************************************************************
/****************************************************************************
* Name: kl_gpioirqenable
*
* Description:
* Enable the interrupt for specified pin IRQ
*
************************************************************************************/
****************************************************************************/
#ifdef CONFIG_KL_GPIOIRQ
void kl_gpioirqenable(uint32_t pinset);
@ -377,13 +383,13 @@ void kl_gpioirqenable(uint32_t pinset);
# define kl_gpioirqenable(pinset)
#endif
/************************************************************************************
/****************************************************************************
* Name: kl_gpioirqdisable
*
* Description:
* Disable the interrupt for specified pin
*
************************************************************************************/
****************************************************************************/
#ifdef CONFIG_KL_GPIOIRQ
void kl_gpioirqdisable(uint32_t pinset);

View File

@ -41,7 +41,9 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* The Kinetis port interrupt logic is very flexible and will program
* interrupts on most all pin events. In order to keep the memory usage to
* a minimum, the NuttX port supports enabling interrupts on a per-port
@ -70,6 +72,7 @@ struct g_portisrs_s
/****************************************************************************
* Private Data
****************************************************************************/
/* Per pin port interrupt vectors. NOTE: Not all pins in each port
* correspond to externally available GPIOs. However, I believe that the
* Kinetis will support interrupts even if the pin is not available as
@ -203,11 +206,13 @@ void kl_gpioirqinitialize(void)
* Name: kl_gpioirqattach
*
* Description:
* Attach a pin interrupt handler. The normal initialization sequence is:
* Attach a pin interrupt handler.
* The normal initialization sequence is:
*
* 1. Call kl_gpioconfig() to configure the interrupting pin (pin interrupts
* will be disabled.
* 2. Call kl_gpioirqattach() to attach the pin interrupt handling function.
* 1. Call kl_gpioconfig() to configure the interrupting pin (pin
* interrupts will be disabled.
* 2. Call kl_gpioirqattach() to attach the pin interrupt handling
* function.
* 3. Call kl_gpioirqenable() to enable interrupts on the pin.
*
* Input Parameters:
@ -216,11 +221,11 @@ void kl_gpioirqinitialize(void)
* - pinarg: The argument that will accompany the pin interrupt
*
* Returned Value:
* Returned Value:
* Zero (OK) is returned on success; On any failure, a negated errno value is
* returned to indicate the nature of the failure.
* Zero (OK) is returned on success;
* On any failure, a negated errno value is returned to indicate the nature
* of the failure.
*
************************************************************************************/
****************************************************************************/
int kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr, void *pinarg)
{
@ -263,28 +268,28 @@ int kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr, void *pinarg)
return NULL;
}
/* Get the old PIN ISR and set the new PIN ISR */
/* Get the old PIN ISR and set the new PIN ISR */
isrtab[pin].handler = pinisr;
isrtab[pin].arg = pinarg;
isrtab[pin].handler = pinisr;
isrtab[pin].arg = pinarg;
/* And return the old PIN isr address */
/* And return the old PIN isr address */
leave_critical_section(flags);
return OK;
leave_critical_section(flags);
return OK;
#else
return -ENOSYS;
return -ENOSYS;
#endif /* HAVE_PORTINTS */
}
/************************************************************************************
/****************************************************************************
* Name: kl_gpioirqenable
*
* Description:
* Enable the interrupt for specified pin IRQ
*
************************************************************************************/
****************************************************************************/
void kl_gpioirqenable(uint32_t pinset)
{
@ -352,13 +357,13 @@ void kl_gpioirqenable(uint32_t pinset)
#endif /* HAVE_PORTINTS */
}
/************************************************************************************
/****************************************************************************
* Name: kl_gpioirqdisable
*
* Description:
* Disable the interrupt for specified pin
*
************************************************************************************/
****************************************************************************/
void kl_gpioirqdisable(uint32_t pinset)
{

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/kl_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,28 +16,28 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_KINETIS_IRQ_H
#define __ARCH_ARM_SRC_KL_KINETIS_IRQ_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
@ -50,13 +50,13 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)

View File

@ -45,6 +45,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Select UART parameters for the selected console */
#if defined(CONFIG_UART0_SERIAL_CONSOLE)
@ -119,11 +120,11 @@ void kl_lowputc(uint32_t ch)
* redesigning all of the FIFO status logic.
*/
while ((getreg8(CONSOLE_BASE+KL_UART_S1_OFFSET) & UART_S1_TDRE) == 0);
while ((getreg8(CONSOLE_BASE + KL_UART_S1_OFFSET) & UART_S1_TDRE) == 0);
/* Then write the character to the UART data register */
putreg8((uint8_t)ch, CONSOLE_BASE+KL_UART_D_OFFSET);
putreg8((uint8_t)ch, CONSOLE_BASE + KL_UART_D_OFFSET);
#endif
}
@ -137,6 +138,7 @@ void kl_lowputc(uint32_t ch)
* as possible.
*
****************************************************************************/
void kl_lowsetup(void)
{
uint32_t regval;
@ -246,9 +248,9 @@ void kl_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
/* Disable the transmitter and receiver throughout the reconfiguration */
regval = getreg8(uart_base+KL_UART_C2_OFFSET);
regval = getreg8(uart_base + KL_UART_C2_OFFSET);
regval &= ~(UART_C2_RE | UART_C2_TE);
putreg8(regval, uart_base+KL_UART_C2_OFFSET);
putreg8(regval, uart_base + KL_UART_C2_OFFSET);
/* Configure number of bits, stop bits and parity */

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/kl_lowputc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,29 +16,29 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_KINETIS_LOWPUTC_H
#define __ARCH_ARM_SRC_KL_KINETIS_LOWPUTC_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "kl_config.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
@ -51,53 +51,54 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: kl_lowsetup
*
* Description:
* Called at the very beginning of _start. Performs low level initialization
* including setup of the console UART. This UART done early so that the serial
* console is available for debugging very early in the boot sequence.
* Called at the very beginning of _start.
* Performs low level initialization including setup of the console UART.
* This UART done early so that the serial console is available for
* debugging very early in the boot sequence.
*
************************************************************************************/
****************************************************************************/
void kl_lowsetup(void);
/************************************************************************************
/****************************************************************************
* Name: kl_uartreset
*
* Description:
* Reset a UART.
*
************************************************************************************/
****************************************************************************/
#ifdef HAVE_UART_DEVICE
void kl_uartreset(uintptr_t uart_base);
#endif
/************************************************************************************
/****************************************************************************
* Name: kl_lowputc
*
* Description:
* Output one character to the UART using a simple polling method.
*
************************************************************************************/
****************************************************************************/
#ifdef HAVE_SERIAL_CONSOLE
void kl_lowputc(uint32_t ch);
#endif
/************************************************************************************
/****************************************************************************
* Name: kl_uartconfigure
*
* Description:
* Configure a UART as a RS-232 UART.
*
************************************************************************************/
****************************************************************************/
#ifdef HAVE_UART_DEVICE
void kl_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/kl_spi.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_KL_SPI_H
#define __ARCH_ARM_SRC_KL_KL_SPI_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
@ -44,9 +44,9 @@ extern "C"
#define EXTERN extern
#endif
/************************************************************************************
/****************************************************************************
* Public Function Prototypes
************************************************************************************/
****************************************************************************/
struct spi_dev_s; /* Forward reference */
@ -66,36 +66,39 @@ struct spi_dev_s; /* Forward reference */
FAR struct spi_dev_s *kl_spibus_initialize(int port);
/************************************************************************************
/****************************************************************************
* Name: kl_spi[n]select, kl_spi[n]status, and kl_spi[n]cmddata
*
* Description:
* These external functions must be provided by board-specific logic. They are
* implementations of the select, status, and cmddata methods of the SPI interface
* defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
* including kl_spibus_initialize()) are provided by common Kinetis logic. To use
* this common SPI logic on your board:
* These external functions must be provided by board-specific logic.
* They are implementations of the select, status, and cmddata methods of
* the SPI interface defined by struct spi_ops_s
* (see include/nuttx/spi/spi.h). All other methods including
* kl_spibus_initialize()) are provided by common Kinetis logic.
* To use this common SPI logic on your board:
*
* 1. Provide logic in kl_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide kl_spi[n]select() and kl_spi[n]status() functions
* in your board-specific logic. These functions will perform chip selection
* and status operations using GPIOs in the way your board is configured.
* 2. Provide kl_spi[n]select() and kl_spi[n]status() functions in your
* board-specific logic. These functions will perform chip selection
* and status operations using GPIOs in the way your board is
* configured.
* 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
* kl_spi[n]cmddata() functions in your board-specific logic. These
* functions will perform cmd/data selection operations using GPIOs in the way
* your board is configured.
* functions will perform cmd/data selection operations using GPIOs in
* the way your board is configured.
* 3. Add a call to kl_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by kl_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* 4. The handle returned by kl_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
************************************************************************************/
****************************************************************************/
#ifdef CONFIG_KL_SPI0
void kl_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
void kl_spi0select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected);
uint8_t kl_spi0status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int kl_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
@ -103,7 +106,8 @@ int kl_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
#endif
#ifdef CONFIG_KL_SPI1
void kl_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
void kl_spi1select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected);
uint8_t kl_spi1status(FAR struct spi_dev_s *dev, uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA
int kl_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/kl_start.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,31 +16,31 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_KL_START_H
#define __ARCH_ARM_SRC_KL_KL_START_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
/****************************************************************************
* Public Function Prototypes
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: kl_boardinitialize
*
* Description:
* All Kinetis L architectures must provide the following entry point. This entry
* point is called early in the initialization -- after clocking and memory have
* been configured but before caches have been enabled and before any devices have
* been initialized.
* All Kinetis L architectures must provide the following entry point.
* This entry point is called early in the initialization -- after clocking
* and memory have been configured but before caches have been enabled and
* before any devices have been initialized.
*
************************************************************************************/
****************************************************************************/
void kl_boardinitialize(void);

View File

@ -40,6 +40,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* "The CLKSOURCE bit in SysTick Control and Status register selects either
* the core clock (when CLKSOURCE = 1) or a divide-by-16 of the core clock
* (when CLKSOURCE = 0). ..."
@ -136,7 +137,8 @@ void up_timer_initialize(void)
*/
#ifdef CONFIG_KL_SYSTICK_CORECLK
putreg32((SYSTICK_CSR_CLKSOURCE | SYSTICK_CSR_TICKINT | SYSTICK_CSR_ENABLE),
putreg32((SYSTICK_CSR_CLKSOURCE |
SYSTICK_CSR_TICKINT | SYSTICK_CSR_ENABLE),
ARMV6M_SYSTICK_CSR);
#else
putreg32((SYSTICK_CSR_TICKINT | SYSTICK_CSR_ENABLE), ARMV6M_SYSTICK_CSR);

View File

@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/kl/kl_userspace.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@ -16,32 +16,32 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KL_KINETIS_USERSPACE_H
#define __ARCH_ARM_SRC_KL_KINETIS_USERSPACE_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Types
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
/****************************************************************************
* Name: kl_userspace