arch/arm/src/lpc54xx: Ethernet. Remove last of #warning issues. No compiles with no warnings/errors.
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@ -684,11 +684,11 @@ config LPC54_ETH_MII
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Support Ethernet MII interface. Default: Use RMII interface.
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config LPC54_ETH_MULTIQUEUE
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bool "Use multiple queues"
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bool "IEEE 802.1q VLAN AVBTP support"
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default n
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depends on EXPERIMENTAL
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---help---
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Enables software drivers for the special hardware support for
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Enables software drivers for the special hardware support of
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IEEE 802.1q VLAN Audio/Visual Bridge Types (AVBTP). In this
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configuration two queues are available: One for normal traffic
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and one dedicated to the AVBTP traffic.
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@ -862,10 +862,6 @@ config LPC54_ETH_NTXDESC1
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NOTE: Each Rx descriptor will require a transmit buffer at the size
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of the configured MTU.
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config LPC54_ETH_RX_DOUBLEBUFFER
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bool "Enable Rx double buffering"
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default n
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endmenu # Ethernet configuration
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menu "SD/MMC Configuration"
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@ -280,9 +280,6 @@ struct lpc54_rxring_s
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uint16_t rr_supply; /* Available Rx descriptor ring index */
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uint16_t rr_ndesc; /* Number or descriptors in the Rx ring */
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uint32_t **rr_buffers; /* Packet buffers assigned to the Rx ring */
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#ifdef CONFIG_LPC54_ETH_RX_DOUBLEBUFFER
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uint32_t **rr_buffer2s; /* Packet buffers assigned to the Rx ring */
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#endif
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};
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/* The lpc54_ethdriver_s encapsulates all state information for a single
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@ -299,6 +296,7 @@ struct lpc54_ethdriver_s
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WDOG_ID eth_txtimeout; /* TX timeout timer */
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struct work_s eth_irqwork; /* For deferring interupt work to the work queue */
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struct work_s eth_pollwork; /* For deferring poll work to the work queue */
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struct work_s eth_timeoutwork; /* For deferring timeout work to the work queue */
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struct sq_queue_s eth_freebuf; /* Free packet buffers */
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/* Ring state */
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@ -360,10 +358,6 @@ static uint32_t *g_txbuffers0[CONFIG_LPC54_ETH_NTXDESC0];
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static uint32_t *g_rxbuffers1[CONFIG_LPC54_ETH_NRXDESC1];
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static uint32_t *g_txbuffers1[CONFIG_LPC54_ETH_NTXDESC1];
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#endif
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#ifdef CONFIG_LPC54_ETH_RX_DOUBLEBUFFER
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static uint32_t *g_rxbuffer2s0[CONFIG_LPC54_ETH_NRXDESC0];
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static uint32_t *g_rxbuffer2s1[CONFIG_LPC54_ETH_NRXDESC1];
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#endif
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/****************************************************************************
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* Private Function Prototypes
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@ -959,10 +953,6 @@ static void lpc54_eth_receive(struct lpc54_ethdriver_s *priv,
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pktlen += framelen;
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if (pktlen > 0)
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{
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#ifdef CONFIG_LPC54_ETH_RX_DOUBLEBUFFER
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/* No logic in place to handle the double buffered case */
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# warning Missing logic
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#endif
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/* Recover the buffer.
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*
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* REVISIT: According to the User manual, buffer1 and
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@ -997,14 +987,6 @@ static void lpc54_eth_receive(struct lpc54_ethdriver_s *priv,
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#if LPC54_BUFFER_SIZE > LPC54_BUFFER_MAX
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rxdesc->buffer2 = rxdesc->buffer1 + LPC54_BUFFER_MAX;
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#elif defined(CONFIG_LPC54_ETH_RX_DOUBLEBUFFER)
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/* Allocate the second Rx packet buffer */
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rxdesc->buffer2 = (uint32_t)lpc54_pktbuf_alloc(priv);
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DEBUGASSERT(rxdesc->buffer2 != NULL);
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(rxring->rr_buffers2)[supply] = (uint32_t *)rxdesc->buffer2;
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#else
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/* The second buffer is not used */
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@ -1017,7 +999,7 @@ static void lpc54_eth_receive(struct lpc54_ethdriver_s *priv,
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*/
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regval = ETH_RXDES3_BUF1V | ETH_RXDES3_IOC | ETH_RXDES3_OWN;
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#if LPC54_BUFFER_SIZE > LPC54_BUFFER_MAX || defined(CONFIG_LPC54_ETH_RX_DOUBLEBUFFER)
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#if LPC54_BUFFER_SIZE > LPC54_BUFFER_MAX
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regval |= ETH_RXDES3_BUF2V;
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#endif
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rxdesc->ctrl = regval;
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@ -1032,13 +1014,16 @@ static void lpc54_eth_receive(struct lpc54_ethdriver_s *priv,
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* Rx descriptors. We cannot support that in this design. We
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* would like to:
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*
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* 1. Accumate the data in yet another Rx buffer,
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* 2. Accumulate the size in the 'pktlen' local variable, then
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* 3. Dispatch that extra Rx buffer when the last frame is
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* encountered.
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* 1. Accumate the data in yet another Rx buffer,
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* 2. Accumulate the size in the 'pktlen' local variable, then
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* 3. Dispatch that extra Rx buffer when the last frame is
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* encountered.
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*
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* The assumption here is that this will never happen if our MTU
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* properaly advertised.
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*/
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#warning Missing logic
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NETDEV_RXDROPPED(&priv->eth_dev);
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priv->eth_rxdiscard = 1;
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}
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}
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@ -1076,6 +1061,10 @@ static void lpc54_eth_txdone(struct lpc54_ethdriver_s *priv,
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unsigned int chan)
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{
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struct lpc54_txring_s *txring;
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#ifdef CONFIG_LPC54_ETH_MULTIQUEUE
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struct lpc54_txring_s *txring0;
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struct lpc54_txring_s *txring1;
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#endif
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struct enet_txdesc_s *txdesc;
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uint32_t *pktbuf;
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@ -1118,9 +1107,18 @@ static void lpc54_eth_txdone(struct lpc54_ethdriver_s *priv,
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/* If no further transmissions are pending, then cancel the TX timeout. */
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#ifdef CONFIG_LPC54_ETH_MULTIQUEUE
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txring0 = &priv->eth_txring[0];
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txring1 = &priv->eth_txring[1];
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if (txring0->tr_inuse == 0 && txring1->tr_inuse == 0)
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#else
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if (txring->tr_inuse == 0)
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#endif
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{
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wd_cancel(priv->eth_txtimeout);
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work_cancel(ETHWORK, &priv->eth_timeoutwork);
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}
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/* Poll the network for new TX data. */
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@ -1304,17 +1302,10 @@ static int lpc54_eth_interrupt(int irq, void *context, void *arg)
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up_disable_irq(LPC54_IRQ_ETHERNET);
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/* TODO: Determine if a TX transfer just completed */
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#warning Missing logic
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{
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/* If a TX transfer just completed, then cancel the TX timeout so
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* there will be no race condition between any subsequent timeout
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* expiration and the deferred interrupt processing.
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*/
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wd_cancel(priv->eth_txtimeout);
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}
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/* Note: We have a race condition which, I believe is handled OK. If
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* there is a Tx timeout in place, then that timeout could expire
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* anytime and queue additional work to handle the timeout.
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*/
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/* Schedule to perform the interrupt processing on the worker thread. */
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@ -1444,7 +1435,8 @@ static void lpc54_eth_txtimeout_expiry(int argc, wdparm_t arg, ...)
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/* Schedule to perform the TX timeout processing on the worker thread. */
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work_queue(ETHWORK, &priv->eth_irqwork, lpc54_eth_txtimeout_work, priv, 0);
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work_queue(ETHWORK, &priv->eth_timeoutwork, lpc54_eth_txtimeout_work,
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priv, 0);
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}
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/****************************************************************************
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@ -2367,7 +2359,7 @@ static void lpc54_rxring_initialize(struct lpc54_ethdriver_s *priv,
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/* Initialize the Rx descriptor ring. */
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regval = ETH_RXDES3_BUF1V | ETH_RXDES3_IOC | ETH_RXDES3_OWN;
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#if LPC54_BUFFER_SIZE > LPC54_BUFFER_MAX || defined(CONFIG_LPC54_ETH_RX_DOUBLEBUFFER)
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#if LPC54_BUFFER_SIZE > LPC54_BUFFER_MAX
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regval |= ETH_RXDES3_BUF2V;
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#endif
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@ -2380,15 +2372,9 @@ static void lpc54_rxring_initialize(struct lpc54_ethdriver_s *priv,
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(rxring->rr_buffers)[i] = (uint32_t *)rxdesc->buffer1;
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#if LPC54_BUFFER_SIZE > LPC54_BUFFER_MAX
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/* Configure the second part of a large packet buffer as buffer2 */
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rxdesc->buffer2 = rxdesc->buffer1 + LPC54_BUFFER_MAX;
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#elif defined(CONFIG_LPC54_ETH_RX_DOUBLEBUFFER)
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/* Allocate the second Rx packet buffer */
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rxdesc->buffer2 = (uint32_t)lpc54_pktbuf_alloc(priv);
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DEBUGASSERT(rxdesc->buffer2 != NULL);
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(rxring->rr_buffer2s)[i] = rxdesc->buffer2;
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#else
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/* The second buffer is not used */
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@ -2435,9 +2421,6 @@ static void lpc54_ring_initialize(struct lpc54_ethdriver_s *priv)
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priv->eth_rxring[0].rr_desc = g_ch0_rxdesc;
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priv->eth_rxring[0].rr_ndesc = CONFIG_LPC54_ETH_NRXDESC0;
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priv->eth_rxring[0].rr_buffers = g_rxbuffers0;
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#ifdef CONFIG_LPC54_ETH_RX_DOUBLEBUFFER
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priv->eth_txring[0].tr_buffer2s = g_rxbuffer2s0;
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#endif
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lpc54_rxring_initialize(priv, 0);
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#ifdef CONFIG_LPC54_ETH_MULTIQUEUE
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@ -2449,9 +2432,6 @@ static void lpc54_ring_initialize(struct lpc54_ethdriver_s *priv)
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priv->eth_txring[1].tr_desc = g_ch1_txdesc;
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priv->eth_txring[1].tr_ndesc = CONFIG_LPC54_ETH_NTXDESC1;
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priv->eth_txring[1].tr_buffers = g_txbuffers1;
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#ifdef CONFIG_LPC54_ETH_RX_DOUBLEBUFFER
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priv->eth_txring[1].tr_buffer2s = g_rxbuffer2s1;
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#endif
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lpc54_txring_initialize(priv, 1);
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priv->eth_rxring[1].rr_desc = g_ch1_rxdesc;
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